fdtdec.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/global_data.h>
  24. #include <asm/sections.h>
  25. #include <linux/ctype.h>
  26. #include <linux/lzo.h>
  27. #include <linux/ioport.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /*
  30. * Here are the type we know about. One day we might allow drivers to
  31. * register. For now we just put them here. The COMPAT macro allows us to
  32. * turn this into a sparse list later, and keeps the ID with the name.
  33. *
  34. * NOTE: This list is basically a TODO list for things that need to be
  35. * converted to driver model. So don't add new things here unless there is a
  36. * good reason why driver-model conversion is infeasible. Examples include
  37. * things which are used before driver model is available.
  38. */
  39. #define COMPAT(id, name) name
  40. static const char * const compat_names[COMPAT_COUNT] = {
  41. COMPAT(UNKNOWN, "<none>"),
  42. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  43. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  44. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  45. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  46. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  47. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  48. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  49. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  50. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  51. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  52. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  53. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  54. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  55. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  56. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  57. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  58. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  59. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  60. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  61. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  62. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  63. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  64. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  65. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  72. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  73. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  74. };
  75. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  76. {
  77. /* We allow reading of the 'unknown' ID for testing purposes */
  78. assert(id >= 0 && id < COMPAT_COUNT);
  79. return compat_names[id];
  80. }
  81. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  82. const char *prop_name, int index, int na,
  83. int ns, fdt_size_t *sizep,
  84. bool translate)
  85. {
  86. const fdt32_t *prop, *prop_end;
  87. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  88. int len;
  89. fdt_addr_t addr;
  90. debug("%s: %s: ", __func__, prop_name);
  91. prop = fdt_getprop(blob, node, prop_name, &len);
  92. if (!prop) {
  93. debug("(not found)\n");
  94. return FDT_ADDR_T_NONE;
  95. }
  96. prop_end = prop + (len / sizeof(*prop));
  97. prop_addr = prop + (index * (na + ns));
  98. prop_size = prop_addr + na;
  99. prop_after_size = prop_size + ns;
  100. if (prop_after_size > prop_end) {
  101. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  102. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  103. return FDT_ADDR_T_NONE;
  104. }
  105. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  106. if (translate)
  107. addr = fdt_translate_address(blob, node, prop_addr);
  108. else
  109. #endif
  110. addr = fdtdec_get_number(prop_addr, na);
  111. if (sizep) {
  112. *sizep = fdtdec_get_number(prop_size, ns);
  113. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  114. (unsigned long long)*sizep);
  115. } else {
  116. debug("addr=%08llx\n", (unsigned long long)addr);
  117. }
  118. return addr;
  119. }
  120. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  121. int node, const char *prop_name,
  122. int index, fdt_size_t *sizep,
  123. bool translate)
  124. {
  125. int na, ns;
  126. debug("%s: ", __func__);
  127. na = fdt_address_cells(blob, parent);
  128. if (na < 1) {
  129. debug("(bad #address-cells)\n");
  130. return FDT_ADDR_T_NONE;
  131. }
  132. ns = fdt_size_cells(blob, parent);
  133. if (ns < 0) {
  134. debug("(bad #size-cells)\n");
  135. return FDT_ADDR_T_NONE;
  136. }
  137. debug("na=%d, ns=%d, ", na, ns);
  138. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  139. ns, sizep, translate);
  140. }
  141. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  142. const char *prop_name, int index,
  143. fdt_size_t *sizep,
  144. bool translate)
  145. {
  146. int parent;
  147. debug("%s: ", __func__);
  148. parent = fdt_parent_offset(blob, node);
  149. if (parent < 0) {
  150. debug("(no parent found)\n");
  151. return FDT_ADDR_T_NONE;
  152. }
  153. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  154. index, sizep, translate);
  155. }
  156. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  157. const char *prop_name, fdt_size_t *sizep)
  158. {
  159. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  160. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  161. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  162. ns, sizep, false);
  163. }
  164. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  165. {
  166. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  167. }
  168. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  169. {
  170. const char *list, *end;
  171. int len;
  172. list = fdt_getprop(blob, node, "compatible", &len);
  173. if (!list)
  174. return -ENOENT;
  175. end = list + len;
  176. while (list < end) {
  177. len = strlen(list);
  178. if (len >= strlen("pciVVVV,DDDD")) {
  179. char *s = strstr(list, "pci");
  180. /*
  181. * check if the string is something like pciVVVV,DDDD.RR
  182. * or just pciVVVV,DDDD
  183. */
  184. if (s && s[7] == ',' &&
  185. (s[12] == '.' || s[12] == 0)) {
  186. s += 3;
  187. *vendor = simple_strtol(s, NULL, 16);
  188. s += 5;
  189. *device = simple_strtol(s, NULL, 16);
  190. return 0;
  191. }
  192. }
  193. list += (len + 1);
  194. }
  195. return -ENOENT;
  196. }
  197. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  198. u32 *bar)
  199. {
  200. int barnum;
  201. /* extract the bar number from fdt_pci_addr */
  202. barnum = addr->phys_hi & 0xff;
  203. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  204. return -EINVAL;
  205. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  206. /*
  207. * There is a strange toolchain bug with nds32 which complains about
  208. * an undefined reference here, even if fdtdec_get_pci_bar32() is never
  209. * called. An #ifdef seems to be the only fix!
  210. */
  211. #if !IS_ENABLED(CONFIG_NDS32)
  212. *bar = dm_pci_read_bar32(dev, barnum);
  213. #endif
  214. return 0;
  215. }
  216. int fdtdec_get_pci_bus_range(const void *blob, int node,
  217. struct fdt_resource *res)
  218. {
  219. const u32 *values;
  220. int len;
  221. values = fdt_getprop(blob, node, "bus-range", &len);
  222. if (!values || len < sizeof(*values) * 2)
  223. return -EINVAL;
  224. res->start = fdt32_to_cpu(*values++);
  225. res->end = fdt32_to_cpu(*values);
  226. return 0;
  227. }
  228. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  229. uint64_t default_val)
  230. {
  231. const unaligned_fdt64_t *cell64;
  232. int length;
  233. cell64 = fdt_getprop(blob, node, prop_name, &length);
  234. if (!cell64 || length < sizeof(*cell64))
  235. return default_val;
  236. return fdt64_to_cpu(*cell64);
  237. }
  238. int fdtdec_get_is_enabled(const void *blob, int node)
  239. {
  240. const char *cell;
  241. /*
  242. * It should say "okay", so only allow that. Some fdts use "ok" but
  243. * this is a bug. Please fix your device tree source file. See here
  244. * for discussion:
  245. *
  246. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  247. */
  248. cell = fdt_getprop(blob, node, "status", NULL);
  249. if (cell)
  250. return strcmp(cell, "okay") == 0;
  251. return 1;
  252. }
  253. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  254. {
  255. enum fdt_compat_id id;
  256. /* Search our drivers */
  257. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  258. if (fdt_node_check_compatible(blob, node,
  259. compat_names[id]) == 0)
  260. return id;
  261. return COMPAT_UNKNOWN;
  262. }
  263. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  264. {
  265. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  266. }
  267. int fdtdec_next_compatible_subnode(const void *blob, int node,
  268. enum fdt_compat_id id, int *depthp)
  269. {
  270. do {
  271. node = fdt_next_node(blob, node, depthp);
  272. } while (*depthp > 1);
  273. /* If this is a direct subnode, and compatible, return it */
  274. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  275. blob, node, compat_names[id]))
  276. return node;
  277. return -FDT_ERR_NOTFOUND;
  278. }
  279. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  280. int *upto)
  281. {
  282. #define MAX_STR_LEN 20
  283. char str[MAX_STR_LEN + 20];
  284. int node, err;
  285. /* snprintf() is not available */
  286. assert(strlen(name) < MAX_STR_LEN);
  287. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  288. node = fdt_path_offset(blob, str);
  289. if (node < 0)
  290. return node;
  291. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  292. if (err < 0)
  293. return err;
  294. if (err)
  295. return -FDT_ERR_NOTFOUND;
  296. (*upto)++;
  297. return node;
  298. }
  299. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  300. enum fdt_compat_id id, int *node_list,
  301. int maxcount)
  302. {
  303. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  304. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  305. }
  306. /* TODO: Can we tighten this code up a little? */
  307. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  308. enum fdt_compat_id id, int *node_list,
  309. int maxcount)
  310. {
  311. int name_len = strlen(name);
  312. int nodes[maxcount];
  313. int num_found = 0;
  314. int offset, node;
  315. int alias_node;
  316. int count;
  317. int i, j;
  318. /* find the alias node if present */
  319. alias_node = fdt_path_offset(blob, "/aliases");
  320. /*
  321. * start with nothing, and we can assume that the root node can't
  322. * match
  323. */
  324. memset(nodes, '\0', sizeof(nodes));
  325. /* First find all the compatible nodes */
  326. for (node = count = 0; node >= 0 && count < maxcount;) {
  327. node = fdtdec_next_compatible(blob, node, id);
  328. if (node >= 0)
  329. nodes[count++] = node;
  330. }
  331. if (node >= 0)
  332. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  333. __func__, name);
  334. /* Now find all the aliases */
  335. for (offset = fdt_first_property_offset(blob, alias_node);
  336. offset > 0;
  337. offset = fdt_next_property_offset(blob, offset)) {
  338. const struct fdt_property *prop;
  339. const char *path;
  340. int number;
  341. int found;
  342. node = 0;
  343. prop = fdt_get_property_by_offset(blob, offset, NULL);
  344. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  345. if (prop->len && 0 == strncmp(path, name, name_len))
  346. node = fdt_path_offset(blob, prop->data);
  347. if (node <= 0)
  348. continue;
  349. /* Get the alias number */
  350. number = dectoul(path + name_len, NULL);
  351. if (number < 0 || number >= maxcount) {
  352. debug("%s: warning: alias '%s' is out of range\n",
  353. __func__, path);
  354. continue;
  355. }
  356. /* Make sure the node we found is actually in our list! */
  357. found = -1;
  358. for (j = 0; j < count; j++)
  359. if (nodes[j] == node) {
  360. found = j;
  361. break;
  362. }
  363. if (found == -1) {
  364. debug("%s: warning: alias '%s' points to a node "
  365. "'%s' that is missing or is not compatible "
  366. " with '%s'\n", __func__, path,
  367. fdt_get_name(blob, node, NULL),
  368. compat_names[id]);
  369. continue;
  370. }
  371. /*
  372. * Add this node to our list in the right place, and mark
  373. * it as done.
  374. */
  375. if (fdtdec_get_is_enabled(blob, node)) {
  376. if (node_list[number]) {
  377. debug("%s: warning: alias '%s' requires that "
  378. "a node be placed in the list in a "
  379. "position which is already filled by "
  380. "node '%s'\n", __func__, path,
  381. fdt_get_name(blob, node, NULL));
  382. continue;
  383. }
  384. node_list[number] = node;
  385. if (number >= num_found)
  386. num_found = number + 1;
  387. }
  388. nodes[found] = 0;
  389. }
  390. /* Add any nodes not mentioned by an alias */
  391. for (i = j = 0; i < maxcount; i++) {
  392. if (!node_list[i]) {
  393. for (; j < maxcount; j++)
  394. if (nodes[j] &&
  395. fdtdec_get_is_enabled(blob, nodes[j]))
  396. break;
  397. /* Have we run out of nodes to add? */
  398. if (j == maxcount)
  399. break;
  400. assert(!node_list[i]);
  401. node_list[i] = nodes[j++];
  402. if (i >= num_found)
  403. num_found = i + 1;
  404. }
  405. }
  406. return num_found;
  407. }
  408. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  409. int *seqp)
  410. {
  411. int base_len = strlen(base);
  412. const char *find_name;
  413. int find_namelen;
  414. int prop_offset;
  415. int aliases;
  416. find_name = fdt_get_name(blob, offset, &find_namelen);
  417. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  418. aliases = fdt_path_offset(blob, "/aliases");
  419. for (prop_offset = fdt_first_property_offset(blob, aliases);
  420. prop_offset > 0;
  421. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  422. const char *prop;
  423. const char *name;
  424. const char *slash;
  425. int len, val;
  426. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  427. debug(" - %s, %s\n", name, prop);
  428. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  429. strncmp(name, base, base_len))
  430. continue;
  431. slash = strrchr(prop, '/');
  432. if (strcmp(slash + 1, find_name))
  433. continue;
  434. /*
  435. * Adding an extra check to distinguish DT nodes with
  436. * same name
  437. */
  438. if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
  439. if (fdt_get_phandle(blob, offset) !=
  440. fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
  441. continue;
  442. }
  443. val = trailing_strtol(name);
  444. if (val != -1) {
  445. *seqp = val;
  446. debug("Found seq %d\n", *seqp);
  447. return 0;
  448. }
  449. }
  450. debug("Not found\n");
  451. return -ENOENT;
  452. }
  453. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  454. {
  455. int base_len = strlen(base);
  456. int prop_offset;
  457. int aliases;
  458. int max = -1;
  459. debug("Looking for highest alias id for '%s'\n", base);
  460. aliases = fdt_path_offset(blob, "/aliases");
  461. for (prop_offset = fdt_first_property_offset(blob, aliases);
  462. prop_offset > 0;
  463. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  464. const char *prop;
  465. const char *name;
  466. int len, val;
  467. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  468. debug(" - %s, %s\n", name, prop);
  469. if (*prop != '/' || prop[len - 1] ||
  470. strncmp(name, base, base_len))
  471. continue;
  472. val = trailing_strtol(name);
  473. if (val > max) {
  474. debug("Found seq %d\n", val);
  475. max = val;
  476. }
  477. }
  478. return max;
  479. }
  480. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  481. {
  482. int chosen_node;
  483. if (!blob)
  484. return NULL;
  485. chosen_node = fdt_path_offset(blob, "/chosen");
  486. return fdt_getprop(blob, chosen_node, name, NULL);
  487. }
  488. int fdtdec_get_chosen_node(const void *blob, const char *name)
  489. {
  490. const char *prop;
  491. prop = fdtdec_get_chosen_prop(blob, name);
  492. if (!prop)
  493. return -FDT_ERR_NOTFOUND;
  494. return fdt_path_offset(blob, prop);
  495. }
  496. int fdtdec_check_fdt(void)
  497. {
  498. /*
  499. * We must have an FDT, but we cannot panic() yet since the console
  500. * is not ready. So for now, just assert(). Boards which need an early
  501. * FDT (prior to console ready) will need to make their own
  502. * arrangements and do their own checks.
  503. */
  504. assert(!fdtdec_prepare_fdt());
  505. return 0;
  506. }
  507. /*
  508. * This function is a little odd in that it accesses global data. At some
  509. * point if the architecture board.c files merge this will make more sense.
  510. * Even now, it is common code.
  511. */
  512. int fdtdec_prepare_fdt(void)
  513. {
  514. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  515. fdt_check_header(gd->fdt_blob)) {
  516. #ifdef CONFIG_SPL_BUILD
  517. puts("Missing DTB\n");
  518. #else
  519. printf("No valid device tree binary found at %p\n",
  520. gd->fdt_blob);
  521. # ifdef DEBUG
  522. if (gd->fdt_blob) {
  523. printf("fdt_blob=%p\n", gd->fdt_blob);
  524. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  525. 32, 0);
  526. }
  527. # endif
  528. #endif
  529. return -1;
  530. }
  531. return 0;
  532. }
  533. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  534. {
  535. const u32 *phandle;
  536. int lookup;
  537. debug("%s: %s\n", __func__, prop_name);
  538. phandle = fdt_getprop(blob, node, prop_name, NULL);
  539. if (!phandle)
  540. return -FDT_ERR_NOTFOUND;
  541. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  542. return lookup;
  543. }
  544. /**
  545. * Look up a property in a node and check that it has a minimum length.
  546. *
  547. * @param blob FDT blob
  548. * @param node node to examine
  549. * @param prop_name name of property to find
  550. * @param min_len minimum property length in bytes
  551. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  552. found, or -FDT_ERR_BADLAYOUT if not enough data
  553. * @return pointer to cell, which is only valid if err == 0
  554. */
  555. static const void *get_prop_check_min_len(const void *blob, int node,
  556. const char *prop_name, int min_len,
  557. int *err)
  558. {
  559. const void *cell;
  560. int len;
  561. debug("%s: %s\n", __func__, prop_name);
  562. cell = fdt_getprop(blob, node, prop_name, &len);
  563. if (!cell)
  564. *err = -FDT_ERR_NOTFOUND;
  565. else if (len < min_len)
  566. *err = -FDT_ERR_BADLAYOUT;
  567. else
  568. *err = 0;
  569. return cell;
  570. }
  571. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  572. u32 *array, int count)
  573. {
  574. const u32 *cell;
  575. int err = 0;
  576. debug("%s: %s\n", __func__, prop_name);
  577. cell = get_prop_check_min_len(blob, node, prop_name,
  578. sizeof(u32) * count, &err);
  579. if (!err) {
  580. int i;
  581. for (i = 0; i < count; i++)
  582. array[i] = fdt32_to_cpu(cell[i]);
  583. }
  584. return err;
  585. }
  586. int fdtdec_get_int_array_count(const void *blob, int node,
  587. const char *prop_name, u32 *array, int count)
  588. {
  589. const u32 *cell;
  590. int len, elems;
  591. int i;
  592. debug("%s: %s\n", __func__, prop_name);
  593. cell = fdt_getprop(blob, node, prop_name, &len);
  594. if (!cell)
  595. return -FDT_ERR_NOTFOUND;
  596. elems = len / sizeof(u32);
  597. if (count > elems)
  598. count = elems;
  599. for (i = 0; i < count; i++)
  600. array[i] = fdt32_to_cpu(cell[i]);
  601. return count;
  602. }
  603. const u32 *fdtdec_locate_array(const void *blob, int node,
  604. const char *prop_name, int count)
  605. {
  606. const u32 *cell;
  607. int err;
  608. cell = get_prop_check_min_len(blob, node, prop_name,
  609. sizeof(u32) * count, &err);
  610. return err ? NULL : cell;
  611. }
  612. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  613. {
  614. const s32 *cell;
  615. int len;
  616. debug("%s: %s\n", __func__, prop_name);
  617. cell = fdt_getprop(blob, node, prop_name, &len);
  618. return cell != NULL;
  619. }
  620. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  621. const char *list_name,
  622. const char *cells_name,
  623. int cell_count, int index,
  624. struct fdtdec_phandle_args *out_args)
  625. {
  626. const __be32 *list, *list_end;
  627. int rc = 0, size, cur_index = 0;
  628. uint32_t count = 0;
  629. int node = -1;
  630. int phandle;
  631. /* Retrieve the phandle list property */
  632. list = fdt_getprop(blob, src_node, list_name, &size);
  633. if (!list)
  634. return -ENOENT;
  635. list_end = list + size / sizeof(*list);
  636. /* Loop over the phandles until all the requested entry is found */
  637. while (list < list_end) {
  638. rc = -EINVAL;
  639. count = 0;
  640. /*
  641. * If phandle is 0, then it is an empty entry with no
  642. * arguments. Skip forward to the next entry.
  643. */
  644. phandle = be32_to_cpup(list++);
  645. if (phandle) {
  646. /*
  647. * Find the provider node and parse the #*-cells
  648. * property to determine the argument length.
  649. *
  650. * This is not needed if the cell count is hard-coded
  651. * (i.e. cells_name not set, but cell_count is set),
  652. * except when we're going to return the found node
  653. * below.
  654. */
  655. if (cells_name || cur_index == index) {
  656. node = fdt_node_offset_by_phandle(blob,
  657. phandle);
  658. if (node < 0) {
  659. debug("%s: could not find phandle\n",
  660. fdt_get_name(blob, src_node,
  661. NULL));
  662. goto err;
  663. }
  664. }
  665. if (cells_name) {
  666. count = fdtdec_get_int(blob, node, cells_name,
  667. -1);
  668. if (count == -1) {
  669. debug("%s: could not get %s for %s\n",
  670. fdt_get_name(blob, src_node,
  671. NULL),
  672. cells_name,
  673. fdt_get_name(blob, node,
  674. NULL));
  675. goto err;
  676. }
  677. } else {
  678. count = cell_count;
  679. }
  680. /*
  681. * Make sure that the arguments actually fit in the
  682. * remaining property data length
  683. */
  684. if (list + count > list_end) {
  685. debug("%s: arguments longer than property\n",
  686. fdt_get_name(blob, src_node, NULL));
  687. goto err;
  688. }
  689. }
  690. /*
  691. * All of the error cases above bail out of the loop, so at
  692. * this point, the parsing is successful. If the requested
  693. * index matches, then fill the out_args structure and return,
  694. * or return -ENOENT for an empty entry.
  695. */
  696. rc = -ENOENT;
  697. if (cur_index == index) {
  698. if (!phandle)
  699. goto err;
  700. if (out_args) {
  701. int i;
  702. if (count > MAX_PHANDLE_ARGS) {
  703. debug("%s: too many arguments %d\n",
  704. fdt_get_name(blob, src_node,
  705. NULL), count);
  706. count = MAX_PHANDLE_ARGS;
  707. }
  708. out_args->node = node;
  709. out_args->args_count = count;
  710. for (i = 0; i < count; i++) {
  711. out_args->args[i] =
  712. be32_to_cpup(list++);
  713. }
  714. }
  715. /* Found it! return success */
  716. return 0;
  717. }
  718. node = -1;
  719. list += count;
  720. cur_index++;
  721. }
  722. /*
  723. * Result will be one of:
  724. * -ENOENT : index is for empty phandle
  725. * -EINVAL : parsing error on data
  726. * [1..n] : Number of phandle (count mode; when index = -1)
  727. */
  728. rc = index < 0 ? cur_index : -ENOENT;
  729. err:
  730. return rc;
  731. }
  732. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  733. u8 *array, int count)
  734. {
  735. const u8 *cell;
  736. int err;
  737. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  738. if (!err)
  739. memcpy(array, cell, count);
  740. return err;
  741. }
  742. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  743. const char *prop_name, int count)
  744. {
  745. const u8 *cell;
  746. int err;
  747. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  748. if (err)
  749. return NULL;
  750. return cell;
  751. }
  752. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  753. int default_val)
  754. {
  755. int config_node;
  756. debug("%s: %s\n", __func__, prop_name);
  757. config_node = fdt_path_offset(blob, "/config");
  758. if (config_node < 0)
  759. return default_val;
  760. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  761. }
  762. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  763. {
  764. int config_node;
  765. const void *prop;
  766. debug("%s: %s\n", __func__, prop_name);
  767. config_node = fdt_path_offset(blob, "/config");
  768. if (config_node < 0)
  769. return 0;
  770. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  771. return prop != NULL;
  772. }
  773. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  774. {
  775. const char *nodep;
  776. int nodeoffset;
  777. int len;
  778. debug("%s: %s\n", __func__, prop_name);
  779. nodeoffset = fdt_path_offset(blob, "/config");
  780. if (nodeoffset < 0)
  781. return NULL;
  782. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  783. if (!nodep)
  784. return NULL;
  785. return (char *)nodep;
  786. }
  787. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  788. {
  789. u64 number = 0;
  790. while (cells--)
  791. number = (number << 32) | fdt32_to_cpu(*ptr++);
  792. return number;
  793. }
  794. int fdt_get_resource(const void *fdt, int node, const char *property,
  795. unsigned int index, struct fdt_resource *res)
  796. {
  797. const fdt32_t *ptr, *end;
  798. int na, ns, len, parent;
  799. unsigned int i = 0;
  800. parent = fdt_parent_offset(fdt, node);
  801. if (parent < 0)
  802. return parent;
  803. na = fdt_address_cells(fdt, parent);
  804. ns = fdt_size_cells(fdt, parent);
  805. ptr = fdt_getprop(fdt, node, property, &len);
  806. if (!ptr)
  807. return len;
  808. end = ptr + len / sizeof(*ptr);
  809. while (ptr + na + ns <= end) {
  810. if (i == index) {
  811. if (CONFIG_IS_ENABLED(OF_TRANSLATE))
  812. res->start = fdt_translate_address(fdt, node, ptr);
  813. else
  814. res->start = fdtdec_get_number(ptr, na);
  815. res->end = res->start;
  816. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  817. return 0;
  818. }
  819. ptr += na + ns;
  820. i++;
  821. }
  822. return -FDT_ERR_NOTFOUND;
  823. }
  824. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  825. const char *prop_names, const char *name,
  826. struct fdt_resource *res)
  827. {
  828. int index;
  829. index = fdt_stringlist_search(fdt, node, prop_names, name);
  830. if (index < 0)
  831. return index;
  832. return fdt_get_resource(fdt, node, property, index, res);
  833. }
  834. static int decode_timing_property(const void *blob, int node, const char *name,
  835. struct timing_entry *result)
  836. {
  837. int length, ret = 0;
  838. const u32 *prop;
  839. prop = fdt_getprop(blob, node, name, &length);
  840. if (!prop) {
  841. debug("%s: could not find property %s\n",
  842. fdt_get_name(blob, node, NULL), name);
  843. return length;
  844. }
  845. if (length == sizeof(u32)) {
  846. result->typ = fdtdec_get_int(blob, node, name, 0);
  847. result->min = result->typ;
  848. result->max = result->typ;
  849. } else {
  850. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  851. }
  852. return ret;
  853. }
  854. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  855. struct display_timing *dt)
  856. {
  857. int i, node, timings_node;
  858. u32 val = 0;
  859. int ret = 0;
  860. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  861. if (timings_node < 0)
  862. return timings_node;
  863. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  864. node > 0 && i != index;
  865. node = fdt_next_subnode(blob, node))
  866. i++;
  867. if (node < 0)
  868. return node;
  869. memset(dt, 0, sizeof(*dt));
  870. ret |= decode_timing_property(blob, node, "hback-porch",
  871. &dt->hback_porch);
  872. ret |= decode_timing_property(blob, node, "hfront-porch",
  873. &dt->hfront_porch);
  874. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  875. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  876. ret |= decode_timing_property(blob, node, "vback-porch",
  877. &dt->vback_porch);
  878. ret |= decode_timing_property(blob, node, "vfront-porch",
  879. &dt->vfront_porch);
  880. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  881. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  882. ret |= decode_timing_property(blob, node, "clock-frequency",
  883. &dt->pixelclock);
  884. dt->flags = 0;
  885. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  886. if (val != -1) {
  887. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  888. DISPLAY_FLAGS_VSYNC_LOW;
  889. }
  890. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  891. if (val != -1) {
  892. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  893. DISPLAY_FLAGS_HSYNC_LOW;
  894. }
  895. val = fdtdec_get_int(blob, node, "de-active", -1);
  896. if (val != -1) {
  897. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  898. DISPLAY_FLAGS_DE_LOW;
  899. }
  900. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  901. if (val != -1) {
  902. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  903. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  904. }
  905. if (fdtdec_get_bool(blob, node, "interlaced"))
  906. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  907. if (fdtdec_get_bool(blob, node, "doublescan"))
  908. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  909. if (fdtdec_get_bool(blob, node, "doubleclk"))
  910. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  911. return ret;
  912. }
  913. int fdtdec_setup_mem_size_base(void)
  914. {
  915. int ret;
  916. ofnode mem;
  917. struct resource res;
  918. mem = ofnode_path("/memory");
  919. if (!ofnode_valid(mem)) {
  920. debug("%s: Missing /memory node\n", __func__);
  921. return -EINVAL;
  922. }
  923. ret = ofnode_read_resource(mem, 0, &res);
  924. if (ret != 0) {
  925. debug("%s: Unable to decode first memory bank\n", __func__);
  926. return -EINVAL;
  927. }
  928. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  929. gd->ram_base = (unsigned long)res.start;
  930. debug("%s: Initial DRAM size %llx\n", __func__,
  931. (unsigned long long)gd->ram_size);
  932. return 0;
  933. }
  934. ofnode get_next_memory_node(ofnode mem)
  935. {
  936. do {
  937. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  938. } while (!ofnode_is_available(mem));
  939. return mem;
  940. }
  941. int fdtdec_setup_memory_banksize(void)
  942. {
  943. int bank, ret, reg = 0;
  944. struct resource res;
  945. ofnode mem = ofnode_null();
  946. mem = get_next_memory_node(mem);
  947. if (!ofnode_valid(mem)) {
  948. debug("%s: Missing /memory node\n", __func__);
  949. return -EINVAL;
  950. }
  951. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  952. ret = ofnode_read_resource(mem, reg++, &res);
  953. if (ret < 0) {
  954. reg = 0;
  955. mem = get_next_memory_node(mem);
  956. if (!ofnode_valid(mem))
  957. break;
  958. ret = ofnode_read_resource(mem, reg++, &res);
  959. if (ret < 0)
  960. break;
  961. }
  962. if (ret != 0)
  963. return -EINVAL;
  964. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  965. gd->bd->bi_dram[bank].size =
  966. (phys_size_t)(res.end - res.start + 1);
  967. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  968. __func__, bank,
  969. (unsigned long long)gd->bd->bi_dram[bank].start,
  970. (unsigned long long)gd->bd->bi_dram[bank].size);
  971. }
  972. return 0;
  973. }
  974. int fdtdec_setup_mem_size_base_lowest(void)
  975. {
  976. int bank, ret, reg = 0;
  977. struct resource res;
  978. unsigned long base;
  979. phys_size_t size;
  980. ofnode mem = ofnode_null();
  981. gd->ram_base = (unsigned long)~0;
  982. mem = get_next_memory_node(mem);
  983. if (!ofnode_valid(mem)) {
  984. debug("%s: Missing /memory node\n", __func__);
  985. return -EINVAL;
  986. }
  987. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  988. ret = ofnode_read_resource(mem, reg++, &res);
  989. if (ret < 0) {
  990. reg = 0;
  991. mem = get_next_memory_node(mem);
  992. if (!ofnode_valid(mem))
  993. break;
  994. ret = ofnode_read_resource(mem, reg++, &res);
  995. if (ret < 0)
  996. break;
  997. }
  998. if (ret != 0)
  999. return -EINVAL;
  1000. base = (unsigned long)res.start;
  1001. size = (phys_size_t)(res.end - res.start + 1);
  1002. if (gd->ram_base > base && size) {
  1003. gd->ram_base = base;
  1004. gd->ram_size = size;
  1005. debug("%s: Initial DRAM base %lx size %lx\n",
  1006. __func__, base, (unsigned long)size);
  1007. }
  1008. }
  1009. return 0;
  1010. }
  1011. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1012. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1013. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1014. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1015. {
  1016. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  1017. bool gzip = 0, lzo = 0;
  1018. ulong sz_in = sz_src;
  1019. void *dst;
  1020. int rc;
  1021. if (CONFIG_IS_ENABLED(GZIP))
  1022. if (gzip_parse_header(src, sz_in) >= 0)
  1023. gzip = 1;
  1024. if (CONFIG_IS_ENABLED(LZO))
  1025. if (!gzip && lzop_is_valid_header(src))
  1026. lzo = 1;
  1027. if (!gzip && !lzo)
  1028. return -EBADMSG;
  1029. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1030. dst = malloc(sz_out);
  1031. if (!dst) {
  1032. puts("uncompress_blob: Unable to allocate memory\n");
  1033. return -ENOMEM;
  1034. }
  1035. } else {
  1036. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1037. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1038. # else
  1039. return -ENOTSUPP;
  1040. # endif
  1041. }
  1042. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1043. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1044. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1045. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1046. else
  1047. hang();
  1048. if (rc < 0) {
  1049. /* not a valid compressed blob */
  1050. puts("uncompress_blob: Unable to uncompress\n");
  1051. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1052. free(dst);
  1053. return -EBADMSG;
  1054. }
  1055. *dstp = dst;
  1056. return 0;
  1057. }
  1058. # else
  1059. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1060. {
  1061. *dstp = (void *)src;
  1062. return 0;
  1063. }
  1064. # endif
  1065. #endif
  1066. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1067. /*
  1068. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1069. * provide and/or fixup the fdt.
  1070. */
  1071. __weak void *board_fdt_blob_setup(void)
  1072. {
  1073. void *fdt_blob = NULL;
  1074. #ifdef CONFIG_SPL_BUILD
  1075. /* FDT is at end of BSS unless it is in a different memory region */
  1076. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1077. fdt_blob = (ulong *)&_image_binary_end;
  1078. else
  1079. fdt_blob = (ulong *)&__bss_end;
  1080. #else
  1081. /* FDT is at end of image */
  1082. fdt_blob = (ulong *)&_end;
  1083. #endif
  1084. return fdt_blob;
  1085. }
  1086. #endif
  1087. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1088. {
  1089. const char *path;
  1090. int offset, err;
  1091. if (!is_valid_ethaddr(mac))
  1092. return -EINVAL;
  1093. path = fdt_get_alias(fdt, "ethernet");
  1094. if (!path)
  1095. return 0;
  1096. debug("ethernet alias found: %s\n", path);
  1097. offset = fdt_path_offset(fdt, path);
  1098. if (offset < 0) {
  1099. debug("ethernet alias points to absent node %s\n", path);
  1100. return -ENOENT;
  1101. }
  1102. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1103. if (err < 0)
  1104. return err;
  1105. debug("MAC address: %pM\n", mac);
  1106. return 0;
  1107. }
  1108. static int fdtdec_init_reserved_memory(void *blob)
  1109. {
  1110. int na, ns, node, err;
  1111. fdt32_t value;
  1112. /* inherit #address-cells and #size-cells from the root node */
  1113. na = fdt_address_cells(blob, 0);
  1114. ns = fdt_size_cells(blob, 0);
  1115. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1116. if (node < 0)
  1117. return node;
  1118. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1119. if (err < 0)
  1120. return err;
  1121. value = cpu_to_fdt32(ns);
  1122. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1123. if (err < 0)
  1124. return err;
  1125. value = cpu_to_fdt32(na);
  1126. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1127. if (err < 0)
  1128. return err;
  1129. return node;
  1130. }
  1131. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1132. const struct fdt_memory *carveout,
  1133. uint32_t *phandlep, bool no_map)
  1134. {
  1135. fdt32_t cells[4] = {}, *ptr = cells;
  1136. uint32_t upper, lower, phandle;
  1137. int parent, node, na, ns, err;
  1138. fdt_size_t size;
  1139. char name[64];
  1140. /* create an empty /reserved-memory node if one doesn't exist */
  1141. parent = fdt_path_offset(blob, "/reserved-memory");
  1142. if (parent < 0) {
  1143. parent = fdtdec_init_reserved_memory(blob);
  1144. if (parent < 0)
  1145. return parent;
  1146. }
  1147. /* only 1 or 2 #address-cells and #size-cells are supported */
  1148. na = fdt_address_cells(blob, parent);
  1149. if (na < 1 || na > 2)
  1150. return -FDT_ERR_BADNCELLS;
  1151. ns = fdt_size_cells(blob, parent);
  1152. if (ns < 1 || ns > 2)
  1153. return -FDT_ERR_BADNCELLS;
  1154. /* find a matching node and return the phandle to that */
  1155. fdt_for_each_subnode(node, blob, parent) {
  1156. const char *name = fdt_get_name(blob, node, NULL);
  1157. fdt_addr_t addr;
  1158. fdt_size_t size;
  1159. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1160. &size, false);
  1161. if (addr == FDT_ADDR_T_NONE) {
  1162. debug("failed to read address/size for %s\n", name);
  1163. continue;
  1164. }
  1165. if (addr == carveout->start && (addr + size - 1) ==
  1166. carveout->end) {
  1167. if (phandlep)
  1168. *phandlep = fdt_get_phandle(blob, node);
  1169. return 0;
  1170. }
  1171. }
  1172. /*
  1173. * Unpack the start address and generate the name of the new node
  1174. * base on the basename and the unit-address.
  1175. */
  1176. upper = upper_32_bits(carveout->start);
  1177. lower = lower_32_bits(carveout->start);
  1178. if (na > 1 && upper > 0)
  1179. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1180. lower);
  1181. else {
  1182. if (upper > 0) {
  1183. debug("address %08x:%08x exceeds addressable space\n",
  1184. upper, lower);
  1185. return -FDT_ERR_BADVALUE;
  1186. }
  1187. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1188. }
  1189. node = fdt_add_subnode(blob, parent, name);
  1190. if (node < 0)
  1191. return node;
  1192. if (phandlep) {
  1193. err = fdt_generate_phandle(blob, &phandle);
  1194. if (err < 0)
  1195. return err;
  1196. err = fdtdec_set_phandle(blob, node, phandle);
  1197. if (err < 0)
  1198. return err;
  1199. }
  1200. /* store one or two address cells */
  1201. if (na > 1)
  1202. *ptr++ = cpu_to_fdt32(upper);
  1203. *ptr++ = cpu_to_fdt32(lower);
  1204. /* store one or two size cells */
  1205. size = carveout->end - carveout->start + 1;
  1206. upper = upper_32_bits(size);
  1207. lower = lower_32_bits(size);
  1208. if (ns > 1)
  1209. *ptr++ = cpu_to_fdt32(upper);
  1210. *ptr++ = cpu_to_fdt32(lower);
  1211. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1212. if (err < 0)
  1213. return err;
  1214. if (no_map) {
  1215. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1216. if (err < 0)
  1217. return err;
  1218. }
  1219. /* return the phandle for the new node for the caller to use */
  1220. if (phandlep)
  1221. *phandlep = phandle;
  1222. return 0;
  1223. }
  1224. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1225. unsigned int index, struct fdt_memory *carveout)
  1226. {
  1227. const fdt32_t *prop;
  1228. uint32_t phandle;
  1229. int offset, len;
  1230. fdt_size_t size;
  1231. offset = fdt_path_offset(blob, node);
  1232. if (offset < 0)
  1233. return offset;
  1234. prop = fdt_getprop(blob, offset, name, &len);
  1235. if (!prop) {
  1236. debug("failed to get %s for %s\n", name, node);
  1237. return -FDT_ERR_NOTFOUND;
  1238. }
  1239. if ((len % sizeof(phandle)) != 0) {
  1240. debug("invalid phandle property\n");
  1241. return -FDT_ERR_BADPHANDLE;
  1242. }
  1243. if (len < (sizeof(phandle) * (index + 1))) {
  1244. debug("invalid phandle index\n");
  1245. return -FDT_ERR_BADPHANDLE;
  1246. }
  1247. phandle = fdt32_to_cpu(prop[index]);
  1248. offset = fdt_node_offset_by_phandle(blob, phandle);
  1249. if (offset < 0) {
  1250. debug("failed to find node for phandle %u\n", phandle);
  1251. return offset;
  1252. }
  1253. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1254. "reg", 0, &size,
  1255. true);
  1256. if (carveout->start == FDT_ADDR_T_NONE) {
  1257. debug("failed to read address/size from \"reg\" property\n");
  1258. return -FDT_ERR_NOTFOUND;
  1259. }
  1260. carveout->end = carveout->start + size - 1;
  1261. return 0;
  1262. }
  1263. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1264. unsigned int index, const char *name,
  1265. const struct fdt_memory *carveout)
  1266. {
  1267. uint32_t phandle;
  1268. int err, offset, len;
  1269. fdt32_t value;
  1270. void *prop;
  1271. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
  1272. if (err < 0) {
  1273. debug("failed to add reserved memory: %d\n", err);
  1274. return err;
  1275. }
  1276. offset = fdt_path_offset(blob, node);
  1277. if (offset < 0) {
  1278. debug("failed to find offset for node %s: %d\n", node, offset);
  1279. return offset;
  1280. }
  1281. value = cpu_to_fdt32(phandle);
  1282. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1283. if (len == -FDT_ERR_NOTFOUND)
  1284. len = 0;
  1285. else
  1286. return len;
  1287. }
  1288. if ((index + 1) * sizeof(value) > len) {
  1289. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1290. (index + 1) * sizeof(value),
  1291. &prop);
  1292. if (err < 0) {
  1293. debug("failed to resize reserved memory property: %s\n",
  1294. fdt_strerror(err));
  1295. return err;
  1296. }
  1297. }
  1298. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1299. strlen(prop_name),
  1300. index * sizeof(value),
  1301. &value, sizeof(value));
  1302. if (err < 0) {
  1303. debug("failed to update %s property for node %s: %s\n",
  1304. prop_name, node, fdt_strerror(err));
  1305. return err;
  1306. }
  1307. return 0;
  1308. }
  1309. __weak int fdtdec_board_setup(const void *fdt_blob)
  1310. {
  1311. return 0;
  1312. }
  1313. int fdtdec_setup(void)
  1314. {
  1315. int ret;
  1316. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1317. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1318. void *fdt_blob;
  1319. # endif
  1320. # ifdef CONFIG_OF_EMBED
  1321. /* Get a pointer to the FDT */
  1322. # ifdef CONFIG_SPL_BUILD
  1323. gd->fdt_blob = __dtb_dt_spl_begin;
  1324. # else
  1325. gd->fdt_blob = __dtb_dt_begin;
  1326. # endif
  1327. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1328. /* Allow the board to override the fdt address. */
  1329. gd->fdt_blob = board_fdt_blob_setup();
  1330. # elif defined(CONFIG_OF_HOSTFILE)
  1331. if (sandbox_read_fdt_from_file()) {
  1332. puts("Failed to read control FDT\n");
  1333. return -1;
  1334. }
  1335. # elif defined(CONFIG_OF_PRIOR_STAGE)
  1336. gd->fdt_blob = (void *)(uintptr_t)prior_stage_fdt_address;
  1337. # endif
  1338. # ifndef CONFIG_SPL_BUILD
  1339. /* Allow the early environment to override the fdt address */
  1340. gd->fdt_blob = map_sysmem
  1341. (env_get_ulong("fdtcontroladdr", 16,
  1342. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1343. # endif
  1344. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1345. /*
  1346. * Try and uncompress the blob.
  1347. * Unfortunately there is no way to know how big the input blob really
  1348. * is. So let us set the maximum input size arbitrarily high. 16MB
  1349. * ought to be more than enough for packed DTBs.
  1350. */
  1351. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1352. gd->fdt_blob = fdt_blob;
  1353. /*
  1354. * Check if blob is a FIT images containings DTBs.
  1355. * If so, pick the most relevant
  1356. */
  1357. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1358. if (fdt_blob) {
  1359. gd->multi_dtb_fit = gd->fdt_blob;
  1360. gd->fdt_blob = fdt_blob;
  1361. }
  1362. # endif
  1363. #endif
  1364. ret = fdtdec_prepare_fdt();
  1365. if (!ret)
  1366. ret = fdtdec_board_setup(gd->fdt_blob);
  1367. return ret;
  1368. }
  1369. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1370. int fdtdec_resetup(int *rescan)
  1371. {
  1372. void *fdt_blob;
  1373. /*
  1374. * If the current DTB is part of a compressed FIT image,
  1375. * try to locate the best match from the uncompressed
  1376. * FIT image stillpresent there. Save the time and space
  1377. * required to uncompress it again.
  1378. */
  1379. if (gd->multi_dtb_fit) {
  1380. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1381. if (fdt_blob == gd->fdt_blob) {
  1382. /*
  1383. * The best match did not change. no need to tear down
  1384. * the DM and rescan the fdt.
  1385. */
  1386. *rescan = 0;
  1387. return 0;
  1388. }
  1389. *rescan = 1;
  1390. gd->fdt_blob = fdt_blob;
  1391. return fdtdec_prepare_fdt();
  1392. }
  1393. /*
  1394. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1395. * not a FIT image containings DTB, but a single DTB. There is no need
  1396. * to teard down DM and rescan the DT in this case.
  1397. */
  1398. *rescan = 0;
  1399. return 0;
  1400. }
  1401. #endif
  1402. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1403. phys_addr_t *basep, phys_size_t *sizep,
  1404. struct bd_info *bd)
  1405. {
  1406. int addr_cells, size_cells;
  1407. const u32 *cell, *end;
  1408. u64 total_size, size, addr;
  1409. int node, child;
  1410. bool auto_size;
  1411. int bank;
  1412. int len;
  1413. debug("%s: board_id=%d\n", __func__, board_id);
  1414. if (!area)
  1415. area = "/memory";
  1416. node = fdt_path_offset(blob, area);
  1417. if (node < 0) {
  1418. debug("No %s node found\n", area);
  1419. return -ENOENT;
  1420. }
  1421. cell = fdt_getprop(blob, node, "reg", &len);
  1422. if (!cell) {
  1423. debug("No reg property found\n");
  1424. return -ENOENT;
  1425. }
  1426. addr_cells = fdt_address_cells(blob, node);
  1427. size_cells = fdt_size_cells(blob, node);
  1428. /* Check the board id and mask */
  1429. for (child = fdt_first_subnode(blob, node);
  1430. child >= 0;
  1431. child = fdt_next_subnode(blob, child)) {
  1432. int match_mask, match_value;
  1433. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1434. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1435. if (match_value >= 0 &&
  1436. ((board_id & match_mask) == match_value)) {
  1437. /* Found matching mask */
  1438. debug("Found matching mask %d\n", match_mask);
  1439. node = child;
  1440. cell = fdt_getprop(blob, node, "reg", &len);
  1441. if (!cell) {
  1442. debug("No memory-banks property found\n");
  1443. return -EINVAL;
  1444. }
  1445. break;
  1446. }
  1447. }
  1448. /* Note: if no matching subnode was found we use the parent node */
  1449. if (bd) {
  1450. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1451. CONFIG_NR_DRAM_BANKS);
  1452. }
  1453. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1454. total_size = 0;
  1455. end = cell + len / 4 - addr_cells - size_cells;
  1456. debug("cell at %p, end %p\n", cell, end);
  1457. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1458. if (cell > end)
  1459. break;
  1460. addr = 0;
  1461. if (addr_cells == 2)
  1462. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1463. addr += fdt32_to_cpu(*cell++);
  1464. if (bd)
  1465. bd->bi_dram[bank].start = addr;
  1466. if (basep && !bank)
  1467. *basep = (phys_addr_t)addr;
  1468. size = 0;
  1469. if (size_cells == 2)
  1470. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1471. size += fdt32_to_cpu(*cell++);
  1472. if (auto_size) {
  1473. u64 new_size;
  1474. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1475. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1476. if (new_size == size) {
  1477. debug("OK\n");
  1478. } else {
  1479. debug("sized to %llx\n", new_size);
  1480. size = new_size;
  1481. }
  1482. }
  1483. if (bd)
  1484. bd->bi_dram[bank].size = size;
  1485. total_size += size;
  1486. }
  1487. debug("Memory size %llu\n", total_size);
  1488. if (sizep)
  1489. *sizep = (phys_size_t)total_size;
  1490. return 0;
  1491. }
  1492. #endif /* !USE_HOSTCC */