bcm6368_nand.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. #include <common.h>
  3. #include <asm/io.h>
  4. #include <memalign.h>
  5. #include <nand.h>
  6. #include <linux/bitops.h>
  7. #include <linux/errno.h>
  8. #include <linux/io.h>
  9. #include <linux/ioport.h>
  10. #include <dm.h>
  11. #include "brcmnand.h"
  12. struct bcm6368_nand_soc {
  13. struct brcmnand_soc soc;
  14. void __iomem *base;
  15. };
  16. #define soc_to_priv(_soc) container_of(_soc, struct bcm6368_nand_soc, soc)
  17. #define BCM6368_NAND_INT 0x00
  18. #define BCM6368_NAND_STATUS_SHIFT 0
  19. #define BCM6368_NAND_STATUS_MASK (0xfff << BCM6368_NAND_STATUS_SHIFT)
  20. #define BCM6368_NAND_ENABLE_SHIFT 16
  21. #define BCM6368_NAND_ENABLE_MASK (0xffff << BCM6368_NAND_ENABLE_SHIFT)
  22. enum {
  23. BCM6368_NP_READ = BIT(0),
  24. BCM6368_BLOCK_ERASE = BIT(1),
  25. BCM6368_COPY_BACK = BIT(2),
  26. BCM6368_PAGE_PGM = BIT(3),
  27. BCM6368_CTRL_READY = BIT(4),
  28. BCM6368_DEV_RBPIN = BIT(5),
  29. BCM6368_ECC_ERR_UNC = BIT(6),
  30. BCM6368_ECC_ERR_CORR = BIT(7),
  31. };
  32. static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc)
  33. {
  34. struct bcm6368_nand_soc *priv = soc_to_priv(soc);
  35. void __iomem *mmio = priv->base + BCM6368_NAND_INT;
  36. u32 val = brcmnand_readl(mmio);
  37. if (val & (BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT)) {
  38. /* Ack interrupt */
  39. val &= ~BCM6368_NAND_STATUS_MASK;
  40. val |= BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT;
  41. brcmnand_writel(val, mmio);
  42. return true;
  43. }
  44. return false;
  45. }
  46. static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en)
  47. {
  48. struct bcm6368_nand_soc *priv = soc_to_priv(soc);
  49. void __iomem *mmio = priv->base + BCM6368_NAND_INT;
  50. u32 val = brcmnand_readl(mmio);
  51. /* Don't ack any interrupts */
  52. val &= ~BCM6368_NAND_STATUS_MASK;
  53. if (en)
  54. val |= BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT;
  55. else
  56. val &= ~(BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT);
  57. brcmnand_writel(val, mmio);
  58. }
  59. static int bcm6368_nand_probe(struct udevice *dev)
  60. {
  61. struct bcm6368_nand_soc *priv = dev_get_priv(dev);
  62. struct brcmnand_soc *soc = &priv->soc;
  63. priv->base = dev_remap_addr_name(dev, "nand-int-base");
  64. if (!priv->base)
  65. return -EINVAL;
  66. soc->ctlrdy_ack = bcm6368_nand_intc_ack;
  67. soc->ctlrdy_set_enabled = bcm6368_nand_intc_set;
  68. /* Disable and ack all interrupts */
  69. brcmnand_writel(0, priv->base + BCM6368_NAND_INT);
  70. brcmnand_writel(BCM6368_NAND_STATUS_MASK,
  71. priv->base + BCM6368_NAND_INT);
  72. return brcmnand_probe(dev, soc);
  73. }
  74. static const struct udevice_id bcm6368_nand_dt_ids[] = {
  75. {
  76. .compatible = "brcm,nand-bcm6368",
  77. },
  78. { /* sentinel */ }
  79. };
  80. U_BOOT_DRIVER(bcm6368_nand) = {
  81. .name = "bcm6368-nand",
  82. .id = UCLASS_MTD,
  83. .of_match = bcm6368_nand_dt_ids,
  84. .probe = bcm6368_nand_probe,
  85. .priv_auto = sizeof(struct bcm6368_nand_soc),
  86. };
  87. void board_nand_init(void)
  88. {
  89. struct udevice *dev;
  90. int ret;
  91. ret = uclass_get_device_by_driver(UCLASS_MTD,
  92. DM_DRIVER_GET(bcm6368_nand), &dev);
  93. if (ret && ret != -ENODEV)
  94. pr_err("Failed to initialize %s. (error %d)\n", dev->name,
  95. ret);
  96. }