stm32prog.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <command.h>
  6. #include <console.h>
  7. #include <dfu.h>
  8. #include <malloc.h>
  9. #include <misc.h>
  10. #include <mmc.h>
  11. #include <part.h>
  12. #include <asm/arch/stm32mp1_smc.h>
  13. #include <dm/uclass.h>
  14. #include <jffs2/load_kernel.h>
  15. #include <linux/list.h>
  16. #include <linux/list_sort.h>
  17. #include <linux/mtd/mtd.h>
  18. #include <linux/sizes.h>
  19. #include "stm32prog.h"
  20. /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
  21. #define GPT_HEADER_SZ 34
  22. #define OPT_SELECT BIT(0)
  23. #define OPT_EMPTY BIT(1)
  24. #define OPT_DELETE BIT(2)
  25. #define IS_SELECT(part) ((part)->option & OPT_SELECT)
  26. #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
  27. #define IS_DELETE(part) ((part)->option & OPT_DELETE)
  28. #define ALT_BUF_LEN SZ_1K
  29. #define ROOTFS_MMC0_UUID \
  30. EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
  31. 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
  32. #define ROOTFS_MMC1_UUID \
  33. EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
  34. 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
  35. #define ROOTFS_MMC2_UUID \
  36. EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
  37. 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
  38. /* RAW parttion (binary / bootloader) used Linux - reserved UUID */
  39. #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
  40. /*
  41. * unique partition guid (uuid) for partition named "rootfs"
  42. * on each MMC instance = SD Card or eMMC
  43. * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
  44. */
  45. static const efi_guid_t uuid_mmc[3] = {
  46. ROOTFS_MMC0_UUID,
  47. ROOTFS_MMC1_UUID,
  48. ROOTFS_MMC2_UUID
  49. };
  50. DECLARE_GLOBAL_DATA_PTR;
  51. /* order of column in flash layout file */
  52. enum stm32prog_col_t {
  53. COL_OPTION,
  54. COL_ID,
  55. COL_NAME,
  56. COL_TYPE,
  57. COL_IP,
  58. COL_OFFSET,
  59. COL_NB_STM32
  60. };
  61. /* partition handling routines : CONFIG_CMD_MTDPARTS */
  62. int mtdparts_init(void);
  63. int find_dev_and_part(const char *id, struct mtd_device **dev,
  64. u8 *part_num, struct part_info **part);
  65. char *stm32prog_get_error(struct stm32prog_data *data)
  66. {
  67. static const char error_msg[] = "Unspecified";
  68. if (strlen(data->error) == 0)
  69. strcpy(data->error, error_msg);
  70. return data->error;
  71. }
  72. u8 stm32prog_header_check(struct raw_header_s *raw_header,
  73. struct image_header_s *header)
  74. {
  75. unsigned int i;
  76. header->present = 0;
  77. header->image_checksum = 0x0;
  78. header->image_length = 0x0;
  79. if (!raw_header || !header) {
  80. pr_debug("%s:no header data\n", __func__);
  81. return -1;
  82. }
  83. if (raw_header->magic_number !=
  84. (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
  85. pr_debug("%s:invalid magic number : 0x%x\n",
  86. __func__, raw_header->magic_number);
  87. return -2;
  88. }
  89. /* only header v1.0 supported */
  90. if (raw_header->header_version != 0x00010000) {
  91. pr_debug("%s:invalid header version : 0x%x\n",
  92. __func__, raw_header->header_version);
  93. return -3;
  94. }
  95. if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
  96. pr_debug("%s:invalid reserved field\n", __func__);
  97. return -4;
  98. }
  99. for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
  100. if (raw_header->padding[i] != 0) {
  101. pr_debug("%s:invalid padding field\n", __func__);
  102. return -5;
  103. }
  104. }
  105. header->present = 1;
  106. header->image_checksum = le32_to_cpu(raw_header->image_checksum);
  107. header->image_length = le32_to_cpu(raw_header->image_length);
  108. return 0;
  109. }
  110. static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
  111. {
  112. u32 i, checksum;
  113. u8 *payload;
  114. /* compute checksum on payload */
  115. payload = (u8 *)addr;
  116. checksum = 0;
  117. for (i = header->image_length; i > 0; i--)
  118. checksum += *(payload++);
  119. return checksum;
  120. }
  121. /* FLASHLAYOUT PARSING *****************************************/
  122. static int parse_option(struct stm32prog_data *data,
  123. int i, char *p, struct stm32prog_part_t *part)
  124. {
  125. int result = 0;
  126. char *c = p;
  127. part->option = 0;
  128. if (!strcmp(p, "-"))
  129. return 0;
  130. while (*c) {
  131. switch (*c) {
  132. case 'P':
  133. part->option |= OPT_SELECT;
  134. break;
  135. case 'E':
  136. part->option |= OPT_EMPTY;
  137. break;
  138. case 'D':
  139. part->option |= OPT_DELETE;
  140. break;
  141. default:
  142. result = -EINVAL;
  143. stm32prog_err("Layout line %d: invalid option '%c' in %s)",
  144. i, *c, p);
  145. return -EINVAL;
  146. }
  147. c++;
  148. }
  149. if (!(part->option & OPT_SELECT)) {
  150. stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
  151. return -EINVAL;
  152. }
  153. return result;
  154. }
  155. static int parse_id(struct stm32prog_data *data,
  156. int i, char *p, struct stm32prog_part_t *part)
  157. {
  158. int result = 0;
  159. unsigned long value;
  160. result = strict_strtoul(p, 0, &value);
  161. part->id = value;
  162. if (result || value > PHASE_LAST_USER) {
  163. stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
  164. result = -EINVAL;
  165. }
  166. return result;
  167. }
  168. static int parse_name(struct stm32prog_data *data,
  169. int i, char *p, struct stm32prog_part_t *part)
  170. {
  171. int result = 0;
  172. if (strlen(p) < sizeof(part->name)) {
  173. strcpy(part->name, p);
  174. } else {
  175. stm32prog_err("Layout line %d: partition name too long [%d]: %s",
  176. i, strlen(p), p);
  177. result = -EINVAL;
  178. }
  179. return result;
  180. }
  181. static int parse_type(struct stm32prog_data *data,
  182. int i, char *p, struct stm32prog_part_t *part)
  183. {
  184. int result = 0;
  185. int len = 0;
  186. part->bin_nb = 0;
  187. if (!strncmp(p, "Binary", 6)) {
  188. part->part_type = PART_BINARY;
  189. /* search for Binary(X) case */
  190. len = strlen(p);
  191. part->bin_nb = 1;
  192. if (len > 6) {
  193. if (len < 8 ||
  194. (p[6] != '(') ||
  195. (p[len - 1] != ')'))
  196. result = -EINVAL;
  197. else
  198. part->bin_nb =
  199. simple_strtoul(&p[7], NULL, 10);
  200. }
  201. } else if (!strcmp(p, "System")) {
  202. part->part_type = PART_SYSTEM;
  203. } else if (!strcmp(p, "FileSystem")) {
  204. part->part_type = PART_FILESYSTEM;
  205. } else if (!strcmp(p, "RawImage")) {
  206. part->part_type = RAW_IMAGE;
  207. } else {
  208. result = -EINVAL;
  209. }
  210. if (result)
  211. stm32prog_err("Layout line %d: type parsing error : '%s'",
  212. i, p);
  213. return result;
  214. }
  215. static int parse_ip(struct stm32prog_data *data,
  216. int i, char *p, struct stm32prog_part_t *part)
  217. {
  218. int result = 0;
  219. unsigned int len = 0;
  220. part->dev_id = 0;
  221. if (!strcmp(p, "none")) {
  222. part->target = STM32PROG_NONE;
  223. } else if (!strncmp(p, "mmc", 3)) {
  224. part->target = STM32PROG_MMC;
  225. len = 3;
  226. } else if (!strncmp(p, "nor", 3)) {
  227. part->target = STM32PROG_NOR;
  228. len = 3;
  229. } else if (!strncmp(p, "nand", 4)) {
  230. part->target = STM32PROG_NAND;
  231. len = 4;
  232. } else if (!strncmp(p, "spi-nand", 8)) {
  233. part->target = STM32PROG_SPI_NAND;
  234. len = 8;
  235. } else if (!strncmp(p, "ram", 3)) {
  236. part->target = STM32PROG_RAM;
  237. len = 0;
  238. } else {
  239. result = -EINVAL;
  240. }
  241. if (len) {
  242. /* only one digit allowed for device id */
  243. if (strlen(p) != len + 1) {
  244. result = -EINVAL;
  245. } else {
  246. part->dev_id = p[len] - '0';
  247. if (part->dev_id > 9)
  248. result = -EINVAL;
  249. }
  250. }
  251. if (result)
  252. stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
  253. return result;
  254. }
  255. static int parse_offset(struct stm32prog_data *data,
  256. int i, char *p, struct stm32prog_part_t *part)
  257. {
  258. int result = 0;
  259. char *tail;
  260. part->part_id = 0;
  261. part->addr = 0;
  262. part->size = 0;
  263. /* eMMC boot parttion */
  264. if (!strncmp(p, "boot", 4)) {
  265. if (strlen(p) != 5) {
  266. result = -EINVAL;
  267. } else {
  268. if (p[4] == '1')
  269. part->part_id = -1;
  270. else if (p[4] == '2')
  271. part->part_id = -2;
  272. else
  273. result = -EINVAL;
  274. }
  275. if (result)
  276. stm32prog_err("Layout line %d: invalid part '%s'",
  277. i, p);
  278. } else {
  279. part->addr = simple_strtoull(p, &tail, 0);
  280. if (tail == p || *tail != '\0') {
  281. stm32prog_err("Layout line %d: invalid offset '%s'",
  282. i, p);
  283. result = -EINVAL;
  284. }
  285. }
  286. return result;
  287. }
  288. static
  289. int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
  290. struct stm32prog_part_t *part) = {
  291. [COL_OPTION] = parse_option,
  292. [COL_ID] = parse_id,
  293. [COL_NAME] = parse_name,
  294. [COL_TYPE] = parse_type,
  295. [COL_IP] = parse_ip,
  296. [COL_OFFSET] = parse_offset,
  297. };
  298. static int parse_flash_layout(struct stm32prog_data *data,
  299. ulong addr,
  300. ulong size)
  301. {
  302. int column = 0, part_nb = 0, ret;
  303. bool end_of_line, eof;
  304. char *p, *start, *last, *col;
  305. struct stm32prog_part_t *part;
  306. int part_list_size;
  307. int i;
  308. data->part_nb = 0;
  309. /* check if STM32image is detected */
  310. if (!stm32prog_header_check((struct raw_header_s *)addr,
  311. &data->header)) {
  312. u32 checksum;
  313. addr = addr + BL_HEADER_SIZE;
  314. size = data->header.image_length;
  315. checksum = stm32prog_header_checksum(addr, &data->header);
  316. if (checksum != data->header.image_checksum) {
  317. stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
  318. checksum, data->header.image_checksum);
  319. return -EIO;
  320. }
  321. }
  322. if (!size)
  323. return -EINVAL;
  324. start = (char *)addr;
  325. last = start + size;
  326. *last = 0x0; /* force null terminated string */
  327. pr_debug("flash layout =\n%s\n", start);
  328. /* calculate expected number of partitions */
  329. part_list_size = 1;
  330. p = start;
  331. while (*p && (p < last)) {
  332. if (*p++ == '\n') {
  333. part_list_size++;
  334. if (p < last && *p == '#')
  335. part_list_size--;
  336. }
  337. }
  338. if (part_list_size > PHASE_LAST_USER) {
  339. stm32prog_err("Layout: too many partition (%d)",
  340. part_list_size);
  341. return -1;
  342. }
  343. part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
  344. if (!part) {
  345. stm32prog_err("Layout: alloc failed");
  346. return -ENOMEM;
  347. }
  348. data->part_array = part;
  349. /* main parsing loop */
  350. i = 1;
  351. eof = false;
  352. p = start;
  353. col = start; /* 1st column */
  354. end_of_line = false;
  355. while (!eof) {
  356. switch (*p) {
  357. /* CR is ignored and replaced by NULL character */
  358. case '\r':
  359. *p = '\0';
  360. p++;
  361. continue;
  362. case '\0':
  363. end_of_line = true;
  364. eof = true;
  365. break;
  366. case '\n':
  367. end_of_line = true;
  368. break;
  369. case '\t':
  370. break;
  371. case '#':
  372. /* comment line is skipped */
  373. if (column == 0 && p == col) {
  374. while ((p < last) && *p)
  375. if (*p++ == '\n')
  376. break;
  377. col = p;
  378. i++;
  379. if (p >= last || !*p) {
  380. eof = true;
  381. end_of_line = true;
  382. }
  383. continue;
  384. }
  385. /* fall through */
  386. /* by default continue with the next character */
  387. default:
  388. p++;
  389. continue;
  390. }
  391. /* replace by \0: allow string parsing for each column */
  392. *p = '\0';
  393. p++;
  394. if (p >= last) {
  395. eof = true;
  396. end_of_line = true;
  397. }
  398. /* skip empty line and multiple TAB in tsv file */
  399. if (strlen(col) == 0) {
  400. col = p;
  401. /* skip empty line */
  402. if (column == 0 && end_of_line) {
  403. end_of_line = false;
  404. i++;
  405. }
  406. continue;
  407. }
  408. if (column < COL_NB_STM32) {
  409. ret = parse[column](data, i, col, part);
  410. if (ret)
  411. return ret;
  412. }
  413. /* save the beginning of the next column */
  414. column++;
  415. col = p;
  416. if (!end_of_line)
  417. continue;
  418. /* end of the line detected */
  419. end_of_line = false;
  420. if (column < COL_NB_STM32) {
  421. stm32prog_err("Layout line %d: no enought column", i);
  422. return -EINVAL;
  423. }
  424. column = 0;
  425. part_nb++;
  426. part++;
  427. i++;
  428. if (part_nb >= part_list_size) {
  429. part = NULL;
  430. if (!eof) {
  431. stm32prog_err("Layout: no enought memory for %d part",
  432. part_nb);
  433. return -EINVAL;
  434. }
  435. }
  436. }
  437. data->part_nb = part_nb;
  438. if (data->part_nb == 0) {
  439. stm32prog_err("Layout: no partition found");
  440. return -ENODEV;
  441. }
  442. return 0;
  443. }
  444. static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
  445. {
  446. struct stm32prog_part_t *parta, *partb;
  447. parta = container_of(a, struct stm32prog_part_t, list);
  448. partb = container_of(b, struct stm32prog_part_t, list);
  449. if (parta->part_id != partb->part_id)
  450. return parta->part_id - partb->part_id;
  451. else
  452. return parta->addr > partb->addr ? 1 : -1;
  453. }
  454. static void get_mtd_by_target(char *string, enum stm32prog_target target,
  455. int dev_id)
  456. {
  457. const char *dev_str;
  458. switch (target) {
  459. case STM32PROG_NOR:
  460. dev_str = "nor";
  461. break;
  462. case STM32PROG_NAND:
  463. dev_str = "nand";
  464. break;
  465. case STM32PROG_SPI_NAND:
  466. dev_str = "spi-nand";
  467. break;
  468. default:
  469. dev_str = "invalid";
  470. break;
  471. }
  472. sprintf(string, "%s%d", dev_str, dev_id);
  473. }
  474. static int init_device(struct stm32prog_data *data,
  475. struct stm32prog_dev_t *dev)
  476. {
  477. struct mmc *mmc = NULL;
  478. struct blk_desc *block_dev = NULL;
  479. struct mtd_info *mtd = NULL;
  480. char mtd_id[16];
  481. int part_id;
  482. int ret;
  483. u64 first_addr = 0, last_addr = 0;
  484. struct stm32prog_part_t *part, *next_part;
  485. u64 part_addr, part_size;
  486. bool part_found;
  487. const char *part_name;
  488. switch (dev->target) {
  489. case STM32PROG_MMC:
  490. if (!IS_ENABLED(CONFIG_MMC)) {
  491. stm32prog_err("unknown device type = %d", dev->target);
  492. return -ENODEV;
  493. }
  494. mmc = find_mmc_device(dev->dev_id);
  495. if (!mmc || mmc_init(mmc)) {
  496. stm32prog_err("mmc device %d not found", dev->dev_id);
  497. return -ENODEV;
  498. }
  499. block_dev = mmc_get_blk_desc(mmc);
  500. if (!block_dev) {
  501. stm32prog_err("mmc device %d not probed", dev->dev_id);
  502. return -ENODEV;
  503. }
  504. dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
  505. dev->mmc = mmc;
  506. /* reserve a full erase group for each GTP headers */
  507. if (mmc->erase_grp_size > GPT_HEADER_SZ) {
  508. first_addr = dev->erase_size;
  509. last_addr = (u64)(block_dev->lba -
  510. mmc->erase_grp_size) *
  511. block_dev->blksz;
  512. } else {
  513. first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
  514. last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
  515. block_dev->blksz;
  516. }
  517. pr_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
  518. block_dev->lba, block_dev->blksz);
  519. pr_debug(" available address = 0x%llx..0x%llx\n",
  520. first_addr, last_addr);
  521. pr_debug(" full_update = %d\n", dev->full_update);
  522. break;
  523. case STM32PROG_NOR:
  524. case STM32PROG_NAND:
  525. case STM32PROG_SPI_NAND:
  526. if (!IS_ENABLED(CONFIG_MTD)) {
  527. stm32prog_err("unknown device type = %d", dev->target);
  528. return -ENODEV;
  529. }
  530. get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
  531. pr_debug("%s\n", mtd_id);
  532. mtdparts_init();
  533. mtd = get_mtd_device_nm(mtd_id);
  534. if (IS_ERR(mtd)) {
  535. stm32prog_err("MTD device %s not found", mtd_id);
  536. return -ENODEV;
  537. }
  538. first_addr = 0;
  539. last_addr = mtd->size;
  540. dev->erase_size = mtd->erasesize;
  541. pr_debug("MTD device %s: size=%lld erasesize=%d\n",
  542. mtd_id, mtd->size, mtd->erasesize);
  543. pr_debug(" available address = 0x%llx..0x%llx\n",
  544. first_addr, last_addr);
  545. dev->mtd = mtd;
  546. break;
  547. case STM32PROG_RAM:
  548. first_addr = gd->bd->bi_dram[0].start;
  549. last_addr = first_addr + gd->bd->bi_dram[0].size;
  550. dev->erase_size = 1;
  551. break;
  552. default:
  553. stm32prog_err("unknown device type = %d", dev->target);
  554. return -ENODEV;
  555. }
  556. pr_debug(" erase size = 0x%x\n", dev->erase_size);
  557. pr_debug(" full_update = %d\n", dev->full_update);
  558. /* order partition list in offset order */
  559. list_sort(NULL, &dev->part_list, &part_cmp);
  560. part_id = 1;
  561. pr_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
  562. list_for_each_entry(part, &dev->part_list, list) {
  563. if (part->bin_nb > 1) {
  564. if ((dev->target != STM32PROG_NAND &&
  565. dev->target != STM32PROG_SPI_NAND) ||
  566. part->id >= PHASE_FIRST_USER ||
  567. strncmp(part->name, "fsbl", 4)) {
  568. stm32prog_err("%s (0x%x): multiple binary %d not supported",
  569. part->name, part->id,
  570. part->bin_nb);
  571. return -EINVAL;
  572. }
  573. }
  574. if (part->part_type == RAW_IMAGE) {
  575. part->part_id = 0x0;
  576. part->addr = 0x0;
  577. if (block_dev)
  578. part->size = block_dev->lba * block_dev->blksz;
  579. else
  580. part->size = last_addr;
  581. pr_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
  582. part->option, part->id, part->name,
  583. part->part_type, part->bin_nb, part->target,
  584. part->dev_id, part->addr, part->size);
  585. continue;
  586. }
  587. if (part->part_id < 0) { /* boot hw partition for eMMC */
  588. if (mmc) {
  589. part->size = mmc->capacity_boot;
  590. } else {
  591. stm32prog_err("%s (0x%x): hw partition not expected : %d",
  592. part->name, part->id,
  593. part->part_id);
  594. return -ENODEV;
  595. }
  596. } else {
  597. part->part_id = part_id++;
  598. /* last partition : size to the end of the device */
  599. if (part->list.next != &dev->part_list) {
  600. next_part =
  601. container_of(part->list.next,
  602. struct stm32prog_part_t,
  603. list);
  604. if (part->addr < next_part->addr) {
  605. part->size = next_part->addr -
  606. part->addr;
  607. } else {
  608. stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
  609. part->name, part->id,
  610. part->addr,
  611. next_part->name,
  612. next_part->id,
  613. next_part->addr);
  614. return -EINVAL;
  615. }
  616. } else {
  617. if (part->addr <= last_addr) {
  618. part->size = last_addr - part->addr;
  619. } else {
  620. stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
  621. part->name, part->id,
  622. part->addr, last_addr);
  623. return -EINVAL;
  624. }
  625. }
  626. if (part->addr < first_addr) {
  627. stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
  628. part->name, part->id,
  629. part->addr, first_addr);
  630. return -EINVAL;
  631. }
  632. }
  633. if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
  634. stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
  635. part->name, part->id, part->addr,
  636. part->dev->erase_size);
  637. return -EINVAL;
  638. }
  639. pr_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
  640. part->part_id, part->option, part->id, part->name,
  641. part->part_type, part->bin_nb, part->target,
  642. part->dev_id, part->addr, part->size);
  643. part_addr = 0;
  644. part_size = 0;
  645. part_found = false;
  646. /* check coherency with existing partition */
  647. if (block_dev) {
  648. /*
  649. * block devices with GPT: check user partition size
  650. * only for partial update, the GPT partions are be
  651. * created for full update
  652. */
  653. if (dev->full_update || part->part_id < 0) {
  654. pr_debug("\n");
  655. continue;
  656. }
  657. struct disk_partition partinfo;
  658. ret = part_get_info(block_dev, part->part_id,
  659. &partinfo);
  660. if (ret) {
  661. stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
  662. part->name, part->id,
  663. part_id, part->dev_id);
  664. return -ENODEV;
  665. }
  666. part_addr = (u64)partinfo.start * partinfo.blksz;
  667. part_size = (u64)partinfo.size * partinfo.blksz;
  668. part_name = (char *)partinfo.name;
  669. part_found = true;
  670. }
  671. if (IS_ENABLED(CONFIG_MTD) && mtd) {
  672. char mtd_part_id[32];
  673. struct part_info *mtd_part;
  674. struct mtd_device *mtd_dev;
  675. u8 part_num;
  676. sprintf(mtd_part_id, "%s,%d", mtd_id,
  677. part->part_id - 1);
  678. ret = find_dev_and_part(mtd_part_id, &mtd_dev,
  679. &part_num, &mtd_part);
  680. if (ret != 0) {
  681. stm32prog_err("%s (0x%x): Invalid MTD partition %s",
  682. part->name, part->id,
  683. mtd_part_id);
  684. return -ENODEV;
  685. }
  686. part_addr = mtd_part->offset;
  687. part_size = mtd_part->size;
  688. part_name = mtd_part->name;
  689. part_found = true;
  690. }
  691. /* no partition for this device */
  692. if (!part_found) {
  693. pr_debug("\n");
  694. continue;
  695. }
  696. pr_debug(" %08llx %08llx\n", part_addr, part_size);
  697. if (part->addr != part_addr) {
  698. stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
  699. part->name, part->id, part->part_id,
  700. part_name, part->addr, part_addr);
  701. return -ENODEV;
  702. }
  703. if (part->size != part_size) {
  704. stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
  705. part->name, part->id, part->part_id,
  706. part_name, part->addr, part->size,
  707. part_size);
  708. return -ENODEV;
  709. }
  710. }
  711. return 0;
  712. }
  713. static int treat_partition_list(struct stm32prog_data *data)
  714. {
  715. int i, j;
  716. struct stm32prog_part_t *part;
  717. for (j = 0; j < STM32PROG_MAX_DEV; j++) {
  718. data->dev[j].target = STM32PROG_NONE;
  719. INIT_LIST_HEAD(&data->dev[j].part_list);
  720. }
  721. data->tee_detected = false;
  722. data->fsbl_nor_detected = false;
  723. for (i = 0; i < data->part_nb; i++) {
  724. part = &data->part_array[i];
  725. part->alt_id = -1;
  726. /* skip partition with IP="none" */
  727. if (part->target == STM32PROG_NONE) {
  728. if (IS_SELECT(part)) {
  729. stm32prog_err("Layout: selected none phase = 0x%x",
  730. part->id);
  731. return -EINVAL;
  732. }
  733. continue;
  734. }
  735. if (part->id == PHASE_FLASHLAYOUT ||
  736. part->id > PHASE_LAST_USER) {
  737. stm32prog_err("Layout: invalid phase = 0x%x",
  738. part->id);
  739. return -EINVAL;
  740. }
  741. for (j = i + 1; j < data->part_nb; j++) {
  742. if (part->id == data->part_array[j].id) {
  743. stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
  744. part->id, i, j);
  745. return -EINVAL;
  746. }
  747. }
  748. for (j = 0; j < STM32PROG_MAX_DEV; j++) {
  749. if (data->dev[j].target == STM32PROG_NONE) {
  750. /* new device found */
  751. data->dev[j].target = part->target;
  752. data->dev[j].dev_id = part->dev_id;
  753. data->dev[j].full_update = true;
  754. data->dev_nb++;
  755. break;
  756. } else if ((part->target == data->dev[j].target) &&
  757. (part->dev_id == data->dev[j].dev_id)) {
  758. break;
  759. }
  760. }
  761. if (j == STM32PROG_MAX_DEV) {
  762. stm32prog_err("Layout: too many device");
  763. return -EINVAL;
  764. }
  765. switch (part->target) {
  766. case STM32PROG_NOR:
  767. if (!data->fsbl_nor_detected &&
  768. !strncmp(part->name, "fsbl", 4))
  769. data->fsbl_nor_detected = true;
  770. /* fallthrough */
  771. case STM32PROG_NAND:
  772. case STM32PROG_SPI_NAND:
  773. if (!data->tee_detected &&
  774. !strncmp(part->name, "tee", 3))
  775. data->tee_detected = true;
  776. break;
  777. default:
  778. break;
  779. }
  780. part->dev = &data->dev[j];
  781. if (!IS_SELECT(part))
  782. part->dev->full_update = false;
  783. list_add_tail(&part->list, &data->dev[j].part_list);
  784. }
  785. return 0;
  786. }
  787. static int create_gpt_partitions(struct stm32prog_data *data)
  788. {
  789. int offset = 0;
  790. const int buflen = SZ_8K;
  791. char *buf;
  792. char uuid[UUID_STR_LEN + 1];
  793. unsigned char *uuid_bin;
  794. unsigned int mmc_id;
  795. int i;
  796. bool rootfs_found;
  797. struct stm32prog_part_t *part;
  798. buf = malloc(buflen);
  799. if (!buf)
  800. return -ENOMEM;
  801. puts("partitions : ");
  802. /* initialize the selected device */
  803. for (i = 0; i < data->dev_nb; i++) {
  804. /* create gpt partition support only for full update on MMC */
  805. if (data->dev[i].target != STM32PROG_MMC ||
  806. !data->dev[i].full_update)
  807. continue;
  808. offset = 0;
  809. rootfs_found = false;
  810. memset(buf, 0, buflen);
  811. list_for_each_entry(part, &data->dev[i].part_list, list) {
  812. /* skip eMMC boot partitions */
  813. if (part->part_id < 0)
  814. continue;
  815. /* skip Raw Image */
  816. if (part->part_type == RAW_IMAGE)
  817. continue;
  818. if (offset + 100 > buflen) {
  819. pr_debug("\n%s: buffer too small, %s skippped",
  820. __func__, part->name);
  821. continue;
  822. }
  823. if (!offset)
  824. offset += sprintf(buf, "gpt write mmc %d \"",
  825. data->dev[i].dev_id);
  826. offset += snprintf(buf + offset, buflen - offset,
  827. "name=%s,start=0x%llx,size=0x%llx",
  828. part->name,
  829. part->addr,
  830. part->size);
  831. if (part->part_type == PART_BINARY)
  832. offset += snprintf(buf + offset,
  833. buflen - offset,
  834. ",type="
  835. LINUX_RESERVED_UUID);
  836. else
  837. offset += snprintf(buf + offset,
  838. buflen - offset,
  839. ",type=linux");
  840. if (part->part_type == PART_SYSTEM)
  841. offset += snprintf(buf + offset,
  842. buflen - offset,
  843. ",bootable");
  844. if (!rootfs_found && !strcmp(part->name, "rootfs")) {
  845. mmc_id = part->dev_id;
  846. rootfs_found = true;
  847. if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
  848. uuid_bin =
  849. (unsigned char *)uuid_mmc[mmc_id].b;
  850. uuid_bin_to_str(uuid_bin, uuid,
  851. UUID_STR_FORMAT_GUID);
  852. offset += snprintf(buf + offset,
  853. buflen - offset,
  854. ",uuid=%s", uuid);
  855. }
  856. }
  857. offset += snprintf(buf + offset, buflen - offset, ";");
  858. }
  859. if (offset) {
  860. offset += snprintf(buf + offset, buflen - offset, "\"");
  861. pr_debug("\ncmd: %s\n", buf);
  862. if (run_command(buf, 0)) {
  863. stm32prog_err("GPT partitionning fail: %s",
  864. buf);
  865. free(buf);
  866. return -1;
  867. }
  868. }
  869. if (data->dev[i].mmc)
  870. part_init(mmc_get_blk_desc(data->dev[i].mmc));
  871. #ifdef DEBUG
  872. sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
  873. pr_debug("\ncmd: %s", buf);
  874. if (run_command(buf, 0))
  875. printf("fail !\n");
  876. else
  877. printf("OK\n");
  878. sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
  879. run_command(buf, 0);
  880. #endif
  881. }
  882. puts("done\n");
  883. #ifdef DEBUG
  884. run_command("mtd list", 0);
  885. #endif
  886. free(buf);
  887. return 0;
  888. }
  889. static int stm32prog_alt_add(struct stm32prog_data *data,
  890. struct dfu_entity *dfu,
  891. struct stm32prog_part_t *part)
  892. {
  893. int ret = 0;
  894. int offset = 0;
  895. char devstr[10];
  896. char dfustr[10];
  897. char buf[ALT_BUF_LEN];
  898. u32 size;
  899. char multiplier, type;
  900. /* max 3 digit for sector size */
  901. if (part->size > SZ_1M) {
  902. size = (u32)(part->size / SZ_1M);
  903. multiplier = 'M';
  904. } else if (part->size > SZ_1K) {
  905. size = (u32)(part->size / SZ_1K);
  906. multiplier = 'K';
  907. } else {
  908. size = (u32)part->size;
  909. multiplier = 'B';
  910. }
  911. if (IS_SELECT(part) && !IS_EMPTY(part))
  912. type = 'e'; /*Readable and Writeable*/
  913. else
  914. type = 'a';/*Readable*/
  915. memset(buf, 0, sizeof(buf));
  916. offset = snprintf(buf, ALT_BUF_LEN - offset,
  917. "@%s/0x%02x/1*%d%c%c ",
  918. part->name, part->id,
  919. size, multiplier, type);
  920. if (part->target == STM32PROG_RAM) {
  921. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  922. "ram 0x%llx 0x%llx",
  923. part->addr, part->size);
  924. } else if (part->part_type == RAW_IMAGE) {
  925. u64 dfu_size;
  926. if (part->dev->target == STM32PROG_MMC)
  927. dfu_size = part->size / part->dev->mmc->read_bl_len;
  928. else
  929. dfu_size = part->size;
  930. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  931. "raw 0x0 0x%llx", dfu_size);
  932. } else if (part->part_id < 0) {
  933. u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
  934. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  935. "raw 0x%llx 0x%llx",
  936. part->addr, nb_blk);
  937. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  938. " mmcpart %d;", -(part->part_id));
  939. } else {
  940. if (part->part_type == PART_SYSTEM &&
  941. (part->target == STM32PROG_NAND ||
  942. part->target == STM32PROG_NOR ||
  943. part->target == STM32PROG_SPI_NAND))
  944. offset += snprintf(buf + offset,
  945. ALT_BUF_LEN - offset,
  946. "partubi");
  947. else
  948. offset += snprintf(buf + offset,
  949. ALT_BUF_LEN - offset,
  950. "part");
  951. /* dev_id requested by DFU MMC */
  952. if (part->target == STM32PROG_MMC)
  953. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  954. " %d", part->dev_id);
  955. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  956. " %d;", part->part_id);
  957. }
  958. ret = -ENODEV;
  959. switch (part->target) {
  960. case STM32PROG_MMC:
  961. if (IS_ENABLED(CONFIG_MMC)) {
  962. ret = 0;
  963. sprintf(dfustr, "mmc");
  964. sprintf(devstr, "%d", part->dev_id);
  965. }
  966. break;
  967. case STM32PROG_NAND:
  968. case STM32PROG_NOR:
  969. case STM32PROG_SPI_NAND:
  970. if (IS_ENABLED(CONFIG_MTD)) {
  971. ret = 0;
  972. sprintf(dfustr, "mtd");
  973. get_mtd_by_target(devstr, part->target, part->dev_id);
  974. }
  975. break;
  976. case STM32PROG_RAM:
  977. ret = 0;
  978. sprintf(dfustr, "ram");
  979. sprintf(devstr, "0");
  980. break;
  981. default:
  982. break;
  983. }
  984. if (ret) {
  985. stm32prog_err("invalid target: %d", part->target);
  986. return ret;
  987. }
  988. pr_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
  989. ret = dfu_alt_add(dfu, dfustr, devstr, buf);
  990. pr_debug("dfu_alt_add(%s,%s,%s) result %d\n",
  991. dfustr, devstr, buf, ret);
  992. return ret;
  993. }
  994. static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
  995. char *name, int phase, int size)
  996. {
  997. int ret = 0;
  998. char devstr[4];
  999. char buf[ALT_BUF_LEN];
  1000. sprintf(devstr, "%d", phase);
  1001. sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
  1002. ret = dfu_alt_add(dfu, "virt", devstr, buf);
  1003. pr_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
  1004. return ret;
  1005. }
  1006. static int dfu_init_entities(struct stm32prog_data *data)
  1007. {
  1008. int ret = 0;
  1009. int phase, i, alt_id;
  1010. struct stm32prog_part_t *part;
  1011. struct dfu_entity *dfu;
  1012. int alt_nb;
  1013. alt_nb = 3; /* number of virtual = CMD, OTP, PMIC*/
  1014. if (data->part_nb == 0)
  1015. alt_nb++; /* +1 for FlashLayout */
  1016. else
  1017. for (i = 0; i < data->part_nb; i++) {
  1018. if (data->part_array[i].target != STM32PROG_NONE)
  1019. alt_nb++;
  1020. }
  1021. if (dfu_alt_init(alt_nb, &dfu))
  1022. return -ENODEV;
  1023. puts("DFU alt info setting: ");
  1024. if (data->part_nb) {
  1025. alt_id = 0;
  1026. for (phase = 1;
  1027. (phase <= PHASE_LAST_USER) &&
  1028. (alt_id < alt_nb) && !ret;
  1029. phase++) {
  1030. /* ordering alt setting by phase id */
  1031. part = NULL;
  1032. for (i = 0; i < data->part_nb; i++) {
  1033. if (phase == data->part_array[i].id) {
  1034. part = &data->part_array[i];
  1035. break;
  1036. }
  1037. }
  1038. if (!part)
  1039. continue;
  1040. if (part->target == STM32PROG_NONE)
  1041. continue;
  1042. part->alt_id = alt_id;
  1043. alt_id++;
  1044. ret = stm32prog_alt_add(data, dfu, part);
  1045. }
  1046. } else {
  1047. char buf[ALT_BUF_LEN];
  1048. sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
  1049. PHASE_FLASHLAYOUT, STM32_DDR_BASE);
  1050. ret = dfu_alt_add(dfu, "ram", NULL, buf);
  1051. pr_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
  1052. }
  1053. if (!ret)
  1054. ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512);
  1055. if (!ret)
  1056. ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512);
  1057. if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
  1058. ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8);
  1059. if (ret)
  1060. stm32prog_err("dfu init failed: %d", ret);
  1061. puts("done\n");
  1062. #ifdef DEBUG
  1063. dfu_show_entities();
  1064. #endif
  1065. return ret;
  1066. }
  1067. int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1068. long *size)
  1069. {
  1070. pr_debug("%s: %x %lx\n", __func__, offset, *size);
  1071. if (!data->otp_part) {
  1072. data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
  1073. if (!data->otp_part)
  1074. return -ENOMEM;
  1075. }
  1076. if (!offset)
  1077. memset(data->otp_part, 0, OTP_SIZE);
  1078. if (offset + *size > OTP_SIZE)
  1079. *size = OTP_SIZE - offset;
  1080. memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
  1081. return 0;
  1082. }
  1083. int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1084. long *size)
  1085. {
  1086. int result = 0;
  1087. if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
  1088. stm32prog_err("OTP update not supported");
  1089. return -1;
  1090. }
  1091. pr_debug("%s: %x %lx\n", __func__, offset, *size);
  1092. /* alway read for first packet */
  1093. if (!offset) {
  1094. if (!data->otp_part)
  1095. data->otp_part =
  1096. memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
  1097. if (!data->otp_part) {
  1098. result = -ENOMEM;
  1099. goto end_otp_read;
  1100. }
  1101. /* init struct with 0 */
  1102. memset(data->otp_part, 0, OTP_SIZE);
  1103. /* call the service */
  1104. result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
  1105. (u32)data->otp_part, 0);
  1106. if (result)
  1107. goto end_otp_read;
  1108. }
  1109. if (!data->otp_part) {
  1110. result = -ENOMEM;
  1111. goto end_otp_read;
  1112. }
  1113. if (offset + *size > OTP_SIZE)
  1114. *size = OTP_SIZE - offset;
  1115. memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
  1116. end_otp_read:
  1117. pr_debug("%s: result %i\n", __func__, result);
  1118. return result;
  1119. }
  1120. int stm32prog_otp_start(struct stm32prog_data *data)
  1121. {
  1122. int result = 0;
  1123. struct arm_smccc_res res;
  1124. if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
  1125. stm32prog_err("OTP update not supported");
  1126. return -1;
  1127. }
  1128. if (!data->otp_part) {
  1129. stm32prog_err("start OTP without data");
  1130. return -1;
  1131. }
  1132. arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
  1133. (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
  1134. if (!res.a0) {
  1135. switch (res.a1) {
  1136. case 0:
  1137. result = 0;
  1138. break;
  1139. case 1:
  1140. stm32prog_err("Provisioning");
  1141. result = 0;
  1142. break;
  1143. default:
  1144. pr_err("%s: OTP incorrect value (err = %ld)\n",
  1145. __func__, res.a1);
  1146. result = -EINVAL;
  1147. break;
  1148. }
  1149. } else {
  1150. pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
  1151. __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
  1152. result = -EINVAL;
  1153. }
  1154. free(data->otp_part);
  1155. data->otp_part = NULL;
  1156. pr_debug("%s: result %i\n", __func__, result);
  1157. return result;
  1158. }
  1159. int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1160. long *size)
  1161. {
  1162. pr_debug("%s: %x %lx\n", __func__, offset, *size);
  1163. if (!offset)
  1164. memset(data->pmic_part, 0, PMIC_SIZE);
  1165. if (offset + *size > PMIC_SIZE)
  1166. *size = PMIC_SIZE - offset;
  1167. memcpy(&data->pmic_part[offset], buffer, *size);
  1168. return 0;
  1169. }
  1170. int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1171. long *size)
  1172. {
  1173. int result = 0, ret;
  1174. struct udevice *dev;
  1175. if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
  1176. stm32prog_err("PMIC update not supported");
  1177. return -EOPNOTSUPP;
  1178. }
  1179. pr_debug("%s: %x %lx\n", __func__, offset, *size);
  1180. ret = uclass_get_device_by_driver(UCLASS_MISC,
  1181. DM_DRIVER_GET(stpmic1_nvm),
  1182. &dev);
  1183. if (ret)
  1184. return ret;
  1185. /* alway request PMIC for first packet */
  1186. if (!offset) {
  1187. /* init struct with 0 */
  1188. memset(data->pmic_part, 0, PMIC_SIZE);
  1189. ret = uclass_get_device_by_driver(UCLASS_MISC,
  1190. DM_DRIVER_GET(stpmic1_nvm),
  1191. &dev);
  1192. if (ret)
  1193. return ret;
  1194. ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
  1195. if (ret < 0) {
  1196. result = ret;
  1197. goto end_pmic_read;
  1198. }
  1199. if (ret != PMIC_SIZE) {
  1200. result = -EACCES;
  1201. goto end_pmic_read;
  1202. }
  1203. }
  1204. if (offset + *size > PMIC_SIZE)
  1205. *size = PMIC_SIZE - offset;
  1206. memcpy(buffer, &data->pmic_part[offset], *size);
  1207. end_pmic_read:
  1208. pr_debug("%s: result %i\n", __func__, result);
  1209. return result;
  1210. }
  1211. int stm32prog_pmic_start(struct stm32prog_data *data)
  1212. {
  1213. int ret;
  1214. struct udevice *dev;
  1215. if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
  1216. stm32prog_err("PMIC update not supported");
  1217. return -EOPNOTSUPP;
  1218. }
  1219. ret = uclass_get_device_by_driver(UCLASS_MISC,
  1220. DM_DRIVER_GET(stpmic1_nvm),
  1221. &dev);
  1222. if (ret)
  1223. return ret;
  1224. return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
  1225. }
  1226. /* copy FSBL on NAND to improve reliability on NAND */
  1227. static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
  1228. {
  1229. int ret, i;
  1230. void *fsbl;
  1231. struct image_header_s header;
  1232. struct raw_header_s raw_header;
  1233. struct dfu_entity *dfu;
  1234. long size, offset;
  1235. if (part->target != STM32PROG_NAND &&
  1236. part->target != STM32PROG_SPI_NAND)
  1237. return -1;
  1238. dfu = dfu_get_entity(part->alt_id);
  1239. /* read header */
  1240. dfu_transaction_cleanup(dfu);
  1241. size = BL_HEADER_SIZE;
  1242. ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
  1243. if (ret)
  1244. return ret;
  1245. if (stm32prog_header_check(&raw_header, &header))
  1246. return -1;
  1247. /* read header + payload */
  1248. size = header.image_length + BL_HEADER_SIZE;
  1249. size = round_up(size, part->dev->mtd->erasesize);
  1250. fsbl = calloc(1, size);
  1251. if (!fsbl)
  1252. return -ENOMEM;
  1253. ret = dfu->read_medium(dfu, 0, fsbl, &size);
  1254. pr_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
  1255. if (ret)
  1256. goto error;
  1257. dfu_transaction_cleanup(dfu);
  1258. offset = 0;
  1259. for (i = part->bin_nb - 1; i > 0; i--) {
  1260. offset += size;
  1261. /* write to the next erase block */
  1262. ret = dfu->write_medium(dfu, offset, fsbl, &size);
  1263. pr_debug("%s copy at ofset=%lx size=%lx ret=%d",
  1264. __func__, offset, size, ret);
  1265. if (ret)
  1266. goto error;
  1267. }
  1268. error:
  1269. free(fsbl);
  1270. return ret;
  1271. }
  1272. static void stm32prog_end_phase(struct stm32prog_data *data)
  1273. {
  1274. if (data->phase == PHASE_FLASHLAYOUT) {
  1275. if (parse_flash_layout(data, STM32_DDR_BASE, 0))
  1276. stm32prog_err("Layout: invalid FlashLayout");
  1277. return;
  1278. }
  1279. if (!data->cur_part)
  1280. return;
  1281. if (data->cur_part->target == STM32PROG_RAM) {
  1282. if (data->cur_part->part_type == PART_SYSTEM)
  1283. data->uimage = data->cur_part->addr;
  1284. if (data->cur_part->part_type == PART_FILESYSTEM)
  1285. data->dtb = data->cur_part->addr;
  1286. }
  1287. if (CONFIG_IS_ENABLED(MMC) &&
  1288. data->cur_part->part_id < 0) {
  1289. char cmdbuf[60];
  1290. sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
  1291. data->cur_part->dev_id, data->cur_part->dev_id,
  1292. -(data->cur_part->part_id));
  1293. if (run_command(cmdbuf, 0)) {
  1294. stm32prog_err("commands '%s' failed", cmdbuf);
  1295. return;
  1296. }
  1297. }
  1298. if (CONFIG_IS_ENABLED(MTD) &&
  1299. data->cur_part->bin_nb > 1) {
  1300. if (stm32prog_copy_fsbl(data->cur_part)) {
  1301. stm32prog_err("%s (0x%x): copy of fsbl failed",
  1302. data->cur_part->name, data->cur_part->id);
  1303. return;
  1304. }
  1305. }
  1306. }
  1307. void stm32prog_do_reset(struct stm32prog_data *data)
  1308. {
  1309. if (data->phase == PHASE_RESET) {
  1310. data->phase = PHASE_DO_RESET;
  1311. puts("Reset requested\n");
  1312. }
  1313. }
  1314. void stm32prog_next_phase(struct stm32prog_data *data)
  1315. {
  1316. int phase, i;
  1317. struct stm32prog_part_t *part;
  1318. bool found;
  1319. phase = data->phase;
  1320. switch (phase) {
  1321. case PHASE_RESET:
  1322. case PHASE_END:
  1323. case PHASE_DO_RESET:
  1324. return;
  1325. }
  1326. /* found next selected partition */
  1327. data->dfu_seq = 0;
  1328. data->cur_part = NULL;
  1329. data->phase = PHASE_END;
  1330. found = false;
  1331. do {
  1332. phase++;
  1333. if (phase > PHASE_LAST_USER)
  1334. break;
  1335. for (i = 0; i < data->part_nb; i++) {
  1336. part = &data->part_array[i];
  1337. if (part->id == phase) {
  1338. if (IS_SELECT(part) && !IS_EMPTY(part)) {
  1339. data->cur_part = part;
  1340. data->phase = phase;
  1341. found = true;
  1342. }
  1343. break;
  1344. }
  1345. }
  1346. } while (!found);
  1347. if (data->phase == PHASE_END)
  1348. puts("Phase=END\n");
  1349. }
  1350. static int part_delete(struct stm32prog_data *data,
  1351. struct stm32prog_part_t *part)
  1352. {
  1353. int ret = 0;
  1354. unsigned long blks, blks_offset, blks_size;
  1355. struct blk_desc *block_dev = NULL;
  1356. char cmdbuf[40];
  1357. char devstr[10];
  1358. printf("Erasing %s ", part->name);
  1359. switch (part->target) {
  1360. case STM32PROG_MMC:
  1361. if (!IS_ENABLED(CONFIG_MMC)) {
  1362. ret = -1;
  1363. stm32prog_err("%s (0x%x): erase invalid",
  1364. part->name, part->id);
  1365. break;
  1366. }
  1367. printf("on mmc %d: ", part->dev->dev_id);
  1368. block_dev = mmc_get_blk_desc(part->dev->mmc);
  1369. blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
  1370. blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
  1371. /* -1 or -2 : delete boot partition of MMC
  1372. * need to switch to associated hwpart 1 or 2
  1373. */
  1374. if (part->part_id < 0)
  1375. if (blk_select_hwpart_devnum(IF_TYPE_MMC,
  1376. part->dev->dev_id,
  1377. -part->part_id))
  1378. return -1;
  1379. blks = blk_derase(block_dev, blks_offset, blks_size);
  1380. /* return to user partition */
  1381. if (part->part_id < 0)
  1382. blk_select_hwpart_devnum(IF_TYPE_MMC,
  1383. part->dev->dev_id, 0);
  1384. if (blks != blks_size) {
  1385. ret = -1;
  1386. stm32prog_err("%s (0x%x): MMC erase failed",
  1387. part->name, part->id);
  1388. }
  1389. break;
  1390. case STM32PROG_NOR:
  1391. case STM32PROG_NAND:
  1392. case STM32PROG_SPI_NAND:
  1393. if (!IS_ENABLED(CONFIG_MTD)) {
  1394. ret = -1;
  1395. stm32prog_err("%s (0x%x): erase invalid",
  1396. part->name, part->id);
  1397. break;
  1398. }
  1399. get_mtd_by_target(devstr, part->target, part->dev->dev_id);
  1400. printf("on %s: ", devstr);
  1401. sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
  1402. devstr, part->addr, part->size);
  1403. if (run_command(cmdbuf, 0)) {
  1404. ret = -1;
  1405. stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
  1406. part->name, part->id, cmdbuf);
  1407. }
  1408. break;
  1409. case STM32PROG_RAM:
  1410. printf("on ram: ");
  1411. memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
  1412. break;
  1413. default:
  1414. ret = -1;
  1415. stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
  1416. break;
  1417. }
  1418. if (!ret)
  1419. printf("done\n");
  1420. return ret;
  1421. }
  1422. static void stm32prog_devices_init(struct stm32prog_data *data)
  1423. {
  1424. int i;
  1425. int ret;
  1426. struct stm32prog_part_t *part;
  1427. ret = treat_partition_list(data);
  1428. if (ret)
  1429. goto error;
  1430. /* initialize the selected device */
  1431. for (i = 0; i < data->dev_nb; i++) {
  1432. ret = init_device(data, &data->dev[i]);
  1433. if (ret)
  1434. goto error;
  1435. }
  1436. /* delete RAW partition before create partition */
  1437. for (i = 0; i < data->part_nb; i++) {
  1438. part = &data->part_array[i];
  1439. if (part->part_type != RAW_IMAGE)
  1440. continue;
  1441. if (!IS_SELECT(part) || !IS_DELETE(part))
  1442. continue;
  1443. ret = part_delete(data, part);
  1444. if (ret)
  1445. goto error;
  1446. }
  1447. if (IS_ENABLED(CONFIG_MMC)) {
  1448. ret = create_gpt_partitions(data);
  1449. if (ret)
  1450. goto error;
  1451. }
  1452. /* delete partition GPT or MTD */
  1453. for (i = 0; i < data->part_nb; i++) {
  1454. part = &data->part_array[i];
  1455. if (part->part_type == RAW_IMAGE)
  1456. continue;
  1457. if (!IS_SELECT(part) || !IS_DELETE(part))
  1458. continue;
  1459. ret = part_delete(data, part);
  1460. if (ret)
  1461. goto error;
  1462. }
  1463. return;
  1464. error:
  1465. data->part_nb = 0;
  1466. }
  1467. int stm32prog_dfu_init(struct stm32prog_data *data)
  1468. {
  1469. /* init device if no error */
  1470. if (data->part_nb)
  1471. stm32prog_devices_init(data);
  1472. if (data->part_nb)
  1473. stm32prog_next_phase(data);
  1474. /* prepare DFU for device read/write */
  1475. dfu_free_entities();
  1476. return dfu_init_entities(data);
  1477. }
  1478. int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
  1479. {
  1480. memset(data, 0x0, sizeof(*data));
  1481. data->read_phase = PHASE_RESET;
  1482. data->phase = PHASE_FLASHLAYOUT;
  1483. return parse_flash_layout(data, addr, size);
  1484. }
  1485. void stm32prog_clean(struct stm32prog_data *data)
  1486. {
  1487. /* clean */
  1488. dfu_free_entities();
  1489. free(data->part_array);
  1490. free(data->otp_part);
  1491. free(data->buffer);
  1492. free(data->header_data);
  1493. }
  1494. /* DFU callback: used after serial and direct DFU USB access */
  1495. void dfu_flush_callback(struct dfu_entity *dfu)
  1496. {
  1497. if (!stm32prog_data)
  1498. return;
  1499. if (dfu->dev_type == DFU_DEV_VIRT) {
  1500. if (dfu->data.virt.dev_num == PHASE_OTP)
  1501. stm32prog_otp_start(stm32prog_data);
  1502. else if (dfu->data.virt.dev_num == PHASE_PMIC)
  1503. stm32prog_pmic_start(stm32prog_data);
  1504. return;
  1505. }
  1506. if (dfu->dev_type == DFU_DEV_RAM) {
  1507. if (dfu->alt == 0 &&
  1508. stm32prog_data->phase == PHASE_FLASHLAYOUT) {
  1509. stm32prog_end_phase(stm32prog_data);
  1510. /* waiting DFU DETACH for reenumeration */
  1511. }
  1512. }
  1513. if (!stm32prog_data->cur_part)
  1514. return;
  1515. if (dfu->alt == stm32prog_data->cur_part->alt_id) {
  1516. stm32prog_end_phase(stm32prog_data);
  1517. stm32prog_next_phase(stm32prog_data);
  1518. }
  1519. }
  1520. void dfu_initiated_callback(struct dfu_entity *dfu)
  1521. {
  1522. if (!stm32prog_data)
  1523. return;
  1524. if (!stm32prog_data->cur_part)
  1525. return;
  1526. /* force the saved offset for the current partition */
  1527. if (dfu->alt == stm32prog_data->cur_part->alt_id) {
  1528. dfu->offset = stm32prog_data->offset;
  1529. stm32prog_data->dfu_seq = 0;
  1530. pr_debug("dfu offset = 0x%llx\n", dfu->offset);
  1531. }
  1532. }