nand_boot_fsl_nfc.c 6.1 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Magnus Lilja <lilja.magnus@gmail.com>
  4. *
  5. * (C) Copyright 2008
  6. * Maxim Artamonov, <scn1874 at yandex.ru>
  7. *
  8. * (C) Copyright 2006-2008
  9. * Stefan Roese, DENX Software Engineering, sr at denx.de.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <nand.h>
  28. #include <asm-arm/arch/mx31-regs.h>
  29. #include <asm/io.h>
  30. #include <fsl_nfc.h>
  31. static struct fsl_nfc_regs *nfc;
  32. static void nfc_wait_ready(void)
  33. {
  34. uint32_t tmp;
  35. while (!(readw(&nfc->nand_flash_config2) & NFC_INT))
  36. ;
  37. /* Reset interrupt flag */
  38. tmp = readw(&nfc->nand_flash_config2);
  39. tmp &= ~NFC_INT;
  40. writew(tmp, &nfc->nand_flash_config2);
  41. }
  42. static void nfc_nand_init(void)
  43. {
  44. /* unlocking RAM Buff */
  45. writew(0x2, &nfc->configuration);
  46. /* hardware ECC checking and correct */
  47. writew(NFC_ECC_EN, &nfc->nand_flash_config1);
  48. }
  49. static void nfc_nand_command(unsigned short command)
  50. {
  51. writew(command, &nfc->flash_cmd);
  52. writew(NFC_CMD, &nfc->nand_flash_config2);
  53. nfc_wait_ready();
  54. }
  55. static void nfc_nand_page_address(unsigned int page_address)
  56. {
  57. unsigned int page_count;
  58. writew(0x00, &nfc->flash_cmd);
  59. writew(NFC_ADDR, &nfc->nand_flash_config2);
  60. nfc_wait_ready();
  61. /* code only for 2kb flash */
  62. if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800) {
  63. writew(0x00, &nfc->flash_add);
  64. writew(NFC_ADDR, &nfc->nand_flash_config2);
  65. nfc_wait_ready();
  66. }
  67. page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
  68. if (page_address <= page_count) {
  69. page_count--; /* transform 0x01000000 to 0x00ffffff */
  70. do {
  71. writew(page_address & 0xff, &nfc->flash_add);
  72. writew(NFC_ADDR, &nfc->nand_flash_config2);
  73. nfc_wait_ready();
  74. page_address = page_address >> 8;
  75. page_count = page_count >> 8;
  76. } while (page_count);
  77. }
  78. }
  79. static void nfc_nand_data_output(void)
  80. {
  81. int i;
  82. /*
  83. * The NAND controller requires four output commands for
  84. * large page devices.
  85. */
  86. for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
  87. writew(NFC_ECC_EN, &nfc->nand_flash_config1);
  88. writew(i, &nfc->buffer_address); /* read in i:th buffer */
  89. writew(NFC_OUTPUT, &nfc->nand_flash_config2);
  90. nfc_wait_ready();
  91. }
  92. }
  93. static int nfc_nand_check_ecc(void)
  94. {
  95. return readw(&nfc->ecc_status_result);
  96. }
  97. static int nfc_read_page(unsigned int page_address, unsigned char *buf)
  98. {
  99. int i;
  100. u32 *src;
  101. u32 *dst;
  102. writew(0, &nfc->buffer_address); /* read in first 0 buffer */
  103. nfc_nand_command(NAND_CMD_READ0);
  104. nfc_nand_page_address(page_address);
  105. if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800)
  106. nfc_nand_command(NAND_CMD_READSTART);
  107. nfc_nand_data_output(); /* fill the main buffer 0 */
  108. if (nfc_nand_check_ecc())
  109. return -1;
  110. src = &nfc->main_area0[0];
  111. dst = (u32 *)buf;
  112. /* main copy loop from NAND-buffer to SDRAM memory */
  113. for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
  114. writel(readl(src), dst);
  115. src++;
  116. dst++;
  117. }
  118. return 0;
  119. }
  120. static int is_badblock(int pagenumber)
  121. {
  122. int page = pagenumber;
  123. u32 badblock;
  124. u32 *src;
  125. /* Check the first two pages for bad block markers */
  126. for (page = pagenumber; page < pagenumber + 2; page++) {
  127. writew(0, &nfc->buffer_address); /* read in first 0 buffer */
  128. nfc_nand_command(NAND_CMD_READ0);
  129. nfc_nand_page_address(page);
  130. if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800)
  131. nfc_nand_command(NAND_CMD_READSTART);
  132. nfc_nand_data_output(); /* fill the main buffer 0 */
  133. src = &nfc->spare_area0[0];
  134. /*
  135. * IMPORTANT NOTE: The nand flash controller uses a non-
  136. * standard layout for large page devices. This can
  137. * affect the position of the bad block marker.
  138. */
  139. /* Get the bad block marker */
  140. badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
  141. badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
  142. badblock &= 0xff;
  143. /* bad block marker verify */
  144. if (badblock != 0xff)
  145. return 1; /* potential bad block */
  146. }
  147. return 0;
  148. }
  149. static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
  150. {
  151. int i;
  152. unsigned int page;
  153. unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
  154. CONFIG_SYS_NAND_PAGE_SIZE;
  155. nfc = (void *)NFC_BASE_ADDR;
  156. nfc_nand_init();
  157. /* Convert to page number */
  158. page = from / CONFIG_SYS_NAND_PAGE_SIZE;
  159. i = 0;
  160. while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
  161. if (nfc_read_page(page, buf) < 0)
  162. return -1;
  163. page++;
  164. i++;
  165. buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
  166. /*
  167. * Check if we have crossed a block boundary, and if so
  168. * check for bad block.
  169. */
  170. if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
  171. /*
  172. * Yes, new block. See if this block is good. If not,
  173. * loop until we find i good block.
  174. */
  175. while (is_badblock(page)) {
  176. page = page + CONFIG_SYS_NAND_PAGE_COUNT;
  177. /* Check i we've reached the end of flash. */
  178. if (page >= maxpages)
  179. return -1;
  180. }
  181. }
  182. }
  183. return 0;
  184. }
  185. /*
  186. * The main entry for NAND booting. It's necessary that SDRAM is already
  187. * configured and available since this code loads the main U-Boot image
  188. * from NAND into SDRAM and starts it from there.
  189. */
  190. void nand_boot(void)
  191. {
  192. __attribute__((noreturn)) void (*uboot)(void);
  193. nfc = (void *)NFC_BASE_ADDR;
  194. /*
  195. * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
  196. * be aligned to full pages
  197. */
  198. if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
  199. (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
  200. /* Copy from NAND successful, start U-boot */
  201. uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
  202. uboot();
  203. } else {
  204. /* Unrecoverable error when copying from NAND */
  205. hang();
  206. }
  207. }
  208. /*
  209. * Called in case of an exception.
  210. */
  211. void hang(void)
  212. {
  213. /* Loop forever */
  214. while (1) ;
  215. }