cmd_cache_dump.c 3.6 KB

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  1. /*
  2. * U-boot - cmd_cache_dump.c
  3. *
  4. * Copyright (c) 2007-2008 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <config.h>
  9. #include <common.h>
  10. #include <command.h>
  11. #include <asm/blackfin.h>
  12. #include <asm/mach-common/bits/mpu.h>
  13. static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, size_t end)
  14. {
  15. if (start >= start_limit && start <= end_limit && \
  16. end <= end_limit && end >= start_limit && \
  17. start <= end)
  18. return 0;
  19. printf("%s limit violation: %zu <= (user:%zu) <= (user:%zu) <= %zu\n",
  20. type, start_limit, start, end, end_limit);
  21. return 1;
  22. }
  23. int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  24. {
  25. int cache_status = icache_status();
  26. if (cache_status)
  27. icache_disable();
  28. uint32_t cmd_base, tag, cache_upper, cache_lower;
  29. size_t way, way_start = 0, way_end = 3;
  30. size_t sbnk, sbnk_start = 0, sbnk_end = 3;
  31. size_t set, set_start = 0, set_end = 31;
  32. size_t dw;
  33. if (argc > 1) {
  34. way_start = way_end = simple_strtoul(argv[1], NULL, 10);
  35. if (argc > 2) {
  36. sbnk_start = sbnk_end = simple_strtoul(argv[2], NULL, 10);
  37. if (argc > 3)
  38. set_start = set_end = simple_strtoul(argv[3], NULL, 10);
  39. }
  40. }
  41. if (check_limit("way", 0, 3, way_start, way_end) || \
  42. check_limit("subbank", 0, 3, sbnk_start, sbnk_end) || \
  43. check_limit("set", 0, 31, set_start, set_end))
  44. return 1;
  45. puts("Way:Subbank:Set: [valid-tag lower upper] {invalid-tag lower upper}...\n");
  46. for (way = way_start; way <= way_end; ++way) {
  47. for (sbnk = sbnk_start; sbnk <= sbnk_end; ++sbnk) {
  48. for (set = set_start; set <= set_end; ++set) {
  49. printf("%zu:%zu:%2zu: ", way, sbnk, set);
  50. for (dw = 0; dw < 4; ++dw) {
  51. if (ctrlc())
  52. return 1;
  53. cmd_base = \
  54. (way << 26) | \
  55. (sbnk << 16) | \
  56. (set << 5) | \
  57. (dw << 3);
  58. /* first read the tag */
  59. bfin_write_ITEST_COMMAND(cmd_base | 0x0);
  60. SSYNC();
  61. tag = bfin_read_ITEST_DATA0();
  62. printf("%c%08x ", (tag & 0x1 ? ' ' : '{'), tag);
  63. /* grab the data at this loc */
  64. bfin_write_ITEST_COMMAND(cmd_base | 0x4);
  65. SSYNC();
  66. cache_lower = bfin_read_ITEST_DATA0();
  67. cache_upper = bfin_read_ITEST_DATA1();
  68. printf("%08x %08x%c ", cache_lower, cache_upper, (tag & 0x1 ? ' ' : '}'));
  69. }
  70. puts("\n");
  71. }
  72. }
  73. }
  74. if (cache_status)
  75. icache_enable();
  76. return 0;
  77. }
  78. U_BOOT_CMD(icache_dump, 4, 0, do_icache_dump,
  79. "icache_dump - dump current instruction cache\n",
  80. "[way] [subbank] [set]");
  81. int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  82. {
  83. u32 way, bank, subbank, set;
  84. u32 status, addr;
  85. u32 dmem_ctl = bfin_read_DMEM_CONTROL();
  86. for (bank = 0; bank < 2; ++bank) {
  87. if (!(dmem_ctl & (1 << (DMC1_P - bank))))
  88. continue;
  89. for (way = 0; way < 2; ++way)
  90. for (subbank = 0; subbank < 4; ++subbank) {
  91. printf("%i:%i:%i:\t", bank, way, subbank);
  92. for (set = 0; set < 64; ++set) {
  93. if (ctrlc())
  94. return 1;
  95. /* retrieve a cache tag */
  96. bfin_write_DTEST_COMMAND(
  97. way << 26 |
  98. bank << 23 |
  99. subbank << 16 |
  100. set << 5
  101. );
  102. CSYNC();
  103. status = bfin_read_DTEST_DATA0();
  104. /* construct the address using the tag */
  105. addr = (status & 0xFFFFC800) | (subbank << 12) | (set << 5);
  106. /* show it */
  107. if (set && !(set % 4))
  108. puts("\n\t");
  109. printf("%c%08x%c%08x%c ", (status & 0x1 ? '[' : '{'), status, (status & 0x2 ? 'd' : ' '), addr, (status & 0x1 ? ']' : '}'));
  110. }
  111. puts("\n");
  112. }
  113. }
  114. return 0;
  115. }
  116. U_BOOT_CMD(dcache_dump, 4, 0, do_dcache_dump,
  117. "dcache_dump - dump current data cache\n",
  118. "[bank] [way] [subbank] [set]");