pcmcia.h 8.3 KB

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  1. /*
  2. * (C) Copyright 2000-2004
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef _PCMCIA_H
  24. #define _PCMCIA_H
  25. #include <common.h>
  26. #include <config.h>
  27. /*
  28. * Allow configuration to select PCMCIA slot,
  29. * or try to generate a useful default
  30. */
  31. #if defined(CONFIG_CMD_PCMCIA) || \
  32. (defined(CONFIG_CMD_IDE) && \
  33. (defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )
  34. #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
  35. /* The RPX series use SLOT_B */
  36. #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
  37. # define CONFIG_PCMCIA_SLOT_B
  38. #elif defined(CONFIG_ADS) /* The ADS board uses SLOT_A */
  39. # define CONFIG_PCMCIA_SLOT_A
  40. #elif defined(CONFIG_FADS) /* The FADS series are a mess */
  41. # if defined(CONFIG_MPC86x) || defined(CONFIG_MPC821)
  42. # define CONFIG_PCMCIA_SLOT_A
  43. # else
  44. # define CONFIG_PCMCIA_SLOT_B
  45. # endif
  46. #elif defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx)
  47. # define CONFIG_PCMCIA_SLOT_B /* The TQM8xxL use SLOT_B */
  48. #elif defined(CONFIG_SPD823TS) /* The SPD8xx use SLOT_B */
  49. # define CONFIG_PCMCIA_SLOT_B
  50. #elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) /* The IVM* use SLOT_A */
  51. # define CONFIG_PCMCIA_SLOT_A
  52. #elif defined(CONFIG_LWMON) /* The LWMON use SLOT_B */
  53. # define CONFIG_PCMCIA_SLOT_B
  54. #elif defined(CONFIG_ICU862) /* The ICU862 use SLOT_B */
  55. # define CONFIG_PCMCIA_SLOT_B
  56. #elif defined(CONFIG_C2MON) /* The C2MON use SLOT_B */
  57. # define CONFIG_PCMCIA_SLOT_B
  58. #elif defined(CONFIG_R360MPI) /* The R360MPI use SLOT_B */
  59. # define CONFIG_PCMCIA_SLOT_B
  60. #elif defined(CONFIG_ATC) /* The ATC use SLOT_A */
  61. # define CONFIG_PCMCIA_SLOT_A
  62. #elif defined(CONFIG_NETTA)
  63. # define CONFIG_PCMCIA_SLOT_A
  64. #elif defined(CONFIG_UC100) /* The UC100 use SLOT_B */
  65. # define CONFIG_PCMCIA_SLOT_B
  66. #else
  67. # error "PCMCIA Slot not configured"
  68. #endif
  69. #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
  70. /* Make sure exactly one slot is defined - we support only one for now */
  71. #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
  72. #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
  73. #endif
  74. #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
  75. #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
  76. #endif
  77. #ifndef PCMCIA_SOCKETS_NO
  78. #define PCMCIA_SOCKETS_NO 1
  79. #endif
  80. #ifndef PCMCIA_MEM_WIN_NO
  81. #define PCMCIA_MEM_WIN_NO 4
  82. #endif
  83. #define PCMCIA_IO_WIN_NO 2
  84. /* define _slot_ to be able to optimize macros */
  85. #ifdef CONFIG_PCMCIA_SLOT_A
  86. # define _slot_ 0
  87. # define PCMCIA_SLOT_MSG "slot A"
  88. # define PCMCIA_SLOT_x PCMCIA_PSLOT_A
  89. #else
  90. # define _slot_ 1
  91. # define PCMCIA_SLOT_MSG "slot B"
  92. # define PCMCIA_SLOT_x PCMCIA_PSLOT_B
  93. #endif
  94. /*
  95. * The TQM850L hardware has two pins swapped! Grrrrgh!
  96. */
  97. #ifdef CONFIG_TQM850L
  98. #define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXOE
  99. #define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXRESET
  100. #else
  101. #define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXRESET
  102. #define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXOE
  103. #endif
  104. /*
  105. * This structure is used to address each window in the PCMCIA controller.
  106. *
  107. * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
  108. * after pcmcia_win_t[n]...
  109. */
  110. typedef struct {
  111. ulong br;
  112. ulong or;
  113. } pcmcia_win_t;
  114. /*
  115. * Definitions for PCMCIA control registers to operate in IDE mode
  116. *
  117. * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
  118. * to be done later (depending on CPU clock)
  119. */
  120. /* Window 0:
  121. * Base: 0xFE100000 CS1
  122. * Port Size: 2 Bytes
  123. * Port Size: 16 Bit
  124. * Common Memory Space
  125. */
  126. #define CONFIG_SYS_PCMCIA_PBR0 0xFE100000
  127. #define CONFIG_SYS_PCMCIA_POR0 ( PCMCIA_BSIZE_2 \
  128. | PCMCIA_PPS_16 \
  129. | PCMCIA_PRS_MEM \
  130. | PCMCIA_SLOT_x \
  131. | PCMCIA_PV \
  132. )
  133. /* Window 1:
  134. * Base: 0xFE100080 CS1
  135. * Port Size: 8 Bytes
  136. * Port Size: 8 Bit
  137. * Common Memory Space
  138. */
  139. #define CONFIG_SYS_PCMCIA_PBR1 0xFE100080
  140. #define CONFIG_SYS_PCMCIA_POR1 ( PCMCIA_BSIZE_8 \
  141. | PCMCIA_PPS_8 \
  142. | PCMCIA_PRS_MEM \
  143. | PCMCIA_SLOT_x \
  144. | PCMCIA_PV \
  145. )
  146. /* Window 2:
  147. * Base: 0xFE100100 CS2
  148. * Port Size: 8 Bytes
  149. * Port Size: 8 Bit
  150. * Common Memory Space
  151. */
  152. #define CONFIG_SYS_PCMCIA_PBR2 0xFE100100
  153. #define CONFIG_SYS_PCMCIA_POR2 ( PCMCIA_BSIZE_8 \
  154. | PCMCIA_PPS_8 \
  155. | PCMCIA_PRS_MEM \
  156. | PCMCIA_SLOT_x \
  157. | PCMCIA_PV \
  158. )
  159. /* Window 3:
  160. * not used
  161. */
  162. #define CONFIG_SYS_PCMCIA_PBR3 0
  163. #define CONFIG_SYS_PCMCIA_POR3 0
  164. /* Window 4:
  165. * Base: 0xFE100C00 CS1
  166. * Port Size: 2 Bytes
  167. * Port Size: 16 Bit
  168. * Common Memory Space
  169. */
  170. #define CONFIG_SYS_PCMCIA_PBR4 0xFE100C00
  171. #define CONFIG_SYS_PCMCIA_POR4 ( PCMCIA_BSIZE_2 \
  172. | PCMCIA_PPS_16 \
  173. | PCMCIA_PRS_MEM \
  174. | PCMCIA_SLOT_x \
  175. | PCMCIA_PV \
  176. )
  177. /* Window 5:
  178. * Base: 0xFE100C80 CS1
  179. * Port Size: 8 Bytes
  180. * Port Size: 8 Bit
  181. * Common Memory Space
  182. */
  183. #define CONFIG_SYS_PCMCIA_PBR5 0xFE100C80
  184. #define CONFIG_SYS_PCMCIA_POR5 ( PCMCIA_BSIZE_8 \
  185. | PCMCIA_PPS_8 \
  186. | PCMCIA_PRS_MEM \
  187. | PCMCIA_SLOT_x \
  188. | PCMCIA_PV \
  189. )
  190. /* Window 6:
  191. * Base: 0xFE100D00 CS2
  192. * Port Size: 8 Bytes
  193. * Port Size: 8 Bit
  194. * Common Memory Space
  195. */
  196. #define CONFIG_SYS_PCMCIA_PBR6 0xFE100D00
  197. #define CONFIG_SYS_PCMCIA_POR6 ( PCMCIA_BSIZE_8 \
  198. | PCMCIA_PPS_8 \
  199. | PCMCIA_PRS_MEM \
  200. | PCMCIA_SLOT_x \
  201. | PCMCIA_PV \
  202. )
  203. /* Window 7:
  204. * not used
  205. */
  206. #define CONFIG_SYS_PCMCIA_PBR7 0
  207. #define CONFIG_SYS_PCMCIA_POR7 0
  208. /**********************************************************************/
  209. /*
  210. * CIS Tupel codes
  211. */
  212. #define CISTPL_NULL 0x00
  213. #define CISTPL_DEVICE 0x01
  214. #define CISTPL_LONGLINK_CB 0x02
  215. #define CISTPL_INDIRECT 0x03
  216. #define CISTPL_CONFIG_CB 0x04
  217. #define CISTPL_CFTABLE_ENTRY_CB 0x05
  218. #define CISTPL_LONGLINK_MFC 0x06
  219. #define CISTPL_BAR 0x07
  220. #define CISTPL_PWR_MGMNT 0x08
  221. #define CISTPL_EXTDEVICE 0x09
  222. #define CISTPL_CHECKSUM 0x10
  223. #define CISTPL_LONGLINK_A 0x11
  224. #define CISTPL_LONGLINK_C 0x12
  225. #define CISTPL_LINKTARGET 0x13
  226. #define CISTPL_NO_LINK 0x14
  227. #define CISTPL_VERS_1 0x15
  228. #define CISTPL_ALTSTR 0x16
  229. #define CISTPL_DEVICE_A 0x17
  230. #define CISTPL_JEDEC_C 0x18
  231. #define CISTPL_JEDEC_A 0x19
  232. #define CISTPL_CONFIG 0x1a
  233. #define CISTPL_CFTABLE_ENTRY 0x1b
  234. #define CISTPL_DEVICE_OC 0x1c
  235. #define CISTPL_DEVICE_OA 0x1d
  236. #define CISTPL_DEVICE_GEO 0x1e
  237. #define CISTPL_DEVICE_GEO_A 0x1f
  238. #define CISTPL_MANFID 0x20
  239. #define CISTPL_FUNCID 0x21
  240. #define CISTPL_FUNCE 0x22
  241. #define CISTPL_SWIL 0x23
  242. #define CISTPL_END 0xff
  243. /*
  244. * CIS Function ID codes
  245. */
  246. #define CISTPL_FUNCID_MULTI 0x00
  247. #define CISTPL_FUNCID_MEMORY 0x01
  248. #define CISTPL_FUNCID_SERIAL 0x02
  249. #define CISTPL_FUNCID_PARALLEL 0x03
  250. #define CISTPL_FUNCID_FIXED 0x04
  251. #define CISTPL_FUNCID_VIDEO 0x05
  252. #define CISTPL_FUNCID_NETWORK 0x06
  253. #define CISTPL_FUNCID_AIMS 0x07
  254. #define CISTPL_FUNCID_SCSI 0x08
  255. /*
  256. * Fixed Disk FUNCE codes
  257. */
  258. #define CISTPL_IDE_INTERFACE 0x01
  259. #define CISTPL_FUNCE_IDE_IFACE 0x01
  260. #define CISTPL_FUNCE_IDE_MASTER 0x02
  261. #define CISTPL_FUNCE_IDE_SLAVE 0x03
  262. /* First feature byte */
  263. #define CISTPL_IDE_SILICON 0x04
  264. #define CISTPL_IDE_UNIQUE 0x08
  265. #define CISTPL_IDE_DUAL 0x10
  266. /* Second feature byte */
  267. #define CISTPL_IDE_HAS_SLEEP 0x01
  268. #define CISTPL_IDE_HAS_STANDBY 0x02
  269. #define CISTPL_IDE_HAS_IDLE 0x04
  270. #define CISTPL_IDE_LOW_POWER 0x08
  271. #define CISTPL_IDE_REG_INHIBIT 0x10
  272. #define CISTPL_IDE_HAS_INDEX 0x20
  273. #define CISTPL_IDE_IOIS16 0x40
  274. #endif
  275. #ifdef CONFIG_8xx
  276. extern u_int *pcmcia_pgcrx[];
  277. #define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
  278. #endif
  279. #if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD) \
  280. || defined(CONFIG_PXA_PCMCIA)
  281. extern int check_ide_device(int slot);
  282. #endif
  283. #endif /* _PCMCIA_H */