nios2-io.h 6.8 KB

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  1. /*
  2. * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
  3. * Scott McNutt <smcnutt@psyent.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*************************************************************************
  24. * Altera Nios2 Standard Peripherals
  25. ************************************************************************/
  26. #ifndef __NIOS2IO_H__
  27. #define __NIOS2IO_H__
  28. /*------------------------------------------------------------------------
  29. * UART (http://www.altera.com/literature/ds/ds_nios_uart.pdf)
  30. *----------------------------------------------------------------------*/
  31. typedef volatile struct nios_uart_t {
  32. unsigned rxdata; /* Rx data reg */
  33. unsigned txdata; /* Tx data reg */
  34. unsigned status; /* Status reg */
  35. unsigned control; /* Control reg */
  36. unsigned divisor; /* Baud rate divisor reg */
  37. unsigned endofpacket; /* End-of-packet reg */
  38. }nios_uart_t;
  39. /* status register */
  40. #define NIOS_UART_PE (1 << 0) /* parity error */
  41. #define NIOS_UART_FE (1 << 1) /* frame error */
  42. #define NIOS_UART_BRK (1 << 2) /* break detect */
  43. #define NIOS_UART_ROE (1 << 3) /* rx overrun */
  44. #define NIOS_UART_TOE (1 << 4) /* tx overrun */
  45. #define NIOS_UART_TMT (1 << 5) /* tx empty */
  46. #define NIOS_UART_TRDY (1 << 6) /* tx ready */
  47. #define NIOS_UART_RRDY (1 << 7) /* rx ready */
  48. #define NIOS_UART_E (1 << 8) /* exception */
  49. #define NIOS_UART_DCTS (1 << 10) /* cts change */
  50. #define NIOS_UART_CTS (1 << 11) /* cts */
  51. #define NIOS_UART_EOP (1 << 12) /* eop detected */
  52. /* control register */
  53. #define NIOS_UART_IPE (1 << 0) /* parity error int ena*/
  54. #define NIOS_UART_IFE (1 << 1) /* frame error int ena */
  55. #define NIOS_UART_IBRK (1 << 2) /* break detect int ena */
  56. #define NIOS_UART_IROE (1 << 3) /* rx overrun int ena */
  57. #define NIOS_UART_ITOE (1 << 4) /* tx overrun int ena */
  58. #define NIOS_UART_ITMT (1 << 5) /* tx empty int ena */
  59. #define NIOS_UART_ITRDY (1 << 6) /* tx ready int ena */
  60. #define NIOS_UART_IRRDY (1 << 7) /* rx ready int ena */
  61. #define NIOS_UART_IE (1 << 8) /* exception int ena */
  62. #define NIOS_UART_TBRK (1 << 9) /* transmit break */
  63. #define NIOS_UART_IDCTS (1 << 10) /* cts change int ena */
  64. #define NIOS_UART_RTS (1 << 11) /* rts */
  65. #define NIOS_UART_IEOP (1 << 12) /* eop detected int ena */
  66. /*------------------------------------------------------------------------
  67. * TIMER (http://www.altera.com/literature/ds/ds_nios_timer.pdf)
  68. *----------------------------------------------------------------------*/
  69. typedef volatile struct nios_timer_t {
  70. unsigned status; /* Timer status reg */
  71. unsigned control; /* Timer control reg */
  72. unsigned periodl; /* Timeout period low */
  73. unsigned periodh; /* Timeout period high */
  74. unsigned snapl; /* Snapshot low */
  75. unsigned snaph; /* Snapshot high */
  76. }nios_timer_t;
  77. /* status register */
  78. #define NIOS_TIMER_TO (1 << 0) /* Timeout */
  79. #define NIOS_TIMER_RUN (1 << 1) /* Timer running */
  80. /* control register */
  81. #define NIOS_TIMER_ITO (1 << 0) /* Timeout int ena */
  82. #define NIOS_TIMER_CONT (1 << 1) /* Continuous mode */
  83. #define NIOS_TIMER_START (1 << 2) /* Start timer */
  84. #define NIOS_TIMER_STOP (1 << 3) /* Stop timer */
  85. /*------------------------------------------------------------------------
  86. * PIO (http://www.altera.com/literature/ds/ds_nios_pio.pdf)
  87. *----------------------------------------------------------------------*/
  88. typedef volatile struct nios_pio_t {
  89. unsigned int data; /* Data value at each PIO in/out */
  90. unsigned int direction; /* Data direct. for each PIO bit */
  91. unsigned int interruptmask; /* Per-bit IRQ enable/disable */
  92. unsigned int edgecapture; /* Per-bit sync. edge detect & hold */
  93. }nios_pio_t;
  94. /* direction register */
  95. #define NIOS_PIO_OUT (1) /* PIO bit is output */
  96. #define NIOS_PIO_IN (0) /* PIO bit is input */
  97. /*------------------------------------------------------------------------
  98. * SPI (http://www.altera.com/literature/ds/ds_nios_spi.pdf)
  99. *----------------------------------------------------------------------*/
  100. typedef volatile struct nios_spi_t {
  101. unsigned rxdata; /* Rx data reg */
  102. unsigned txdata; /* Tx data reg */
  103. unsigned status; /* Status reg */
  104. unsigned control; /* Control reg */
  105. unsigned reserved; /* (master only) */
  106. unsigned slaveselect; /* SPI slave select mask (master only) */
  107. }nios_spi_t;
  108. /* status register */
  109. #define NIOS_SPI_ROE (1 << 3) /* rx overrun */
  110. #define NIOS_SPI_TOE (1 << 4) /* tx overrun */
  111. #define NIOS_SPI_TMT (1 << 5) /* tx empty */
  112. #define NIOS_SPI_TRDY (1 << 6) /* tx ready */
  113. #define NIOS_SPI_RRDY (1 << 7) /* rx ready */
  114. #define NIOS_SPI_E (1 << 8) /* exception */
  115. /* control register */
  116. #define NIOS_SPI_IROE (1 << 3) /* rx overrun int ena */
  117. #define NIOS_SPI_ITOE (1 << 4) /* tx overrun int ena */
  118. #define NIOS_SPI_ITRDY (1 << 6) /* tx ready int ena */
  119. #define NIOS_SPI_IRRDY (1 << 7) /* rx ready int ena */
  120. #define NIOS_SPI_IE (1 << 8) /* exception int ena */
  121. #define NIOS_SPI_SSO (1 << 10) /* override SS_n output */
  122. /*------------------------------------------------------------------------
  123. * JTAG UART
  124. *----------------------------------------------------------------------*/
  125. typedef volatile struct nios_jtag_t {
  126. unsigned data; /* Data register */
  127. unsigned control; /* Control register */
  128. }nios_jtag_t;
  129. /* data register */
  130. #define NIOS_JTAG_RVALID (1<<15) /* Read valid */
  131. #define NIOS_JTAG_DATA(d) ((d)&0x0ff) /* Read data */
  132. #define NIOS_JTAG_RAVAIL(d) ((d)>>16) /* Read space avail */
  133. /* control register */
  134. #define NIOS_JTAG_RE (1 << 0) /* read intr enable */
  135. #define NIOS_JTAG_WE (1 << 1) /* write intr enable */
  136. #define NIOS_JTAG_RI (1 << 8) /* read intr pending */
  137. #define NIOS_JTAG_WI (1 << 9) /* write intr pending*/
  138. #define NIOS_JTAG_AC (1 << 10) /* activity indicator */
  139. #define NIOS_JTAG_RRDY (1 << 12) /* read available */
  140. #define NIOS_JTAG_WSPACE(d) ((d)>>16) /* Write space avail */
  141. /*------------------------------------------------------------------------
  142. * SYSTEM ID
  143. *----------------------------------------------------------------------*/
  144. typedef volatile struct nios_sysid_t {
  145. unsigned id; /* The system build id*/
  146. unsigned timestamp; /* Timestamp */
  147. }nios_sysid_t;
  148. #endif /* __NIOS2IO_H__ */