mpc8260_irq.h 1.7 KB

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  1. #ifndef _MPC8260_IRQ_H
  2. #define _MPC8260_IRQ_H
  3. /****************************************************************************/
  4. /* most of this was ripped out of include/asm-ppc/irq.h from the Linux/PPC */
  5. /* source. There was no copyright information in the file. */
  6. /*
  7. * this is the # irq's for all ppc arch's (pmac/chrp/prep)
  8. * so it is the max of them all
  9. *
  10. * [let's just worry about 8260 for now - mjj]
  11. */
  12. #define NR_IRQS 64
  13. /* The 8260 has an internal interrupt controller with a maximum of
  14. * 64 IRQs. We will use NR_IRQs from above since it is large enough.
  15. * Don't be confused by the 8260 documentation where they list an
  16. * "interrupt number" and "interrupt vector". We are only interested
  17. * in the interrupt vector. There are "reserved" holes where the
  18. * vector number increases, but the interrupt number in the table does not.
  19. * (Document errata updates have fixed this...make sure you have up to
  20. * date processor documentation -- Dan).
  21. */
  22. #define NR_SIU_INTS 64
  23. /* There are many more than these, we will add them as we need them.
  24. */
  25. #define SIU_INT_SMC1 ((uint)0x04)
  26. #define SIU_INT_SMC2 ((uint)0x05)
  27. #define SIU_INT_IRQ1 ((uint)0x13)
  28. #define SIU_INT_IRQ2 ((uint)0x14)
  29. #define SIU_INT_IRQ3 ((uint)0x15)
  30. #define SIU_INT_IRQ4 ((uint)0x16)
  31. #define SIU_INT_IRQ5 ((uint)0x17)
  32. #define SIU_INT_IRQ6 ((uint)0x18)
  33. #define SIU_INT_IRQ7 ((uint)0x19)
  34. #define SIU_INT_FCC1 ((uint)0x20)
  35. #define SIU_INT_FCC2 ((uint)0x21)
  36. #define SIU_INT_FCC3 ((uint)0x22)
  37. #define SIU_INT_SCC1 ((uint)0x28)
  38. #define SIU_INT_SCC2 ((uint)0x29)
  39. #define SIU_INT_SCC3 ((uint)0x2a)
  40. #define SIU_INT_SCC4 ((uint)0x2b)
  41. #define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
  42. #endif /* _MPC8260_IRQ_H */