miiphy.h 6.0 KB

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  1. /*----------------------------------------------------------------------------+
  2. | This source code is dual-licensed. You may use it under the terms of the
  3. | GNU General Public License version 2, or under the license below.
  4. |
  5. | This source code has been made available to you by IBM on an AS-IS
  6. | basis. Anyone receiving this source is licensed under IBM
  7. | copyrights to use it in any way he or she deems fit, including
  8. | copying it, modifying it, compiling it, and redistributing it either
  9. | with or without modifications. No license under IBM patents or
  10. | patent applications is to be implied by the copyright license.
  11. |
  12. | Any user of this software should understand that IBM cannot provide
  13. | technical support for this software and will not be responsible for
  14. | any consequences resulting from the use of this software.
  15. |
  16. | Any person who transfers this source code or any derivative work
  17. | must include the IBM copyright notice, this paragraph, and the
  18. | preceding two paragraphs in the transferred software.
  19. |
  20. | COPYRIGHT I B M CORPORATION 1999
  21. | LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
  22. |
  23. | Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
  24. +----------------------------------------------------------------------------*/
  25. /*----------------------------------------------------------------------------+
  26. |
  27. | File Name: miiphy.h
  28. |
  29. | Function: Include file defining PHY registers.
  30. |
  31. | Author: Mark Wisner
  32. |
  33. +----------------------------------------------------------------------------*/
  34. #ifndef _miiphy_h_
  35. #define _miiphy_h_
  36. #include <net.h>
  37. int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
  38. unsigned short *value);
  39. int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
  40. unsigned short value);
  41. int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
  42. unsigned char *model, unsigned char *rev);
  43. int miiphy_reset (char *devname, unsigned char addr);
  44. int miiphy_speed (char *devname, unsigned char addr);
  45. int miiphy_duplex (char *devname, unsigned char addr);
  46. int miiphy_is_1000base_x (char *devname, unsigned char addr);
  47. #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  48. int miiphy_link (char *devname, unsigned char addr);
  49. #endif
  50. void miiphy_init (void);
  51. void miiphy_register (char *devname,
  52. int (*read) (char *devname, unsigned char addr,
  53. unsigned char reg, unsigned short *value),
  54. int (*write) (char *devname, unsigned char addr,
  55. unsigned char reg, unsigned short value));
  56. int miiphy_set_current_dev (char *devname);
  57. char *miiphy_get_current_dev (void);
  58. void miiphy_listdev (void);
  59. #ifdef CONFIG_BITBANGMII
  60. #define BB_MII_DEVNAME "bb_miiphy"
  61. struct bb_miiphy_bus {
  62. char name[NAMESIZE];
  63. int (*init)(struct bb_miiphy_bus *bus);
  64. int (*mdio_active)(struct bb_miiphy_bus *bus);
  65. int (*mdio_tristate)(struct bb_miiphy_bus *bus);
  66. int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
  67. int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
  68. int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
  69. int (*delay)(struct bb_miiphy_bus *bus);
  70. #ifdef CONFIG_BITBANGMII_MULTI
  71. void *priv;
  72. #endif
  73. };
  74. extern struct bb_miiphy_bus bb_miiphy_buses[];
  75. extern int bb_miiphy_buses_num;
  76. void bb_miiphy_init (void);
  77. int bb_miiphy_read (char *devname, unsigned char addr,
  78. unsigned char reg, unsigned short *value);
  79. int bb_miiphy_write (char *devname, unsigned char addr,
  80. unsigned char reg, unsigned short value);
  81. #endif
  82. /* phy seed setup */
  83. #define AUTO 99
  84. #define _1000BASET 1000
  85. #define _100BASET 100
  86. #define _10BASET 10
  87. #define HALF 22
  88. #define FULL 44
  89. /* phy register offsets */
  90. #define PHY_BMCR 0x00
  91. #define PHY_BMSR 0x01
  92. #define PHY_PHYIDR1 0x02
  93. #define PHY_PHYIDR2 0x03
  94. #define PHY_ANAR 0x04
  95. #define PHY_ANLPAR 0x05
  96. #define PHY_ANER 0x06
  97. #define PHY_ANNPTR 0x07
  98. #define PHY_ANLPNP 0x08
  99. #define PHY_1000BTCR 0x09
  100. #define PHY_1000BTSR 0x0A
  101. #define PHY_EXSR 0x0F
  102. #define PHY_PHYSTS 0x10
  103. #define PHY_MIPSCR 0x11
  104. #define PHY_MIPGSR 0x12
  105. #define PHY_DCR 0x13
  106. #define PHY_FCSCR 0x14
  107. #define PHY_RECR 0x15
  108. #define PHY_PCSR 0x16
  109. #define PHY_LBR 0x17
  110. #define PHY_10BTSCR 0x18
  111. #define PHY_PHYCTRL 0x19
  112. /* PHY BMCR */
  113. #define PHY_BMCR_RESET 0x8000
  114. #define PHY_BMCR_LOOP 0x4000
  115. #define PHY_BMCR_100MB 0x2000
  116. #define PHY_BMCR_AUTON 0x1000
  117. #define PHY_BMCR_POWD 0x0800
  118. #define PHY_BMCR_ISO 0x0400
  119. #define PHY_BMCR_RST_NEG 0x0200
  120. #define PHY_BMCR_DPLX 0x0100
  121. #define PHY_BMCR_COL_TST 0x0080
  122. #define PHY_BMCR_SPEED_MASK 0x2040
  123. #define PHY_BMCR_1000_MBPS 0x0040
  124. #define PHY_BMCR_100_MBPS 0x2000
  125. #define PHY_BMCR_10_MBPS 0x0000
  126. /* phy BMSR */
  127. #define PHY_BMSR_100T4 0x8000
  128. #define PHY_BMSR_100TXF 0x4000
  129. #define PHY_BMSR_100TXH 0x2000
  130. #define PHY_BMSR_10TF 0x1000
  131. #define PHY_BMSR_10TH 0x0800
  132. #define PHY_BMSR_EXT_STAT 0x0100
  133. #define PHY_BMSR_PRE_SUP 0x0040
  134. #define PHY_BMSR_AUTN_COMP 0x0020
  135. #define PHY_BMSR_RF 0x0010
  136. #define PHY_BMSR_AUTN_ABLE 0x0008
  137. #define PHY_BMSR_LS 0x0004
  138. #define PHY_BMSR_JD 0x0002
  139. #define PHY_BMSR_EXT 0x0001
  140. /*phy ANLPAR */
  141. #define PHY_ANLPAR_NP 0x8000
  142. #define PHY_ANLPAR_ACK 0x4000
  143. #define PHY_ANLPAR_RF 0x2000
  144. #define PHY_ANLPAR_ASYMP 0x0800
  145. #define PHY_ANLPAR_PAUSE 0x0400
  146. #define PHY_ANLPAR_T4 0x0200
  147. #define PHY_ANLPAR_TXFD 0x0100
  148. #define PHY_ANLPAR_TX 0x0080
  149. #define PHY_ANLPAR_10FD 0x0040
  150. #define PHY_ANLPAR_10 0x0020
  151. #define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
  152. /* phy ANLPAR 1000BASE-X */
  153. #define PHY_X_ANLPAR_NP 0x8000
  154. #define PHY_X_ANLPAR_ACK 0x4000
  155. #define PHY_X_ANLPAR_RF_MASK 0x3000
  156. #define PHY_X_ANLPAR_PAUSE_MASK 0x0180
  157. #define PHY_X_ANLPAR_HD 0x0040
  158. #define PHY_X_ANLPAR_FD 0x0020
  159. #define PHY_ANLPAR_PSB_MASK 0x001f
  160. #define PHY_ANLPAR_PSB_802_3 0x0001
  161. #define PHY_ANLPAR_PSB_802_9 0x0002
  162. /* phy 1000BTCR */
  163. #define PHY_1000BTCR_1000FD 0x0200
  164. #define PHY_1000BTCR_1000HD 0x0100
  165. /* phy 1000BTSR */
  166. #define PHY_1000BTSR_MSCF 0x8000
  167. #define PHY_1000BTSR_MSCR 0x4000
  168. #define PHY_1000BTSR_LRS 0x2000
  169. #define PHY_1000BTSR_RRS 0x1000
  170. #define PHY_1000BTSR_1000FD 0x0800
  171. #define PHY_1000BTSR_1000HD 0x0400
  172. /* phy EXSR */
  173. #define PHY_EXSR_1000XF 0x8000
  174. #define PHY_EXSR_1000XH 0x4000
  175. #define PHY_EXSR_1000TF 0x2000
  176. #define PHY_EXSR_1000TH 0x1000
  177. #endif