fsl_esdhc.h 4.7 KB

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  1. /*
  2. * FSL SD/MMC Defines
  3. *-------------------------------------------------------------------
  4. *
  5. * Copyright 2007-2008, Freescale Semiconductor, Inc
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. *
  22. *-------------------------------------------------------------------
  23. *
  24. */
  25. #ifndef __FSL_ESDHC_H__
  26. #define __FSL_ESDHC_H__
  27. #include <asm/errno.h>
  28. /* FSL eSDHC-specific constants */
  29. #define SYSCTL 0x0002e02c
  30. #define SYSCTL_INITA 0x08000000
  31. #define SYSCTL_TIMEOUT_MASK 0x000f0000
  32. #define SYSCTL_CLOCK_MASK 0x00000fff
  33. #define SYSCTL_PEREN 0x00000004
  34. #define SYSCTL_HCKEN 0x00000002
  35. #define SYSCTL_IPGEN 0x00000001
  36. #define IRQSTAT 0x0002e030
  37. #define IRQSTAT_DMAE (0x10000000)
  38. #define IRQSTAT_AC12E (0x01000000)
  39. #define IRQSTAT_DEBE (0x00400000)
  40. #define IRQSTAT_DCE (0x00200000)
  41. #define IRQSTAT_DTOE (0x00100000)
  42. #define IRQSTAT_CIE (0x00080000)
  43. #define IRQSTAT_CEBE (0x00040000)
  44. #define IRQSTAT_CCE (0x00020000)
  45. #define IRQSTAT_CTOE (0x00010000)
  46. #define IRQSTAT_CINT (0x00000100)
  47. #define IRQSTAT_CRM (0x00000080)
  48. #define IRQSTAT_CINS (0x00000040)
  49. #define IRQSTAT_BRR (0x00000020)
  50. #define IRQSTAT_BWR (0x00000010)
  51. #define IRQSTAT_DINT (0x00000008)
  52. #define IRQSTAT_BGE (0x00000004)
  53. #define IRQSTAT_TC (0x00000002)
  54. #define IRQSTAT_CC (0x00000001)
  55. #define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
  56. #define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE)
  57. #define IRQSTATEN 0x0002e034
  58. #define IRQSTATEN_DMAE (0x10000000)
  59. #define IRQSTATEN_AC12E (0x01000000)
  60. #define IRQSTATEN_DEBE (0x00400000)
  61. #define IRQSTATEN_DCE (0x00200000)
  62. #define IRQSTATEN_DTOE (0x00100000)
  63. #define IRQSTATEN_CIE (0x00080000)
  64. #define IRQSTATEN_CEBE (0x00040000)
  65. #define IRQSTATEN_CCE (0x00020000)
  66. #define IRQSTATEN_CTOE (0x00010000)
  67. #define IRQSTATEN_CINT (0x00000100)
  68. #define IRQSTATEN_CRM (0x00000080)
  69. #define IRQSTATEN_CINS (0x00000040)
  70. #define IRQSTATEN_BRR (0x00000020)
  71. #define IRQSTATEN_BWR (0x00000010)
  72. #define IRQSTATEN_DINT (0x00000008)
  73. #define IRQSTATEN_BGE (0x00000004)
  74. #define IRQSTATEN_TC (0x00000002)
  75. #define IRQSTATEN_CC (0x00000001)
  76. #define PRSSTAT 0x0002e024
  77. #define PRSSTAT_CLSL (0x00800000)
  78. #define PRSSTAT_WPSPL (0x00080000)
  79. #define PRSSTAT_CDPL (0x00040000)
  80. #define PRSSTAT_CINS (0x00010000)
  81. #define PRSSTAT_BREN (0x00000800)
  82. #define PRSSTAT_DLA (0x00000004)
  83. #define PRSSTAT_CICHB (0x00000002)
  84. #define PRSSTAT_CIDHB (0x00000001)
  85. #define PROCTL 0x0002e028
  86. #define PROCTL_INIT 0x00000020
  87. #define PROCTL_DTW_4 0x00000002
  88. #define PROCTL_DTW_8 0x00000004
  89. #define CMDARG 0x0002e008
  90. #define XFERTYP 0x0002e00c
  91. #define XFERTYP_CMD(x) ((x & 0x3f) << 24)
  92. #define XFERTYP_CMDTYP_NORMAL 0x0
  93. #define XFERTYP_CMDTYP_SUSPEND 0x00400000
  94. #define XFERTYP_CMDTYP_RESUME 0x00800000
  95. #define XFERTYP_CMDTYP_ABORT 0x00c00000
  96. #define XFERTYP_DPSEL 0x00200000
  97. #define XFERTYP_CICEN 0x00100000
  98. #define XFERTYP_CCCEN 0x00080000
  99. #define XFERTYP_RSPTYP_NONE 0
  100. #define XFERTYP_RSPTYP_136 0x00010000
  101. #define XFERTYP_RSPTYP_48 0x00020000
  102. #define XFERTYP_RSPTYP_48_BUSY 0x00030000
  103. #define XFERTYP_MSBSEL 0x00000020
  104. #define XFERTYP_DTDSEL 0x00000010
  105. #define XFERTYP_AC12EN 0x00000004
  106. #define XFERTYP_BCEN 0x00000002
  107. #define XFERTYP_DMAEN 0x00000001
  108. #define CINS_TIMEOUT 1000
  109. #define DSADDR 0x2e004
  110. #define CMDRSP0 0x2e010
  111. #define CMDRSP1 0x2e014
  112. #define CMDRSP2 0x2e018
  113. #define CMDRSP3 0x2e01c
  114. #define DATPORT 0x2e020
  115. #define WML 0x2e044
  116. #define WML_WRITE 0x00010000
  117. #define BLKATTR 0x2e004
  118. #define BLKATTR_CNT(x) ((x & 0xffff) << 16)
  119. #define BLKATTR_SIZE(x) (x & 0x1fff)
  120. #define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */
  121. #define ESDHC_HOSTCAPBLT_VS18 0x04000000
  122. #define ESDHC_HOSTCAPBLT_VS30 0x02000000
  123. #define ESDHC_HOSTCAPBLT_VS33 0x01000000
  124. #define ESDHC_HOSTCAPBLT_SRS 0x00800000
  125. #define ESDHC_HOSTCAPBLT_DMAS 0x00400000
  126. #define ESDHC_HOSTCAPBLT_HSS 0x00200000
  127. #ifdef CONFIG_FSL_ESDHC
  128. int fsl_esdhc_mmc_init(bd_t *bis);
  129. void fdt_fixup_esdhc(void *blob, bd_t *bd);
  130. #else
  131. static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
  132. static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
  133. #endif /* CONFIG_FSL_ESDHC */
  134. #endif /* __FSL_ESDHC_H__ */