74xx_7xx.h 4.0 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Josh Huber, Mission Critical Linux, Inc. <huber@mclx.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * 74xx_7xx.h
  25. *
  26. * 74xx/7xx specific definitions
  27. */
  28. #ifndef __MPC74XX_H__
  29. #define __MPC74XX_H__
  30. /*----------------------------------------------------------------
  31. * Exception offsets (PowerPC standard)
  32. */
  33. #define EXC_OFF_SYS_RESET 0x0100 /* default system reset offset */
  34. #define _START_OFFSET EXC_OFF_SYS_RESET
  35. /*----------------------------------------------------------------
  36. * l2cr values
  37. */
  38. #define l2cr 1017
  39. #define L2CR_L2E 0x80000000 /* bit 0 - enable */
  40. #define L2CR_L2PE 0x40000000 /* bit 1 - data parity */
  41. #define L2CR_L2SIZ_2M 0x00000000 /* bits 2-3 - 2MB, MPC7400 only! */
  42. #define L2CR_L2SIZ_1M 0x30000000 /* ... 1MB */
  43. #define L2CR_L2SIZ_HM 0x20000000 /* ... 512K */
  44. #define L2CR_L2SIZ_QM 0x10000000 /* ... 256k */
  45. #define L2CR_L2CLK_1 0x02000000 /* bits 4-6 clock ratio div 1 */
  46. #define L2CR_L2CLK_1_5 0x04000000 /* bits 4-6 clock ratio div 1.5 */
  47. #define L2CR_L2CLK_2 0x08000000 /* bits 4-6 clock ratio div 2 */
  48. #define L2CR_L2CLK_2_5 0x0a000000 /* bits 4-6 clock ratio div 2.5 */
  49. #define L2CR_L2CLK_3 0x0c000000 /* bits 4-6 clock ratio div 3 */
  50. #define L2CR_L2CLK_3_5 0x06000000 /* bits 4-6 clock ratio div 3.5 */
  51. #define L2CR_L2CLK_4 0x0e000000 /* bits 4-6 clock ratio div 4 */
  52. #define L2CR_L2RAM_BURST 0x01000000 /* bits 7-8 - burst SRAM */
  53. #define L2CR_DO 0x00400000 /* bit 9 - enable caching of instr. in L2 */
  54. #define L2CR_L2I 0x00200000 /* bit 10 - global invalidate bit */
  55. #define L2CR_L2CTL 0x00100000 /* bit 11 - l2 ram control */
  56. #define L2CR_L2WT 0x00080000 /* bit 12 - l2 write-through */
  57. #define L2CR_TS 0x00040000 /* bit 13 - test support on */
  58. #define L2CR_TS_OFF -L2CR_TS /* bit 13 - test support off */
  59. #define L2CR_L2OH_5 0x00000000 /* bits 14-15 - output hold time = short */
  60. #define L2CR_L2OH_1 0x00010000 /* bits 14-15 - output hold time = medium */
  61. #define L2CR_L2OH_INV 0x00020000 /* bits 14-15 - output hold time = long */
  62. #define L2CR_L2IP 0x00000001 /* global invalidate in progress */
  63. #ifndef __ASSEMBLY__
  64. /* cpu ids we detect */
  65. typedef enum __cpu_t {
  66. CPU_740, CPU_750,
  67. CPU_740P, CPU_750P,
  68. CPU_745, CPU_755,
  69. CPU_750CX, CPU_750FX, CPU_750GX,
  70. CPU_7400,
  71. CPU_7410,
  72. CPU_7447A, CPU_7448,
  73. CPU_7450, CPU_7455, CPU_7457,
  74. CPU_UNKNOWN} cpu_t;
  75. extern cpu_t get_cpu_type(void);
  76. #define l1icache_enable icache_enable
  77. void l2cache_enable(void);
  78. void l1dcache_enable(void);
  79. static __inline__ unsigned long get_msr (void)
  80. {
  81. unsigned long msr;
  82. asm volatile("mfmsr %0" : "=r" (msr) :);
  83. return msr;
  84. }
  85. static __inline__ void set_msr (unsigned long msr)
  86. {
  87. asm volatile("mtmsr %0" : : "r" (msr));
  88. }
  89. static __inline__ unsigned long get_hid0 (void)
  90. {
  91. unsigned long hid0;
  92. asm volatile("mfspr %0, 1008" : "=r" (hid0) :);
  93. return hid0;
  94. }
  95. static __inline__ unsigned long get_hid1 (void)
  96. {
  97. unsigned long hid1;
  98. asm volatile("mfspr %0, 1009" : "=r" (hid1) :);
  99. return hid1;
  100. }
  101. static __inline__ void set_hid0 (unsigned long hid0)
  102. {
  103. asm volatile("mtspr 1008, %0" : : "r" (hid0));
  104. }
  105. static __inline__ void set_hid1 (unsigned long hid1)
  106. {
  107. asm volatile("mtspr 1009, %0" : : "r" (hid1));
  108. }
  109. #endif /* __ASSEMBLY__ */
  110. #endif /* __MPC74XX_H__ */