4xx_i2c.h 3.4 KB

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  1. /*
  2. * (C) Copyright 2007-2009
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef _4xx_i2c_h_
  24. #define _4xx_i2c_h_
  25. #define IIC_OK 0
  26. #define IIC_NOK 1
  27. #define IIC_NOK_LA 2 /* Lost arbitration */
  28. #define IIC_NOK_ICT 3 /* Incomplete transfer */
  29. #define IIC_NOK_XFRA 4 /* Transfer aborted */
  30. #define IIC_NOK_DATA 5 /* No data in buffer */
  31. #define IIC_NOK_TOUT 6 /* Transfer timeout */
  32. #define IIC_TIMEOUT 1 /* 1 second */
  33. #if defined(CONFIG_I2C_MULTI_BUS)
  34. #define I2C_BUS_OFFS (i2c_bus_num * 0x100)
  35. #else
  36. #define I2C_BUS_OFFS (0x000)
  37. #endif /* CONFIG_I2C_MULTI_BUS */
  38. #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  39. defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
  40. defined(CONFIG_460EX) || defined(CONFIG_460GT)
  41. #define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + I2C_BUS_OFFS)
  42. #elif defined(CONFIG_440) || defined(CONFIG_405EX)
  43. /* all remaining 440 variants */
  44. #define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + I2C_BUS_OFFS)
  45. #else
  46. /* all 405 variants */
  47. #define I2C_BASE_ADDR (0xEF600500 + I2C_BUS_OFFS)
  48. #endif
  49. struct ppc4xx_i2c {
  50. u8 mdbuf;
  51. u8 res1;
  52. u8 sdbuf;
  53. u8 res2;
  54. u8 lmadr;
  55. u8 hmadr;
  56. u8 cntl;
  57. u8 mdcntl;
  58. u8 sts;
  59. u8 extsts;
  60. u8 lsadr;
  61. u8 hsadr;
  62. u8 clkdiv;
  63. u8 intrmsk;
  64. u8 xfrcnt;
  65. u8 xtcntlss;
  66. u8 directcntl;
  67. u8 intr;
  68. };
  69. /* MDCNTL Register Bit definition */
  70. #define IIC_MDCNTL_HSCL 0x01
  71. #define IIC_MDCNTL_EUBS 0x02
  72. #define IIC_MDCNTL_EINT 0x04
  73. #define IIC_MDCNTL_ESM 0x08
  74. #define IIC_MDCNTL_FSM 0x10
  75. #define IIC_MDCNTL_EGC 0x20
  76. #define IIC_MDCNTL_FMDB 0x40
  77. #define IIC_MDCNTL_FSDB 0x80
  78. /* CNTL Register Bit definition */
  79. #define IIC_CNTL_PT 0x01
  80. #define IIC_CNTL_READ 0x02
  81. #define IIC_CNTL_CHT 0x04
  82. #define IIC_CNTL_RPST 0x08
  83. /* bit 2/3 for Transfer count*/
  84. #define IIC_CNTL_AMD 0x40
  85. #define IIC_CNTL_HMT 0x80
  86. /* STS Register Bit definition */
  87. #define IIC_STS_PT 0x01
  88. #define IIC_STS_IRQA 0x02
  89. #define IIC_STS_ERR 0x04
  90. #define IIC_STS_SCMP 0x08
  91. #define IIC_STS_MDBF 0x10
  92. #define IIC_STS_MDBS 0x20
  93. #define IIC_STS_SLPR 0x40
  94. #define IIC_STS_SSS 0x80
  95. /* EXTSTS Register Bit definition */
  96. #define IIC_EXTSTS_XFRA 0x01
  97. #define IIC_EXTSTS_ICT 0x02
  98. #define IIC_EXTSTS_LA 0x04
  99. /* XTCNTLSS Register Bit definition */
  100. #define IIC_XTCNTLSS_SRST 0x01
  101. #define IIC_XTCNTLSS_EPI 0x02
  102. #define IIC_XTCNTLSS_SDBF 0x04
  103. #define IIC_XTCNTLSS_SBDD 0x08
  104. #define IIC_XTCNTLSS_SWS 0x10
  105. #define IIC_XTCNTLSS_SWC 0x20
  106. #define IIC_XTCNTLSS_SRS 0x40
  107. #define IIC_XTCNTLSS_SRC 0x80
  108. /* IICx_DIRECTCNTL register */
  109. #define IIC_DIRCNTL_SDAC 0x08
  110. #define IIC_DIRCNTL_SCC 0x04
  111. #define IIC_DIRCNTL_MSDA 0x02
  112. #define IIC_DIRCNTL_MSC 0x01
  113. #define DIRCTNL_FREE(v) (((v) & 0x0f) == 0x0f)
  114. #endif