README.nios_DK 8.2 KB

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  1. ===============================================================================
  2. H A R D W A R E O V E R V I E W
  3. ===============================================================================
  4. ===============|===============|===============|===============|===============
  5. | DK20K200 | DK1C20 | DK1S10 | DK1S40
  6. ---------------|---------------|---------------|---------------|---------------
  7. | | | |
  8. Schem. Nr. | Nios Dev.Brd. | P06-08713-00 | P06-08468-01 | P06-09178-00
  9. Rev. | pilot. | 01 | 01 | 00
  10. Date | 2001/02/06 | 2003/02/20 | 2003/02/14 | 2003/05/14
  11. [1] | | | |
  12. ===============|===============|===============|===============|===============
  13. | | | |
  14. FPGA | "APEX" | "Cyclon" | "Stratix" | "Stratix"
  15. | EP20K200E | EP1C20 | EP1S10 | EP1S40
  16. | | |
  17. | (484 FBGA) | (400 FBGA) | (780 FBGA)
  18. [2],[3],[4] | | |
  19. ---------------|---------------|---------------|---------------|---------------
  20. | |
  21. Clock (OSC) | 33.333 MHz | 50 MHz
  22. | | (with ext. supply)
  23. |
  24. | PI49FCT3805
  25. [5] |
  26. ---------------|---------------|---------------|---------------|---------------
  27. | |
  28. Flash | 1 MByte | 8 MByte
  29. | |
  30. | AM29LV800BB | AM29LV065DU120REI
  31. | 8/16 bit bus | 8 bit bus
  32. | 1 chip | 1 chip
  33. [6],[7] | |
  34. ---------------|---------------|---------------|---------------|---------------
  35. | | |
  36. serial | no such | 4 MBits | no such
  37. Flash | | |
  38. | | EPCS4SI8 |
  39. [8] | | |
  40. ---------------|---------------|---------------|---------------|---------------
  41. | |
  42. Compact | no such, as | see below: prototype adapter
  43. Flash (CF) | module only |
  44. | |
  45. ---------------|---------------|---------------|---------------|---------------
  46. | |
  47. SRAM | 256 KByte | 1 MByte
  48. | |
  49. | IDT71V016S | IDT71V416S10PH
  50. | 32 bit bus | 32 bit bus
  51. | 2 chips | 2 chips
  52. | interlaced | interlaced
  53. [9],[10] | |
  54. ---------------|---------------|---------------|---------------|---------------
  55. | |
  56. SDRAM | SODIMM only | 16 MByte
  57. | |
  58. | | MT48LC4M32B2TG-7
  59. | 64 bit bus | 32 bit bus
  60. | | 1 chip
  61. [11] | |
  62. ===============|===============|===============|===============|===============
  63. | |
  64. serial I/O | 1 RS232 | 2 RS232
  65. | |
  66. | LTC1386 | MAX3237CAI
  67. | |
  68. | port 1: | port 1:
  69. | RxD / TxD, | RxD / TxD,
  70. | RTS / CTS | RTS / CTS, DTR / DSR, DCD, RI
  71. | |
  72. | ! ! ! ! ! ! | port 2: | port 2:
  73. | RTS/CTS can | RxD / TxD | RxD / TxD
  74. | be RxD/TxD | | RTS / CTS, DTR / DSR
  75. | of 2nd port | | DCD, RI
  76. [12],[13] | ! ! ! ! ! ! | |
  77. ---------------|---------------|---------------|---------------|---------------
  78. | |
  79. Ethernet | no such, as | 1 10BaseT / 100BaseT
  80. | module only |
  81. | | LAN91C111-NE
  82. | | 32 bit bus
  83. | | no external EEPROM
  84. | | LEDA# for link
  85. | | LEDB# for Rx / Tx
  86. [14] | |
  87. ===============|===============|===============|===============|===============
  88. | |
  89. user | 8 | no such
  90. switches | SW[7..0] |
  91. | |
  92. ---------------|---------------|---------------|---------------|---------------
  93. |
  94. user push | 4
  95. buttons | PB[3..0]
  96. |
  97. ---------------|---------------|---------------|---------------|---------------
  98. | |
  99. user LEDs | 2 | 8
  100. | LED[1..0] | LED[7..0]
  101. | |
  102. ---------------|---------------|---------------|---------------|---------------
  103. |
  104. user seven | 2
  105. segment | HEX[1..0][G..A,DP]
  106. |
  107. ===============|===============|===============|===============|===============
  108. | |
  109. 3.3V proto- | w/o level | no such -- only 5V
  110. type adapter | shift buffer |
  111. | |
  112. | 40 I/O pins |
  113. | 1 card sel. |
  114. | 1 reset out. |
  115. | 1 OSC clock |
  116. | 1 CPU clock |
  117. | 1 clock out. |
  118. | |
  119. ---------------|---------------|---------------|---------------|---------------
  120. | |
  121. 5V prototype | with level | 2 ports -- both card ports supplied with its
  122. adapter | shift buffer | own level shift buffer
  123. | |
  124. | 40 I/O pins | port 1 & 2:
  125. | 1 card sel. | 41 I/O pins
  126. | 1 Vee ? ? ? | 1 card select
  127. | 1 reset out. | 1 reset output (from dev/board)
  128. | 1 OSC clock | 1 OSC clock (from dev/board)
  129. | 1 CPU clock | 1 CPU clock (from dev/board)
  130. | 1 clock inp. | 1 clock input (to dev/board)
  131. | |
  132. | | (special) port 1:
  133. | | 1 CF select
  134. | | 1 CF present
  135. | | 1 CF ATA select
  136. | | 1 CF power
  137. | |
  138. | | NOTE: Both card ports are prepared for raw
  139. | | IDE working. You can connect such
  140. | | devices directly to the 40 pin header.
  141. | | The signal PDIAG (passed diagnostic)
  142. | | is not connected to any I/O signal.
  143. | | Card port 1 is hard wired to the on
  144. | | board Copact Flash adapter together
  145. | | with all other signals needed by CF
  146. | | cards. Hot plug should be working too.
  147. [15],[16] | |
  148. ===============|===============|===============|===============|===============
  149. | |
  150. config. CPLD | EPM7064 | EPM7128
  151. | |
  152. (alternative | decition by | decision by
  153. FPGA conf.) | jumper | push button
  154. | |
  155. | FPGA config. | FPGA config. | FPGA config.
  156. | from Flash | from Flash | from Flash
  157. | only | and EPCS4 | only
  158. | | |
  159. ===============|===============|===============|===============|===============
  160. ===============================================================================
  161. ===============================================================================
  162. R E F E R E N C E S
  163. ===============================================================================
  164. [1] http://www.altera.com/literature/lit-nio.jsp
  165. [2] http://www.altera.com/literature/lit-apx.jsp
  166. [3] http://www.altera.com/literature/lit-cyc.jsp
  167. [4] http://www.altera.com/literature/lit-stx.jsp
  168. [5] http://www.pericom.com/pdf/datasheets/PI49FCT3805.pdf
  169. http://www.pericom.com/products/clock/psempart.php?productID=PI49FCT3805
  170. [6] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1532,00.html
  171. http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21490.pdf
  172. [7] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1596,00.html
  173. http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23544b.pdf
  174. [8] http://www.altera.com/literature/lit-config.html
  175. http://preview.altera.com/literature/ds/micron.pdf
  176. [9] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V016SA.html
  177. [10] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V416SL.html
  178. [11] http://www.micron.com/products/dram/sdram/part.aspx?part=MT48LC4M32B2TG-7
  179. [12] http://www.linear.com/prod/datasheet.html?datasheet=33
  180. http://www.linear.com/pdf/1386fa.pdf
  181. [13] http://www.maxim-ic.com/quick_view2.cfm/qv_pk/1068/ln/en
  182. http://pdfserv.maxim-ic.com/en/ds/MAX3222-MAX3241.pdf
  183. [14] http://www.smsc.com/main/catalog/lan91c111.html
  184. [15] http://www.t13.org/index.html
  185. [16] http://www.compactflash.org/faqs/faq.htm
  186. ===============================================================================
  187. Stephan Linz <linz@li-pro.net>