README.dk1s10_std32 14 KB

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  1. TODO: specify IDE i/f
  2. specify OCI
  3. ===============================================================================
  4. C P U , M E M O R Y , I N / O U T C O M P O N E N T S
  5. ===============================================================================
  6. see also [1]-[5]
  7. CPU: "standard_32"
  8. 32 bit NIOS for 50 MHz
  9. 256 Byte for register file (15 levels)
  10. 4 KByte instruction cache (4 bytes in each cache line)
  11. 4 KByte data cache (4 bytes in each cache line)
  12. 2 KByte On Chip ROM with GERMS boot monitor
  13. 64 KByte On Chip RAM
  14. MSTEP multiplier
  15. no Debug Core
  16. On Chip Instrumentation (OCI) enabled
  17. U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000
  18. CONFIG_SYS_NIOS_CPU_ICACHE = 4096
  19. CONFIG_SYS_NIOS_CPU_DCACHE = 4096
  20. CONFIG_SYS_NIOS_CPU_REG_NUMS = 256
  21. CONFIG_SYS_NIOS_CPU_MUL = 0
  22. CONFIG_SYS_NIOS_CPU_MSTEP = 1
  23. CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
  24. OCI: (TODO)
  25. IRQ: Nr. | used by
  26. ------+--------------------------------------------------------
  27. 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16
  28. 25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25
  29. 30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30
  30. 35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35
  31. 40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40
  32. 50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50
  33. MEMORY: 8 MByte Flash
  34. 1 MByte SRAM
  35. 16 MByte SDRAM
  36. Timer: TIMER0: high priority programmable timer (IRQ16)
  37. TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50)
  38. U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1
  39. CONFIG_SYS_NIOS_CPU_USER_TIMER = 0
  40. PIO: Nr. | description
  41. ------+--------------------------------------------------------
  42. PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40)
  43. PIO1 | LCD: 11 in/outputs for ASCII LCD
  44. PIO2 | LED: 8 outputs for user LEDs
  45. PIO3 | SEVENSEG: 16 outputs for user seven segment display
  46. PIO4 | RECONF: 1 in/output for . . . . . . . . . . . .
  47. PIO5 | CFPRESENT: 1 input for CF present event (IRQ35)
  48. PIO6 | CFPOWER: 1 output to controll CF power supply
  49. PIO7 | CFATASEL: 1 output to controll CF ATA card select
  50. U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0
  51. CONFIG_SYS_NIOS_CPU_LCD_PIO = 1
  52. CONFIG_SYS_NIOS_CPU_LED_PIO = 2
  53. CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3
  54. CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4
  55. CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5
  56. CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6
  57. CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7
  58. UART: UART0: fixed baudrate of 115200, fixed protocol 8N1,
  59. without handshake RTS/CTS (IRQ25)
  60. LAN: SMsC LAN91C111 with:
  61. - offset 0x300 (LAN91C111_REGISTERS_OFFSET)
  62. - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH)
  63. IDE: (TODO)
  64. ===============================================================================
  65. M E M O R Y M A P
  66. ===============================================================================
  67. - - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - -
  68. 0x02000000 ---32-----------16|15------------0-
  69. | : | \
  70. | : | |
  71. SDRAM | : | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
  72. | : | | = 0x01000000
  73. | : | /
  74. 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE
  75. | |
  76. : gap :
  77. : :
  78. - - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
  79. : :
  80. : gap :
  81. | |
  82. 0x00920a80 ---32-----------16|15------------0-
  83. | | | \
  84. : (real size : : |
  85. IDE i/f : and content : : > 0x00000080
  86. [5] : unknown) : : |
  87. | | | /
  88. 0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0
  89. | (unused) | \
  90. + 0x1c |- - - - - - - - - - - - - - - -| |
  91. | (unused) | |
  92. + 0x18 |- - - - - - - - - - - - - - - -| |
  93. | (unused) | |
  94. + 0x14 |- - - - - - - - - - - - - - - -| |
  95. TIMER1 | (unused) | |
  96. [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
  97. | (unused) | |
  98. + 0x0c |- - - - - - - - - - - - - - - -| |
  99. | (unused) | |
  100. + 0x08 |- - - - - - - - - - - - - - - -| |
  101. | control (1 bit) (rw) | |
  102. + 0x04 |- - - - - - - - - - - - - - - -| |
  103. | status (2 bit) (rw) | /
  104. 0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1
  105. | (unused) | \
  106. + 0x0c |- - - - - - - - - - - - - - - -| |
  107. PIO7 | (unused) | |
  108. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  109. | (unused) | |
  110. + 0x04 |- - - - - - - - - - - - - - - -| |
  111. | data (1 bit) (wo) | /
  112. 0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7
  113. | (unused) | \
  114. + 0x0c |- - - - - - - - - - - - - - - -| |
  115. PIO6 | (unused) | |
  116. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  117. | (unused) | |
  118. + 0x04 |- - - - - - - - - - - - - - - -| |
  119. | data (1 bit) (wo) | /
  120. 0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6
  121. | edgecapture (1 bit) (rw) | \
  122. + 0x0c |- - - - - - - - - - - - - - - -| |
  123. PIO5 | interruptmask (1 bit) (rw) | |
  124. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  125. | (unused) | |
  126. + 0x04 |- - - - - - - - - - - - - - - -| |
  127. | data (1 bit) (ro) | /
  128. 0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5
  129. | (unused) | \
  130. + 0x0c |- - - - - - - - - - - - - - - -| |
  131. PIO4 | (unused) | |
  132. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  133. | direction (1 bit) (rw) | |
  134. + 0x04 |- - - - - - - - - - - - - - - -| |
  135. | data (1 bit) (rw) | /
  136. 0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4
  137. | (unused) | \
  138. + 0x0c |- - - - - - - - - - - - - - - -| |
  139. PIO3 | (unused) | |
  140. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  141. | (unused) | |
  142. + 0x04 |- - - - - - - - - - - - - - - -| |
  143. | data (16 bit) (wo) | /
  144. 0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3
  145. | (unused) | \
  146. + 0x0c |- - - - - - - - - - - - - - - -| |
  147. PIO2 | (unused) | |
  148. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  149. | (unused) | |
  150. + 0x04 |- - - - - - - - - - - - - - - -| |
  151. | data (8 bit) (wo) | /
  152. 0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2
  153. | (unused) | \
  154. + 0x0c |- - - - - - - - - - - - - - - -| |
  155. PIO1 | (unused) | |
  156. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  157. | direction (11 bit) (rw) | |
  158. + 0x04 |- - - - - - - - - - - - - - - -| |
  159. | data (11 bit) (rw) | /
  160. 0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
  161. | edgecapture (4 bit) (rw) | \
  162. + 0x0c |- - - - - - - - - - - - - - - -| |
  163. PIO0 | interruptmask (4 bit) (rw) | |
  164. [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
  165. | (unused) | |
  166. + 0x04 |- - - - - - - - - - - - - - - -| |
  167. | data (4 bit) (ro) | /
  168. 0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
  169. | (unused) | \
  170. + 0x1c |- - - - - - - - - - - - - - - -| |
  171. | (unused) | |
  172. + 0x18 |- - - - - - - - - - - - - - - -| |
  173. | snaph (16 bit) (rw) | |
  174. + 0x14 |- - - - - - - - - - - - - - - -| |
  175. TIMER0 | snapl (16 bit) (rw) | |
  176. [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
  177. | periodh (16 bit) (rw) | |
  178. + 0x0c |- - - - - - - - - - - - - - - -| |
  179. | periodl (16 bit) (rw) | |
  180. + 0x08 |- - - - - - - - - - - - - - - -| |
  181. | control (4 bit) (rw) | |
  182. + 0x04 |- - - - - - - - - - - - - - - -| |
  183. | status (2 bit) (rw) | /
  184. 0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
  185. | | \
  186. : gap : > (space for UART1)
  187. | | /
  188. 0x00920920 ---32-----------16|15------------0-
  189. | (unused) | \
  190. + 0x1c |- - - - - - - - - - - - - - - -| |
  191. | (unused) | |
  192. + 0x18 |- - - - - - - - - - - - - - - -| |
  193. | (unused) | |
  194. + 0x14 |- - - - - - - - - - - - - - - -| |
  195. UART0 | (unused) | > 0x00000020
  196. [2] + 0x10 |- - - - - - - - - - - - - - - -| |
  197. | control (10 bit) (rw) | |
  198. + 0x0c |- - - - - - - - - - - - - - - -| |
  199. | status (10 bit) (rw) | |
  200. + 0x08 |- - - - - - - - - - - - - - - -| |
  201. | txdata (8 bit) (wo) | |
  202. + 0x04 |- - - - - - - - - - - - - - - -| |
  203. | rxdata (8 bit) (ro) | /
  204. 0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
  205. - - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - -
  206. 0x00920900 -----------------------------------
  207. | | \
  208. : (real size : |
  209. OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE
  210. : unknown) : | = 0x00000100
  211. | | /
  212. 0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE
  213. - - - - - - - - - - - on chip memory 2 - - - - - - - - - - -
  214. 0x00920800 ---32-----------16|15------------0-
  215. | : | \
  216. | : | |
  217. GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE
  218. | : | | = 0x00000800
  219. | : | /
  220. 0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT
  221. 0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE
  222. - - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - -
  223. 0x00920000 ---32-----------16|15------------0-
  224. | gap | \
  225. 0x00910310 --+-------------------------------| |
  226. | | |
  227. | register bank (size = 0x10) | |
  228. | +--------.---.---.--- | |
  229. | | bank 0 \ 1 \ 2 \ 3 \ | |
  230. | |---------------------------+ | |
  231. LAN91C111 | | BANK | RESERVED | | |
  232. | |- - - - - - -|- - - - - - -| | > na_lan91c111_size
  233. | | RPCR | MIR | | | = 0x00010000
  234. | |- - - - - - -|- - - - - - -| | |
  235. | | COUNTER | RCR | | |
  236. | |- - - - - - -|- - - - - - -| | |
  237. | | EPH STATUS | TCR | | |
  238. | +---------------------------+ | |
  239. 0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| |
  240. | gap | /
  241. 0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE
  242. - - - - - - - - - - - on chip memory 1 - - - - - - - - - - -
  243. 0x00910000 ---32-----------16|15------------0-
  244. | : | \
  245. | : | |
  246. onchip RAM | : | > CONFIG_SYS_NIOS_CPU_RAM_SIZE
  247. | : | | = 0x00010000
  248. | : | /
  249. 0x00900000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_RAM_BASE
  250. - - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - -
  251. 0x00900000 ---32-----------16|15------------0-
  252. 0x00900000 --+32-----------16|15------------0+
  253. | . | \ \
  254. | . | | |
  255. | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
  256. | . | | | = 0x00000100
  257. | . | | /
  258. 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE
  259. 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK
  260. | . | | \
  261. | . | | |
  262. | . | | > stack area
  263. | . | | |
  264. | . | | V
  265. | . | |
  266. SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
  267. | . | | = 0x00100000
  268. | | /
  269. 0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
  270. 0x00800000 ---8-------------4|3-------------0-
  271. | sector 127 | \
  272. + 0x7f0000 |- - - - - - - - - - - - - - - -| |
  273. | : | |
  274. Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
  275. | sector 1 : | | = 0x00800000
  276. + 0x010000 |- - - - - - - - - - - - - - - -| |
  277. | sector 0 (size = 0x10000) | /
  278. 0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
  279. ===============================================================================
  280. F L A S H M E M O R Y A L L O C A T I O N
  281. ===============================================================================
  282. 0x00800000 ---8-------------4|3-------------0-
  283. | : | \
  284. SAFE | : | > 1 MByte
  285. FPGA conf. | : | / (NOT usable by software)
  286. 0x00700000 --+- - - - - - - -:- - - - - - - -+-
  287. | : | \
  288. USER | : | > 1 MByte
  289. FPGA conf. | : | / (NOT usable by software)
  290. 0x00600000 --+- - - - - - - -:- - - - - - - -+-
  291. | : | \
  292. | : | |
  293. WEB pages | : | > 2 MByte
  294. | : | | (provisory usable)
  295. | : | /
  296. 0x00400000 --+- - - - - - - -:- - - - - - - -+-
  297. | : | \
  298. | : | |
  299. | : | |
  300. | : | > 4 MByte free for use
  301. | : | |
  302. 0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start()
  303. | : | /
  304. 0x00000000 |- - - - - - - -:- - - - - - - -+- - u-boot environment
  305. 0x00000000 ---8-------------4|3-------------0-
  306. ===============================================================================
  307. R E F E R E N C E S
  308. ===============================================================================
  309. [1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s10.pdf
  310. [2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
  311. [3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
  312. [4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
  313. [5] http://www.opencores.org/projects/ata/
  314. http://www.t13.org/index.html
  315. ===============================================================================
  316. Stephan Linz <linz@li-pro.net>