README.bus_vcxk 2.5 KB

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  1. /*
  2. * (C) Copyright 2008-2009
  3. * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
  4. * Jens Scharsig <esw@bus-elektronik.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. U-Boot vcxk video controller driver
  25. ======================================
  26. By defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and
  27. VC8K devices on following boards:
  28. board | ARCH | Vendor
  29. -----------------------------------------------------------------------
  30. EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG
  31. EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG
  32. EB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG
  33. ZLSA | AT91RM9200 | Ruf Telematik AG
  34. Driver configuration
  35. --------------------
  36. The driver needs some defines to describe the target hardware:
  37. CONFIG_SYS_VCXK_BASE
  38. base address of VCxK hardware memory
  39. CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
  40. defines the physical alignment of a pixel row
  41. CONFIG_SYS_VCXK_DOUBLEBUFFERED
  42. some boards that use vcxk prevent read from framebuffer memory.
  43. define this option to enable double buffering (needs 16KiB RAM)
  44. CONFIG_SYS_VCXK_<xxxx>_PIN
  45. defines the number of the I/O line PIN in the port
  46. valid values for <xxxx> are:
  47. ACKNOWLEDGE
  48. describes the acknowledge line from vcxk hardware
  49. ENABLE
  50. describes the enable line to vcxk hardware
  51. INVERT
  52. describes the invert line to vcxk hardware
  53. RESET
  54. describes the reset line to vcxk hardware
  55. REQUEST
  56. describes the request line to vcxk hardware
  57. CONFIG_SYS_VCXK_<xxxx>_PORT
  58. defines the I/O port which is connected with the line
  59. for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN
  60. CONFIG_SYS_VCXK_<xxxx>_DDR
  61. defines the register which configures the direction
  62. for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN