cmd_fpga.c 9.2 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * FPGA support
  26. */
  27. #include <common.h>
  28. #include <command.h>
  29. #if defined(CONFIG_CMD_NET)
  30. #include <net.h>
  31. #endif
  32. #include <fpga.h>
  33. #include <malloc.h>
  34. #if 0
  35. #define FPGA_DEBUG
  36. #endif
  37. #ifdef FPGA_DEBUG
  38. #define PRINTF(fmt,args...) printf (fmt ,##args)
  39. #else
  40. #define PRINTF(fmt,args...)
  41. #endif
  42. /* Local functions */
  43. static void fpga_usage (cmd_tbl_t * cmdtp);
  44. static int fpga_get_op (char *opstr);
  45. /* Local defines */
  46. #define FPGA_NONE -1
  47. #define FPGA_INFO 0
  48. #define FPGA_LOAD 1
  49. #define FPGA_LOADB 2
  50. #define FPGA_DUMP 3
  51. #define FPGA_LOADMK 4
  52. /* Convert bitstream data and load into the fpga */
  53. int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
  54. {
  55. #if defined(CONFIG_FPGA_XILINX)
  56. unsigned int length;
  57. unsigned int swapsize;
  58. char buffer[80];
  59. unsigned char *dataptr;
  60. unsigned int i;
  61. int rc;
  62. dataptr = (unsigned char *)fpgadata;
  63. /* skip the first bytes of the bitsteam, their meaning is unknown */
  64. length = (*dataptr << 8) + *(dataptr+1);
  65. dataptr+=2;
  66. dataptr+=length;
  67. /* get design name (identifier, length, string) */
  68. length = (*dataptr << 8) + *(dataptr+1);
  69. dataptr+=2;
  70. if (*dataptr++ != 0x61) {
  71. PRINTF ("%s: Design name identifier not recognized in bitstream\n",
  72. __FUNCTION__ );
  73. return FPGA_FAIL;
  74. }
  75. length = (*dataptr << 8) + *(dataptr+1);
  76. dataptr+=2;
  77. for(i=0;i<length;i++)
  78. buffer[i] = *dataptr++;
  79. printf(" design filename = \"%s\"\n", buffer);
  80. /* get part number (identifier, length, string) */
  81. if (*dataptr++ != 0x62) {
  82. printf("%s: Part number identifier not recognized in bitstream\n",
  83. __FUNCTION__ );
  84. return FPGA_FAIL;
  85. }
  86. length = (*dataptr << 8) + *(dataptr+1);
  87. dataptr+=2;
  88. for(i=0;i<length;i++)
  89. buffer[i] = *dataptr++;
  90. printf(" part number = \"%s\"\n", buffer);
  91. /* get date (identifier, length, string) */
  92. if (*dataptr++ != 0x63) {
  93. printf("%s: Date identifier not recognized in bitstream\n",
  94. __FUNCTION__);
  95. return FPGA_FAIL;
  96. }
  97. length = (*dataptr << 8) + *(dataptr+1);
  98. dataptr+=2;
  99. for(i=0;i<length;i++)
  100. buffer[i] = *dataptr++;
  101. printf(" date = \"%s\"\n", buffer);
  102. /* get time (identifier, length, string) */
  103. if (*dataptr++ != 0x64) {
  104. printf("%s: Time identifier not recognized in bitstream\n",__FUNCTION__);
  105. return FPGA_FAIL;
  106. }
  107. length = (*dataptr << 8) + *(dataptr+1);
  108. dataptr+=2;
  109. for(i=0;i<length;i++)
  110. buffer[i] = *dataptr++;
  111. printf(" time = \"%s\"\n", buffer);
  112. /* get fpga data length (identifier, length) */
  113. if (*dataptr++ != 0x65) {
  114. printf("%s: Data length identifier not recognized in bitstream\n",
  115. __FUNCTION__);
  116. return FPGA_FAIL;
  117. }
  118. swapsize = ((unsigned int) *dataptr <<24) +
  119. ((unsigned int) *(dataptr+1) <<16) +
  120. ((unsigned int) *(dataptr+2) <<8 ) +
  121. ((unsigned int) *(dataptr+3) ) ;
  122. dataptr+=4;
  123. printf(" bytes in bitstream = %d\n", swapsize);
  124. rc = fpga_load(dev, dataptr, swapsize);
  125. return rc;
  126. #else
  127. printf("Bitstream support only for Xilinx devices\n");
  128. return FPGA_FAIL;
  129. #endif
  130. }
  131. /* ------------------------------------------------------------------------- */
  132. /* command form:
  133. * fpga <op> <device number> <data addr> <datasize>
  134. * where op is 'load', 'dump', or 'info'
  135. * If there is no device number field, the fpga environment variable is used.
  136. * If there is no data addr field, the fpgadata environment variable is used.
  137. * The info command requires no data address field.
  138. */
  139. int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
  140. {
  141. int op, dev = FPGA_INVALID_DEVICE;
  142. size_t data_size = 0;
  143. void *fpga_data = NULL;
  144. char *devstr = getenv ("fpga");
  145. char *datastr = getenv ("fpgadata");
  146. int rc = FPGA_FAIL;
  147. #if defined (CONFIG_FIT)
  148. const char *fit_uname = NULL;
  149. ulong fit_addr;
  150. #endif
  151. if (devstr)
  152. dev = (int) simple_strtoul (devstr, NULL, 16);
  153. if (datastr)
  154. fpga_data = (void *) simple_strtoul (datastr, NULL, 16);
  155. switch (argc) {
  156. case 5: /* fpga <op> <dev> <data> <datasize> */
  157. data_size = simple_strtoul (argv[4], NULL, 16);
  158. case 4: /* fpga <op> <dev> <data> */
  159. #if defined(CONFIG_FIT)
  160. if (fit_parse_subimage (argv[3], (ulong)fpga_data,
  161. &fit_addr, &fit_uname)) {
  162. fpga_data = (void *)fit_addr;
  163. debug ("* fpga: subimage '%s' from FIT image at 0x%08lx\n",
  164. fit_uname, fit_addr);
  165. } else
  166. #endif
  167. {
  168. fpga_data = (void *) simple_strtoul (argv[3], NULL, 16);
  169. debug ("* fpga: cmdline image address = 0x%08lx\n", (ulong)fpga_data);
  170. }
  171. PRINTF ("%s: fpga_data = 0x%x\n", __FUNCTION__, (uint) fpga_data);
  172. case 3: /* fpga <op> <dev | data addr> */
  173. dev = (int) simple_strtoul (argv[2], NULL, 16);
  174. PRINTF ("%s: device = %d\n", __FUNCTION__, dev);
  175. /* FIXME - this is a really weak test */
  176. if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */
  177. PRINTF ("%s: Assuming buffer pointer in arg 3\n",
  178. __FUNCTION__);
  179. #if defined(CONFIG_FIT)
  180. if (fit_parse_subimage (argv[2], (ulong)fpga_data,
  181. &fit_addr, &fit_uname)) {
  182. fpga_data = (void *)fit_addr;
  183. debug ("* fpga: subimage '%s' from FIT image at 0x%08lx\n",
  184. fit_uname, fit_addr);
  185. } else
  186. #endif
  187. {
  188. fpga_data = (void *) dev;
  189. debug ("* fpga: cmdline image address = 0x%08lx\n", (ulong)fpga_data);
  190. }
  191. PRINTF ("%s: fpga_data = 0x%x\n",
  192. __FUNCTION__, (uint) fpga_data);
  193. dev = FPGA_INVALID_DEVICE; /* reset device num */
  194. }
  195. case 2: /* fpga <op> */
  196. op = (int) fpga_get_op (argv[1]);
  197. break;
  198. default:
  199. PRINTF ("%s: Too many or too few args (%d)\n",
  200. __FUNCTION__, argc);
  201. op = FPGA_NONE; /* force usage display */
  202. break;
  203. }
  204. switch (op) {
  205. case FPGA_NONE:
  206. fpga_usage (cmdtp);
  207. break;
  208. case FPGA_INFO:
  209. rc = fpga_info (dev);
  210. break;
  211. case FPGA_LOAD:
  212. rc = fpga_load (dev, fpga_data, data_size);
  213. break;
  214. case FPGA_LOADB:
  215. rc = fpga_loadbitstream(dev, fpga_data, data_size);
  216. break;
  217. case FPGA_LOADMK:
  218. switch (genimg_get_format (fpga_data)) {
  219. case IMAGE_FORMAT_LEGACY:
  220. {
  221. image_header_t *hdr = (image_header_t *)fpga_data;
  222. ulong data;
  223. data = (ulong)image_get_data (hdr);
  224. data_size = image_get_data_size (hdr);
  225. rc = fpga_load (dev, (void *)data, data_size);
  226. }
  227. break;
  228. #if defined(CONFIG_FIT)
  229. case IMAGE_FORMAT_FIT:
  230. {
  231. const void *fit_hdr = (const void *)fpga_data;
  232. int noffset;
  233. void *fit_data;
  234. if (fit_uname == NULL) {
  235. puts ("No FIT subimage unit name\n");
  236. return 1;
  237. }
  238. if (!fit_check_format (fit_hdr)) {
  239. puts ("Bad FIT image format\n");
  240. return 1;
  241. }
  242. /* get fpga component image node offset */
  243. noffset = fit_image_get_node (fit_hdr, fit_uname);
  244. if (noffset < 0) {
  245. printf ("Can't find '%s' FIT subimage\n", fit_uname);
  246. return 1;
  247. }
  248. /* verify integrity */
  249. if (!fit_image_check_hashes (fit_hdr, noffset)) {
  250. puts ("Bad Data Hash\n");
  251. return 1;
  252. }
  253. /* get fpga subimage data address and length */
  254. if (fit_image_get_data (fit_hdr, noffset, &fit_data, &data_size)) {
  255. puts ("Could not find fpga subimage data\n");
  256. return 1;
  257. }
  258. rc = fpga_load (dev, fit_data, data_size);
  259. }
  260. break;
  261. #endif
  262. default:
  263. puts ("** Unknown image type\n");
  264. rc = FPGA_FAIL;
  265. break;
  266. }
  267. break;
  268. case FPGA_DUMP:
  269. rc = fpga_dump (dev, fpga_data, data_size);
  270. break;
  271. default:
  272. printf ("Unknown operation\n");
  273. fpga_usage (cmdtp);
  274. break;
  275. }
  276. return (rc);
  277. }
  278. static void fpga_usage (cmd_tbl_t * cmdtp)
  279. {
  280. cmd_usage(cmdtp);
  281. }
  282. /*
  283. * Map op to supported operations. We don't use a table since we
  284. * would just have to relocate it from flash anyway.
  285. */
  286. static int fpga_get_op (char *opstr)
  287. {
  288. int op = FPGA_NONE;
  289. if (!strcmp ("info", opstr)) {
  290. op = FPGA_INFO;
  291. } else if (!strcmp ("loadb", opstr)) {
  292. op = FPGA_LOADB;
  293. } else if (!strcmp ("load", opstr)) {
  294. op = FPGA_LOAD;
  295. } else if (!strcmp ("loadmk", opstr)) {
  296. op = FPGA_LOADMK;
  297. } else if (!strcmp ("dump", opstr)) {
  298. op = FPGA_DUMP;
  299. }
  300. if (op == FPGA_NONE) {
  301. printf ("Unknown fpga operation \"%s\"\n", opstr);
  302. }
  303. return op;
  304. }
  305. U_BOOT_CMD (fpga, 6, 1, do_fpga,
  306. "loadable FPGA image support",
  307. "fpga [operation type] [device number] [image address] [image size]\n"
  308. "fpga operations:\n"
  309. "\tinfo\tlist known device information\n"
  310. "\tload\tLoad device from memory buffer\n"
  311. "\tloadb\tLoad device from bitstream buffer (Xilinx devices only)\n"
  312. "\tloadmk\tLoad device generated with mkimage\n"
  313. "\tdump\tLoad device to memory buffer"
  314. #if defined(CONFIG_FIT)
  315. "\n"
  316. "\tFor loadmk operating on FIT format uImage address must include\n"
  317. "\tsubimage unit name in the form of addr:<subimg_uname>"
  318. #endif
  319. );