dnet.c 9.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396
  1. /*
  2. * Dave Ethernet Controller driver
  3. *
  4. * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <common.h>
  11. #ifndef CONFIG_DNET_AUTONEG_TIMEOUT
  12. #define CONFIG_DNET_AUTONEG_TIMEOUT 5000000 /* default value */
  13. #endif
  14. #include <net.h>
  15. #include <malloc.h>
  16. #include <linux/mii.h>
  17. #include <miiphy.h>
  18. #include <asm/io.h>
  19. #include "dnet.h"
  20. struct dnet_device {
  21. struct dnet_registers *regs;
  22. const struct device *dev;
  23. struct eth_device netdev;
  24. unsigned short phy_addr;
  25. };
  26. /* get struct dnet_device from given struct netdev */
  27. #define to_dnet(_nd) container_of(_nd, struct dnet_device, netdev)
  28. /* function for reading internal MAC register */
  29. u16 dnet_readw_mac(struct dnet_device *dnet, u16 reg)
  30. {
  31. u16 data_read;
  32. /* issue a read */
  33. writel(reg, &dnet->regs->MACREG_ADDR);
  34. /* since a read/write op to the MAC is very slow,
  35. * we must wait before reading the data */
  36. udelay(1);
  37. /* read data read from the MAC register */
  38. data_read = readl(&dnet->regs->MACREG_DATA);
  39. /* all done */
  40. return data_read;
  41. }
  42. /* function for writing internal MAC register */
  43. void dnet_writew_mac(struct dnet_device *dnet, u16 reg, u16 val)
  44. {
  45. /* load data to write */
  46. writel(val, &dnet->regs->MACREG_DATA);
  47. /* issue a write */
  48. writel(reg | DNET_INTERNAL_WRITE, &dnet->regs->MACREG_ADDR);
  49. /* since a read/write op to the MAC is very slow,
  50. * we must wait before exiting */
  51. udelay(1);
  52. }
  53. static void dnet_mdio_write(struct dnet_device *dnet, u8 reg, u16 value)
  54. {
  55. u16 tmp;
  56. debug(DRIVERNAME "dnet_mdio_write %02x:%02x <- %04x\n",
  57. dnet->phy_addr, reg, value);
  58. while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
  59. DNET_INTERNAL_GMII_MNG_CMD_FIN))
  60. ;
  61. /* prepare for a write operation */
  62. tmp = (1 << 13);
  63. /* only 5 bits allowed for register offset */
  64. reg &= 0x1f;
  65. /* prepare reg_value for a write */
  66. tmp |= (dnet->phy_addr << 8);
  67. tmp |= reg;
  68. /* write data to write first */
  69. dnet_writew_mac(dnet, DNET_INTERNAL_GMII_MNG_DAT_REG, value);
  70. /* write control word */
  71. dnet_writew_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG, tmp);
  72. while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
  73. DNET_INTERNAL_GMII_MNG_CMD_FIN))
  74. ;
  75. }
  76. static u16 dnet_mdio_read(struct dnet_device *dnet, u8 reg)
  77. {
  78. u16 value;
  79. while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
  80. DNET_INTERNAL_GMII_MNG_CMD_FIN))
  81. ;
  82. /* only 5 bits allowed for register offset*/
  83. reg &= 0x1f;
  84. /* prepare reg_value for a read */
  85. value = (dnet->phy_addr << 8);
  86. value |= reg;
  87. /* write control word */
  88. dnet_writew_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG, value);
  89. /* wait for end of transfer */
  90. while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) &
  91. DNET_INTERNAL_GMII_MNG_CMD_FIN))
  92. ;
  93. value = dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_DAT_REG);
  94. debug(DRIVERNAME "dnet_mdio_read %02x:%02x <- %04x\n",
  95. dnet->phy_addr, reg, value);
  96. return value;
  97. }
  98. static int dnet_send(struct eth_device *netdev, volatile void *packet,
  99. int length)
  100. {
  101. struct dnet_device *dnet = to_dnet(netdev);
  102. int i, len, wrsz;
  103. unsigned int *bufp;
  104. unsigned int tx_cmd;
  105. debug(DRIVERNAME "[%s] Sending %u bytes\n", __func__, length);
  106. /* frame size (words) */
  107. len = (length + 3) >> 2;
  108. bufp = (unsigned int *) (((u32)packet) & 0xFFFFFFFC);
  109. wrsz = (u32)length + 3;
  110. wrsz += ((u32)packet) & 0x3;
  111. wrsz >>= 2;
  112. tx_cmd = ((((unsigned int)(packet)) & 0x03) << 16) | (u32)length;
  113. /* check if there is enough room for the current frame */
  114. if (wrsz < (DNET_FIFO_SIZE - readl(&dnet->regs->TX_FIFO_WCNT))) {
  115. for (i = 0; i < wrsz; i++)
  116. writel(*bufp++, &dnet->regs->TX_DATA_FIFO);
  117. /*
  118. * inform MAC that a packet's written and ready
  119. * to be shipped out
  120. */
  121. writel(tx_cmd, &dnet->regs->TX_LEN_FIFO);
  122. } else {
  123. printf(DRIVERNAME "No free space (actual %d, required %d "
  124. "(words))\n", DNET_FIFO_SIZE -
  125. readl(&dnet->regs->TX_FIFO_WCNT), wrsz);
  126. }
  127. /* No one cares anyway */
  128. return 0;
  129. }
  130. static int dnet_recv(struct eth_device *netdev)
  131. {
  132. struct dnet_device *dnet = to_dnet(netdev);
  133. unsigned int *data_ptr;
  134. int pkt_len, poll, i;
  135. u32 cmd_word;
  136. debug("Waiting for pkt (polling)\n");
  137. poll = 50;
  138. while ((readl(&dnet->regs->RX_FIFO_WCNT) >> 16) == 0) {
  139. udelay(10); /* wait 10 usec */
  140. if (--poll == 0)
  141. return 0; /* no pkt available */
  142. }
  143. cmd_word = readl(&dnet->regs->RX_LEN_FIFO);
  144. pkt_len = cmd_word & 0xFFFF;
  145. debug("Got pkt with size %d bytes\n", pkt_len);
  146. if (cmd_word & 0xDF180000)
  147. printf("%s packet receive error %x\n", __func__, cmd_word);
  148. data_ptr = (unsigned int *) NetRxPackets[0];
  149. for (i = 0; i < (pkt_len + 3) >> 2; i++)
  150. *data_ptr++ = readl(&dnet->regs->RX_DATA_FIFO);
  151. NetReceive(NetRxPackets[0], pkt_len + 5); /* ok + 5 ?? */
  152. return 0;
  153. }
  154. static void dnet_set_hwaddr(struct eth_device *netdev)
  155. {
  156. struct dnet_device *dnet = to_dnet(netdev);
  157. u16 tmp;
  158. tmp = cpu_to_be16(*((u16 *)netdev->enetaddr));
  159. dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_0_REG, tmp);
  160. tmp = cpu_to_be16(*((u16 *)(netdev->enetaddr + 2)));
  161. dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_1_REG, tmp);
  162. tmp = cpu_to_be16(*((u16 *)(netdev->enetaddr + 4)));
  163. dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_2_REG, tmp);
  164. }
  165. static void dnet_phy_reset(struct dnet_device *dnet)
  166. {
  167. struct eth_device *netdev = &dnet->netdev;
  168. int i;
  169. u16 status, adv;
  170. adv = ADVERTISE_CSMA | ADVERTISE_ALL;
  171. dnet_mdio_write(dnet, MII_ADVERTISE, adv);
  172. printf("%s: Starting autonegotiation...\n", netdev->name);
  173. dnet_mdio_write(dnet, MII_BMCR, (BMCR_ANENABLE
  174. | BMCR_ANRESTART));
  175. for (i = 0; i < CONFIG_DNET_AUTONEG_TIMEOUT / 100; i++) {
  176. status = dnet_mdio_read(dnet, MII_BMSR);
  177. if (status & BMSR_ANEGCOMPLETE)
  178. break;
  179. udelay(100);
  180. }
  181. if (status & BMSR_ANEGCOMPLETE)
  182. printf("%s: Autonegotiation complete\n", netdev->name);
  183. else
  184. printf("%s: Autonegotiation timed out (status=0x%04x)\n",
  185. netdev->name, status);
  186. }
  187. static int dnet_phy_init(struct dnet_device *dnet)
  188. {
  189. struct eth_device *netdev = &dnet->netdev;
  190. u16 phy_id, status, adv, lpa;
  191. int media, speed, duplex;
  192. int i;
  193. u32 ctl_reg;
  194. /* Find a PHY */
  195. for (i = 0; i < 32; i++) {
  196. dnet->phy_addr = i;
  197. phy_id = dnet_mdio_read(dnet, MII_PHYSID1);
  198. if (phy_id != 0xffff) {
  199. /* ok we found it */
  200. printf("Found PHY at address %d PHYID (%04x:%04x)\n",
  201. i, phy_id,
  202. dnet_mdio_read(dnet, MII_PHYSID2));
  203. break;
  204. }
  205. }
  206. /* Check if the PHY is up to snuff... */
  207. phy_id = dnet_mdio_read(dnet, MII_PHYSID1);
  208. if (phy_id == 0xffff) {
  209. printf("%s: No PHY present\n", netdev->name);
  210. return -1;
  211. }
  212. status = dnet_mdio_read(dnet, MII_BMSR);
  213. if (!(status & BMSR_LSTATUS)) {
  214. /* Try to re-negotiate if we don't have link already. */
  215. dnet_phy_reset(dnet);
  216. for (i = 0; i < CONFIG_DNET_AUTONEG_TIMEOUT / 100; i++) {
  217. status = dnet_mdio_read(dnet, MII_BMSR);
  218. if (status & BMSR_LSTATUS)
  219. break;
  220. udelay(100);
  221. }
  222. }
  223. if (!(status & BMSR_LSTATUS)) {
  224. printf("%s: link down (status: 0x%04x)\n",
  225. netdev->name, status);
  226. return -1;
  227. } else {
  228. adv = dnet_mdio_read(dnet, MII_ADVERTISE);
  229. lpa = dnet_mdio_read(dnet, MII_LPA);
  230. media = mii_nway_result(lpa & adv);
  231. speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
  232. ? 1 : 0);
  233. duplex = (media & ADVERTISE_FULL) ? 1 : 0;
  234. /* 1000BaseT ethernet is not supported */
  235. printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
  236. netdev->name,
  237. speed ? "100" : "10",
  238. duplex ? "full" : "half",
  239. lpa);
  240. ctl_reg = dnet_readw_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG);
  241. if (duplex)
  242. ctl_reg &= ~(DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP);
  243. else
  244. ctl_reg |= DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP;
  245. dnet_writew_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg);
  246. return 0;
  247. }
  248. }
  249. static int dnet_init(struct eth_device *netdev, bd_t *bd)
  250. {
  251. struct dnet_device *dnet = to_dnet(netdev);
  252. u32 config;
  253. /*
  254. * dnet_halt should have been called at some point before now,
  255. * so we'll assume the controller is idle.
  256. */
  257. /* set hardware address */
  258. dnet_set_hwaddr(netdev);
  259. if (dnet_phy_init(dnet) < 0)
  260. return -1;
  261. /* flush rx/tx fifos */
  262. writel(DNET_SYS_CTL_RXFIFOFLUSH | DNET_SYS_CTL_TXFIFOFLUSH,
  263. &dnet->regs->SYS_CTL);
  264. udelay(1000);
  265. writel(0, &dnet->regs->SYS_CTL);
  266. config = dnet_readw_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG);
  267. config |= DNET_INTERNAL_RXTX_CONTROL_RXPAUSE |
  268. DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST |
  269. DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL |
  270. DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS;
  271. dnet_writew_mac(dnet, DNET_INTERNAL_RXTX_CONTROL_REG, config);
  272. /* Enable TX and RX */
  273. dnet_writew_mac(dnet, DNET_INTERNAL_MODE_REG,
  274. DNET_INTERNAL_MODE_RXEN | DNET_INTERNAL_MODE_TXEN);
  275. return 0;
  276. }
  277. static void dnet_halt(struct eth_device *netdev)
  278. {
  279. struct dnet_device *dnet = to_dnet(netdev);
  280. /* Disable TX and RX */
  281. dnet_writew_mac(dnet, DNET_INTERNAL_MODE_REG, 0);
  282. }
  283. int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr)
  284. {
  285. struct dnet_device *dnet;
  286. struct eth_device *netdev;
  287. unsigned int dev_capa;
  288. dnet = malloc(sizeof(struct dnet_device));
  289. if (!dnet) {
  290. printf("Error: Failed to allocate memory for DNET%d\n", id);
  291. return -1;
  292. }
  293. memset(dnet, 0, sizeof(struct dnet_device));
  294. netdev = &dnet->netdev;
  295. dnet->regs = (struct dnet_registers *)regs;
  296. dnet->phy_addr = phy_addr;
  297. sprintf(netdev->name, "dnet%d", id);
  298. netdev->init = dnet_init;
  299. netdev->halt = dnet_halt;
  300. netdev->send = dnet_send;
  301. netdev->recv = dnet_recv;
  302. dev_capa = readl(&dnet->regs->VERCAPS) & 0xFFFF;
  303. debug("%s: has %smdio, %sirq, %sgigabit, %sdma \n", netdev->name,
  304. (dev_capa & DNET_HAS_MDIO) ? "" : "no ",
  305. (dev_capa & DNET_HAS_IRQ) ? "" : "no ",
  306. (dev_capa & DNET_HAS_GIGABIT) ? "" : "no ",
  307. (dev_capa & DNET_HAS_DMA) ? "" : "no ");
  308. eth_register(netdev);
  309. return 0;
  310. }