README.ebony 4.4 KB

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  1. AMCC Ebony Board
  2. Last Update: September 12, 2002
  3. =======================================================================
  4. This file contains some handy info regarding U-Boot and the AMCC
  5. Ebony evalutation board. See the README.ppc440 for additional
  6. information.
  7. SWITCH SETTINGS & JUMPERS
  8. ==========================
  9. Here's what I've been using successfully. If you feel inclined to
  10. change things ... please read the docs!
  11. DIPSW U46 U80
  12. ------------------------
  13. SW 1 off on
  14. SW 2 on on
  15. SW 3 on on
  16. SW 4 off on
  17. SW 5 on off
  18. SW 6 on on
  19. SW 7 on off
  20. SW 8 on off
  21. J41: strapped
  22. J42: open
  23. All others are factory default.
  24. I2C probe
  25. =====================
  26. The i2c utilities have been tested on both Rev B. and Rev C. and
  27. look good. The CONFIG_SYS_I2C_NOPROBES macro is defined to prevent
  28. probing the CDCV850 clock controller at address 0x69 (since reading
  29. it causes the i2c implementation to misbehave. The output of
  30. 'i2c probe' should look like this (assuming you are only using a single
  31. SO-DIMM:
  32. => i2c probe
  33. Valid chip addresses: 50 53 54
  34. Excluded chip addresses: 69
  35. GETTING OUT OF I2C TROUBLE
  36. ===========================
  37. If you're like me ... you may have screwed up your bootstrap serial
  38. eeprom ... or worse, your SPD eeprom when experimenting with the
  39. i2c commands. If so, here are some ideas on how to get out of
  40. trouble:
  41. Serial bootstrap eeprom corruption:
  42. -----------------------------------
  43. Power down the board and set the following straps:
  44. J41 - open
  45. J42 - strapped
  46. This will select the default sys0 and sys1 settings (the serial
  47. eeproms are not used). Then power up the board and fix the serial
  48. eeprom using the 'i2c mm' command. Here are the values I currently
  49. use:
  50. => i2c md 50 0 10
  51. 0000: bf a2 04 01 ae 94 11 00 00 00 00 00 00 00 00 00 ................
  52. => i2c md 54 0 10
  53. 0000: 8f b3 24 01 4d 14 11 00 00 00 00 00 00 00 00 00 ..$.M...........
  54. Once you have the eeproms set correctly change the
  55. J41/J42 straps as you desire.
  56. SPD eeprom corruption:
  57. ------------------------
  58. I've corrupted the SPD eeprom several times ... perhaps too much coffee
  59. and not enough presence of mind ;-). By default, the ebony code uses
  60. the SPD to initialize the DDR SDRAM control registers. So if the SPD
  61. eeprom is corrupted, U-Boot will never get into ram. Here's how I got
  62. out of this situation:
  63. 0. First, _before_ playing with the i2c utilities, do an 'i2c probe', then
  64. use 'i2c md' to capture the various device contents to a file. Some day
  65. you may be glad you did this ... trust me :-). Otherwise try the
  66. following:
  67. 1. In the include/configs/EBONY.h file find the line that defines
  68. the CONFIG_SPD_EEPROM macro and undefine it. E.g:
  69. #undef CONFIG_SPD_EEPROM
  70. This will make the code use default SDRAM control register
  71. settings without using the SPD eeprom.
  72. 2. Rebuild U-Boot
  73. 3. Load the new U-Boot image and reboot ebony.
  74. 4. Repair the SPD eeprom using the 'i2c mm' command. Here's the eeprom
  75. contents that work with the default SO-DIMM that comes with the
  76. ebony board (micron 8VDDT164AG-265A1). Note: these are probably
  77. _not_ the factory settings ... but they work.
  78. => i2c md 53 0 10 80
  79. 0000: 80 08 07 0c 0a 01 40 00 04 75 75 00 80 08 00 01 ......@..uu.....
  80. 0010: 0e 04 0c 01 02 20 00 a0 75 00 00 50 3c 50 2d 20 ..... ..u..P<P-
  81. 0020: 90 90 50 50 00 00 00 00 00 41 4b 34 32 75 00 00 ..PP.....AK42u..
  82. 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 9c ................
  83. 0040: 2c 00 00 00 00 00 00 00 08 38 56 44 44 54 31 36 ,........8VDDT16
  84. 0050: 36 34 41 47 2d 32 36 35 41 31 20 01 00 01 2c 63 64AG-265A1 ...,c
  85. 0060: 22 25 ab 00 00 00 00 00 00 00 00 00 00 00 00 00 "%..............
  86. 0070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  87. PCI DOUBLE-ENUMERATION WOES
  88. ===========================
  89. If you're not using PCI-X cards and are simply using 32-bit and/or
  90. 33 MHz cards via extenders and the like, you may notice that the
  91. initial pci scan reports various devices twice ... and configuration
  92. does not succeed (one or more devices are enumerated twice). To correct
  93. this we replaced the 2K ohm resistor on the IDSEL line(s) with a
  94. 22 ohm resistor and the problem went away. This change hasn't broken
  95. anything yet -- use at your own risk.
  96. We never tested anything other than 33 MHz/32-bit cards. If you have
  97. the chance to do this, please let me know how things turn out :-)
  98. Regards,
  99. --Scott
  100. <smcnutt@artesyncp.com>