fdtdec.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/global_data.h>
  24. #include <asm/sections.h>
  25. #include <linux/ctype.h>
  26. #include <linux/lzo.h>
  27. #include <linux/ioport.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /*
  30. * Here are the type we know about. One day we might allow drivers to
  31. * register. For now we just put them here. The COMPAT macro allows us to
  32. * turn this into a sparse list later, and keeps the ID with the name.
  33. *
  34. * NOTE: This list is basically a TODO list for things that need to be
  35. * converted to driver model. So don't add new things here unless there is a
  36. * good reason why driver-model conversion is infeasible. Examples include
  37. * things which are used before driver model is available.
  38. */
  39. #define COMPAT(id, name) name
  40. static const char * const compat_names[COMPAT_COUNT] = {
  41. COMPAT(UNKNOWN, "<none>"),
  42. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  43. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  44. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  45. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  46. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  47. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  48. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  49. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  50. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  51. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  52. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  53. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  54. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  55. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  56. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  57. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  58. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  59. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  60. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  61. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  62. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  63. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  64. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  65. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  72. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  73. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  74. };
  75. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  76. {
  77. /* We allow reading of the 'unknown' ID for testing purposes */
  78. assert(id >= 0 && id < COMPAT_COUNT);
  79. return compat_names[id];
  80. }
  81. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  82. const char *prop_name, int index, int na,
  83. int ns, fdt_size_t *sizep,
  84. bool translate)
  85. {
  86. const fdt32_t *prop, *prop_end;
  87. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  88. int len;
  89. fdt_addr_t addr;
  90. debug("%s: %s: ", __func__, prop_name);
  91. prop = fdt_getprop(blob, node, prop_name, &len);
  92. if (!prop) {
  93. debug("(not found)\n");
  94. return FDT_ADDR_T_NONE;
  95. }
  96. prop_end = prop + (len / sizeof(*prop));
  97. prop_addr = prop + (index * (na + ns));
  98. prop_size = prop_addr + na;
  99. prop_after_size = prop_size + ns;
  100. if (prop_after_size > prop_end) {
  101. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  102. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  103. return FDT_ADDR_T_NONE;
  104. }
  105. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  106. if (translate)
  107. addr = fdt_translate_address(blob, node, prop_addr);
  108. else
  109. #endif
  110. addr = fdtdec_get_number(prop_addr, na);
  111. if (sizep) {
  112. *sizep = fdtdec_get_number(prop_size, ns);
  113. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  114. (unsigned long long)*sizep);
  115. } else {
  116. debug("addr=%08llx\n", (unsigned long long)addr);
  117. }
  118. return addr;
  119. }
  120. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  121. int node, const char *prop_name,
  122. int index, fdt_size_t *sizep,
  123. bool translate)
  124. {
  125. int na, ns;
  126. debug("%s: ", __func__);
  127. na = fdt_address_cells(blob, parent);
  128. if (na < 1) {
  129. debug("(bad #address-cells)\n");
  130. return FDT_ADDR_T_NONE;
  131. }
  132. ns = fdt_size_cells(blob, parent);
  133. if (ns < 0) {
  134. debug("(bad #size-cells)\n");
  135. return FDT_ADDR_T_NONE;
  136. }
  137. debug("na=%d, ns=%d, ", na, ns);
  138. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  139. ns, sizep, translate);
  140. }
  141. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  142. const char *prop_name, int index,
  143. fdt_size_t *sizep,
  144. bool translate)
  145. {
  146. int parent;
  147. debug("%s: ", __func__);
  148. parent = fdt_parent_offset(blob, node);
  149. if (parent < 0) {
  150. debug("(no parent found)\n");
  151. return FDT_ADDR_T_NONE;
  152. }
  153. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  154. index, sizep, translate);
  155. }
  156. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  157. const char *prop_name, fdt_size_t *sizep)
  158. {
  159. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  160. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  161. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  162. ns, sizep, false);
  163. }
  164. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  165. {
  166. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  167. }
  168. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  169. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  170. {
  171. const char *list, *end;
  172. int len;
  173. list = fdt_getprop(blob, node, "compatible", &len);
  174. if (!list)
  175. return -ENOENT;
  176. end = list + len;
  177. while (list < end) {
  178. len = strlen(list);
  179. if (len >= strlen("pciVVVV,DDDD")) {
  180. char *s = strstr(list, "pci");
  181. /*
  182. * check if the string is something like pciVVVV,DDDD.RR
  183. * or just pciVVVV,DDDD
  184. */
  185. if (s && s[7] == ',' &&
  186. (s[12] == '.' || s[12] == 0)) {
  187. s += 3;
  188. *vendor = simple_strtol(s, NULL, 16);
  189. s += 5;
  190. *device = simple_strtol(s, NULL, 16);
  191. return 0;
  192. }
  193. }
  194. list += (len + 1);
  195. }
  196. return -ENOENT;
  197. }
  198. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  199. u32 *bar)
  200. {
  201. int barnum;
  202. /* extract the bar number from fdt_pci_addr */
  203. barnum = addr->phys_hi & 0xff;
  204. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  205. return -EINVAL;
  206. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  207. *bar = dm_pci_read_bar32(dev, barnum);
  208. return 0;
  209. }
  210. int fdtdec_get_pci_bus_range(const void *blob, int node,
  211. struct fdt_resource *res)
  212. {
  213. const u32 *values;
  214. int len;
  215. values = fdt_getprop(blob, node, "bus-range", &len);
  216. if (!values || len < sizeof(*values) * 2)
  217. return -EINVAL;
  218. res->start = fdt32_to_cpu(*values++);
  219. res->end = fdt32_to_cpu(*values);
  220. return 0;
  221. }
  222. #endif
  223. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  224. uint64_t default_val)
  225. {
  226. const unaligned_fdt64_t *cell64;
  227. int length;
  228. cell64 = fdt_getprop(blob, node, prop_name, &length);
  229. if (!cell64 || length < sizeof(*cell64))
  230. return default_val;
  231. return fdt64_to_cpu(*cell64);
  232. }
  233. int fdtdec_get_is_enabled(const void *blob, int node)
  234. {
  235. const char *cell;
  236. /*
  237. * It should say "okay", so only allow that. Some fdts use "ok" but
  238. * this is a bug. Please fix your device tree source file. See here
  239. * for discussion:
  240. *
  241. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  242. */
  243. cell = fdt_getprop(blob, node, "status", NULL);
  244. if (cell)
  245. return strcmp(cell, "okay") == 0;
  246. return 1;
  247. }
  248. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  249. {
  250. enum fdt_compat_id id;
  251. /* Search our drivers */
  252. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  253. if (fdt_node_check_compatible(blob, node,
  254. compat_names[id]) == 0)
  255. return id;
  256. return COMPAT_UNKNOWN;
  257. }
  258. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  259. {
  260. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  261. }
  262. int fdtdec_next_compatible_subnode(const void *blob, int node,
  263. enum fdt_compat_id id, int *depthp)
  264. {
  265. do {
  266. node = fdt_next_node(blob, node, depthp);
  267. } while (*depthp > 1);
  268. /* If this is a direct subnode, and compatible, return it */
  269. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  270. blob, node, compat_names[id]))
  271. return node;
  272. return -FDT_ERR_NOTFOUND;
  273. }
  274. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  275. int *upto)
  276. {
  277. #define MAX_STR_LEN 20
  278. char str[MAX_STR_LEN + 20];
  279. int node, err;
  280. /* snprintf() is not available */
  281. assert(strlen(name) < MAX_STR_LEN);
  282. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  283. node = fdt_path_offset(blob, str);
  284. if (node < 0)
  285. return node;
  286. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  287. if (err < 0)
  288. return err;
  289. if (err)
  290. return -FDT_ERR_NOTFOUND;
  291. (*upto)++;
  292. return node;
  293. }
  294. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  295. enum fdt_compat_id id, int *node_list,
  296. int maxcount)
  297. {
  298. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  299. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  300. }
  301. /* TODO: Can we tighten this code up a little? */
  302. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  303. enum fdt_compat_id id, int *node_list,
  304. int maxcount)
  305. {
  306. int name_len = strlen(name);
  307. int nodes[maxcount];
  308. int num_found = 0;
  309. int offset, node;
  310. int alias_node;
  311. int count;
  312. int i, j;
  313. /* find the alias node if present */
  314. alias_node = fdt_path_offset(blob, "/aliases");
  315. /*
  316. * start with nothing, and we can assume that the root node can't
  317. * match
  318. */
  319. memset(nodes, '\0', sizeof(nodes));
  320. /* First find all the compatible nodes */
  321. for (node = count = 0; node >= 0 && count < maxcount;) {
  322. node = fdtdec_next_compatible(blob, node, id);
  323. if (node >= 0)
  324. nodes[count++] = node;
  325. }
  326. if (node >= 0)
  327. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  328. __func__, name);
  329. /* Now find all the aliases */
  330. for (offset = fdt_first_property_offset(blob, alias_node);
  331. offset > 0;
  332. offset = fdt_next_property_offset(blob, offset)) {
  333. const struct fdt_property *prop;
  334. const char *path;
  335. int number;
  336. int found;
  337. node = 0;
  338. prop = fdt_get_property_by_offset(blob, offset, NULL);
  339. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  340. if (prop->len && 0 == strncmp(path, name, name_len))
  341. node = fdt_path_offset(blob, prop->data);
  342. if (node <= 0)
  343. continue;
  344. /* Get the alias number */
  345. number = simple_strtoul(path + name_len, NULL, 10);
  346. if (number < 0 || number >= maxcount) {
  347. debug("%s: warning: alias '%s' is out of range\n",
  348. __func__, path);
  349. continue;
  350. }
  351. /* Make sure the node we found is actually in our list! */
  352. found = -1;
  353. for (j = 0; j < count; j++)
  354. if (nodes[j] == node) {
  355. found = j;
  356. break;
  357. }
  358. if (found == -1) {
  359. debug("%s: warning: alias '%s' points to a node "
  360. "'%s' that is missing or is not compatible "
  361. " with '%s'\n", __func__, path,
  362. fdt_get_name(blob, node, NULL),
  363. compat_names[id]);
  364. continue;
  365. }
  366. /*
  367. * Add this node to our list in the right place, and mark
  368. * it as done.
  369. */
  370. if (fdtdec_get_is_enabled(blob, node)) {
  371. if (node_list[number]) {
  372. debug("%s: warning: alias '%s' requires that "
  373. "a node be placed in the list in a "
  374. "position which is already filled by "
  375. "node '%s'\n", __func__, path,
  376. fdt_get_name(blob, node, NULL));
  377. continue;
  378. }
  379. node_list[number] = node;
  380. if (number >= num_found)
  381. num_found = number + 1;
  382. }
  383. nodes[found] = 0;
  384. }
  385. /* Add any nodes not mentioned by an alias */
  386. for (i = j = 0; i < maxcount; i++) {
  387. if (!node_list[i]) {
  388. for (; j < maxcount; j++)
  389. if (nodes[j] &&
  390. fdtdec_get_is_enabled(blob, nodes[j]))
  391. break;
  392. /* Have we run out of nodes to add? */
  393. if (j == maxcount)
  394. break;
  395. assert(!node_list[i]);
  396. node_list[i] = nodes[j++];
  397. if (i >= num_found)
  398. num_found = i + 1;
  399. }
  400. }
  401. return num_found;
  402. }
  403. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  404. int *seqp)
  405. {
  406. int base_len = strlen(base);
  407. const char *find_name;
  408. int find_namelen;
  409. int prop_offset;
  410. int aliases;
  411. find_name = fdt_get_name(blob, offset, &find_namelen);
  412. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  413. aliases = fdt_path_offset(blob, "/aliases");
  414. for (prop_offset = fdt_first_property_offset(blob, aliases);
  415. prop_offset > 0;
  416. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  417. const char *prop;
  418. const char *name;
  419. const char *slash;
  420. int len, val;
  421. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  422. debug(" - %s, %s\n", name, prop);
  423. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  424. strncmp(name, base, base_len))
  425. continue;
  426. slash = strrchr(prop, '/');
  427. if (strcmp(slash + 1, find_name))
  428. continue;
  429. /*
  430. * Adding an extra check to distinguish DT nodes with
  431. * same name
  432. */
  433. if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
  434. if (fdt_get_phandle(blob, offset) !=
  435. fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
  436. continue;
  437. }
  438. val = trailing_strtol(name);
  439. if (val != -1) {
  440. *seqp = val;
  441. debug("Found seq %d\n", *seqp);
  442. return 0;
  443. }
  444. }
  445. debug("Not found\n");
  446. return -ENOENT;
  447. }
  448. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  449. {
  450. int base_len = strlen(base);
  451. int prop_offset;
  452. int aliases;
  453. int max = -1;
  454. debug("Looking for highest alias id for '%s'\n", base);
  455. aliases = fdt_path_offset(blob, "/aliases");
  456. for (prop_offset = fdt_first_property_offset(blob, aliases);
  457. prop_offset > 0;
  458. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  459. const char *prop;
  460. const char *name;
  461. int len, val;
  462. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  463. debug(" - %s, %s\n", name, prop);
  464. if (*prop != '/' || prop[len - 1] ||
  465. strncmp(name, base, base_len))
  466. continue;
  467. val = trailing_strtol(name);
  468. if (val > max) {
  469. debug("Found seq %d\n", val);
  470. max = val;
  471. }
  472. }
  473. return max;
  474. }
  475. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  476. {
  477. int chosen_node;
  478. if (!blob)
  479. return NULL;
  480. chosen_node = fdt_path_offset(blob, "/chosen");
  481. return fdt_getprop(blob, chosen_node, name, NULL);
  482. }
  483. int fdtdec_get_chosen_node(const void *blob, const char *name)
  484. {
  485. const char *prop;
  486. prop = fdtdec_get_chosen_prop(blob, name);
  487. if (!prop)
  488. return -FDT_ERR_NOTFOUND;
  489. return fdt_path_offset(blob, prop);
  490. }
  491. int fdtdec_check_fdt(void)
  492. {
  493. /*
  494. * We must have an FDT, but we cannot panic() yet since the console
  495. * is not ready. So for now, just assert(). Boards which need an early
  496. * FDT (prior to console ready) will need to make their own
  497. * arrangements and do their own checks.
  498. */
  499. assert(!fdtdec_prepare_fdt());
  500. return 0;
  501. }
  502. /*
  503. * This function is a little odd in that it accesses global data. At some
  504. * point if the architecture board.c files merge this will make more sense.
  505. * Even now, it is common code.
  506. */
  507. int fdtdec_prepare_fdt(void)
  508. {
  509. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  510. fdt_check_header(gd->fdt_blob)) {
  511. #ifdef CONFIG_SPL_BUILD
  512. puts("Missing DTB\n");
  513. #else
  514. printf("No valid device tree binary found at %p\n",
  515. gd->fdt_blob);
  516. # ifdef DEBUG
  517. if (gd->fdt_blob) {
  518. printf("fdt_blob=%p\n", gd->fdt_blob);
  519. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  520. 32, 0);
  521. }
  522. # endif
  523. #endif
  524. return -1;
  525. }
  526. return 0;
  527. }
  528. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  529. {
  530. const u32 *phandle;
  531. int lookup;
  532. debug("%s: %s\n", __func__, prop_name);
  533. phandle = fdt_getprop(blob, node, prop_name, NULL);
  534. if (!phandle)
  535. return -FDT_ERR_NOTFOUND;
  536. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  537. return lookup;
  538. }
  539. /**
  540. * Look up a property in a node and check that it has a minimum length.
  541. *
  542. * @param blob FDT blob
  543. * @param node node to examine
  544. * @param prop_name name of property to find
  545. * @param min_len minimum property length in bytes
  546. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  547. found, or -FDT_ERR_BADLAYOUT if not enough data
  548. * @return pointer to cell, which is only valid if err == 0
  549. */
  550. static const void *get_prop_check_min_len(const void *blob, int node,
  551. const char *prop_name, int min_len,
  552. int *err)
  553. {
  554. const void *cell;
  555. int len;
  556. debug("%s: %s\n", __func__, prop_name);
  557. cell = fdt_getprop(blob, node, prop_name, &len);
  558. if (!cell)
  559. *err = -FDT_ERR_NOTFOUND;
  560. else if (len < min_len)
  561. *err = -FDT_ERR_BADLAYOUT;
  562. else
  563. *err = 0;
  564. return cell;
  565. }
  566. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  567. u32 *array, int count)
  568. {
  569. const u32 *cell;
  570. int err = 0;
  571. debug("%s: %s\n", __func__, prop_name);
  572. cell = get_prop_check_min_len(blob, node, prop_name,
  573. sizeof(u32) * count, &err);
  574. if (!err) {
  575. int i;
  576. for (i = 0; i < count; i++)
  577. array[i] = fdt32_to_cpu(cell[i]);
  578. }
  579. return err;
  580. }
  581. int fdtdec_get_int_array_count(const void *blob, int node,
  582. const char *prop_name, u32 *array, int count)
  583. {
  584. const u32 *cell;
  585. int len, elems;
  586. int i;
  587. debug("%s: %s\n", __func__, prop_name);
  588. cell = fdt_getprop(blob, node, prop_name, &len);
  589. if (!cell)
  590. return -FDT_ERR_NOTFOUND;
  591. elems = len / sizeof(u32);
  592. if (count > elems)
  593. count = elems;
  594. for (i = 0; i < count; i++)
  595. array[i] = fdt32_to_cpu(cell[i]);
  596. return count;
  597. }
  598. const u32 *fdtdec_locate_array(const void *blob, int node,
  599. const char *prop_name, int count)
  600. {
  601. const u32 *cell;
  602. int err;
  603. cell = get_prop_check_min_len(blob, node, prop_name,
  604. sizeof(u32) * count, &err);
  605. return err ? NULL : cell;
  606. }
  607. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  608. {
  609. const s32 *cell;
  610. int len;
  611. debug("%s: %s\n", __func__, prop_name);
  612. cell = fdt_getprop(blob, node, prop_name, &len);
  613. return cell != NULL;
  614. }
  615. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  616. const char *list_name,
  617. const char *cells_name,
  618. int cell_count, int index,
  619. struct fdtdec_phandle_args *out_args)
  620. {
  621. const __be32 *list, *list_end;
  622. int rc = 0, size, cur_index = 0;
  623. uint32_t count = 0;
  624. int node = -1;
  625. int phandle;
  626. /* Retrieve the phandle list property */
  627. list = fdt_getprop(blob, src_node, list_name, &size);
  628. if (!list)
  629. return -ENOENT;
  630. list_end = list + size / sizeof(*list);
  631. /* Loop over the phandles until all the requested entry is found */
  632. while (list < list_end) {
  633. rc = -EINVAL;
  634. count = 0;
  635. /*
  636. * If phandle is 0, then it is an empty entry with no
  637. * arguments. Skip forward to the next entry.
  638. */
  639. phandle = be32_to_cpup(list++);
  640. if (phandle) {
  641. /*
  642. * Find the provider node and parse the #*-cells
  643. * property to determine the argument length.
  644. *
  645. * This is not needed if the cell count is hard-coded
  646. * (i.e. cells_name not set, but cell_count is set),
  647. * except when we're going to return the found node
  648. * below.
  649. */
  650. if (cells_name || cur_index == index) {
  651. node = fdt_node_offset_by_phandle(blob,
  652. phandle);
  653. if (node < 0) {
  654. debug("%s: could not find phandle\n",
  655. fdt_get_name(blob, src_node,
  656. NULL));
  657. goto err;
  658. }
  659. }
  660. if (cells_name) {
  661. count = fdtdec_get_int(blob, node, cells_name,
  662. -1);
  663. if (count == -1) {
  664. debug("%s: could not get %s for %s\n",
  665. fdt_get_name(blob, src_node,
  666. NULL),
  667. cells_name,
  668. fdt_get_name(blob, node,
  669. NULL));
  670. goto err;
  671. }
  672. } else {
  673. count = cell_count;
  674. }
  675. /*
  676. * Make sure that the arguments actually fit in the
  677. * remaining property data length
  678. */
  679. if (list + count > list_end) {
  680. debug("%s: arguments longer than property\n",
  681. fdt_get_name(blob, src_node, NULL));
  682. goto err;
  683. }
  684. }
  685. /*
  686. * All of the error cases above bail out of the loop, so at
  687. * this point, the parsing is successful. If the requested
  688. * index matches, then fill the out_args structure and return,
  689. * or return -ENOENT for an empty entry.
  690. */
  691. rc = -ENOENT;
  692. if (cur_index == index) {
  693. if (!phandle)
  694. goto err;
  695. if (out_args) {
  696. int i;
  697. if (count > MAX_PHANDLE_ARGS) {
  698. debug("%s: too many arguments %d\n",
  699. fdt_get_name(blob, src_node,
  700. NULL), count);
  701. count = MAX_PHANDLE_ARGS;
  702. }
  703. out_args->node = node;
  704. out_args->args_count = count;
  705. for (i = 0; i < count; i++) {
  706. out_args->args[i] =
  707. be32_to_cpup(list++);
  708. }
  709. }
  710. /* Found it! return success */
  711. return 0;
  712. }
  713. node = -1;
  714. list += count;
  715. cur_index++;
  716. }
  717. /*
  718. * Result will be one of:
  719. * -ENOENT : index is for empty phandle
  720. * -EINVAL : parsing error on data
  721. * [1..n] : Number of phandle (count mode; when index = -1)
  722. */
  723. rc = index < 0 ? cur_index : -ENOENT;
  724. err:
  725. return rc;
  726. }
  727. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  728. u8 *array, int count)
  729. {
  730. const u8 *cell;
  731. int err;
  732. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  733. if (!err)
  734. memcpy(array, cell, count);
  735. return err;
  736. }
  737. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  738. const char *prop_name, int count)
  739. {
  740. const u8 *cell;
  741. int err;
  742. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  743. if (err)
  744. return NULL;
  745. return cell;
  746. }
  747. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  748. int default_val)
  749. {
  750. int config_node;
  751. debug("%s: %s\n", __func__, prop_name);
  752. config_node = fdt_path_offset(blob, "/config");
  753. if (config_node < 0)
  754. return default_val;
  755. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  756. }
  757. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  758. {
  759. int config_node;
  760. const void *prop;
  761. debug("%s: %s\n", __func__, prop_name);
  762. config_node = fdt_path_offset(blob, "/config");
  763. if (config_node < 0)
  764. return 0;
  765. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  766. return prop != NULL;
  767. }
  768. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  769. {
  770. const char *nodep;
  771. int nodeoffset;
  772. int len;
  773. debug("%s: %s\n", __func__, prop_name);
  774. nodeoffset = fdt_path_offset(blob, "/config");
  775. if (nodeoffset < 0)
  776. return NULL;
  777. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  778. if (!nodep)
  779. return NULL;
  780. return (char *)nodep;
  781. }
  782. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  783. {
  784. u64 number = 0;
  785. while (cells--)
  786. number = (number << 32) | fdt32_to_cpu(*ptr++);
  787. return number;
  788. }
  789. int fdt_get_resource(const void *fdt, int node, const char *property,
  790. unsigned int index, struct fdt_resource *res)
  791. {
  792. const fdt32_t *ptr, *end;
  793. int na, ns, len, parent;
  794. unsigned int i = 0;
  795. parent = fdt_parent_offset(fdt, node);
  796. if (parent < 0)
  797. return parent;
  798. na = fdt_address_cells(fdt, parent);
  799. ns = fdt_size_cells(fdt, parent);
  800. ptr = fdt_getprop(fdt, node, property, &len);
  801. if (!ptr)
  802. return len;
  803. end = ptr + len / sizeof(*ptr);
  804. while (ptr + na + ns <= end) {
  805. if (i == index) {
  806. if (CONFIG_IS_ENABLED(OF_TRANSLATE))
  807. res->start = fdt_translate_address(fdt, node, ptr);
  808. else
  809. res->start = fdtdec_get_number(ptr, na);
  810. res->end = res->start;
  811. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  812. return 0;
  813. }
  814. ptr += na + ns;
  815. i++;
  816. }
  817. return -FDT_ERR_NOTFOUND;
  818. }
  819. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  820. const char *prop_names, const char *name,
  821. struct fdt_resource *res)
  822. {
  823. int index;
  824. index = fdt_stringlist_search(fdt, node, prop_names, name);
  825. if (index < 0)
  826. return index;
  827. return fdt_get_resource(fdt, node, property, index, res);
  828. }
  829. static int decode_timing_property(const void *blob, int node, const char *name,
  830. struct timing_entry *result)
  831. {
  832. int length, ret = 0;
  833. const u32 *prop;
  834. prop = fdt_getprop(blob, node, name, &length);
  835. if (!prop) {
  836. debug("%s: could not find property %s\n",
  837. fdt_get_name(blob, node, NULL), name);
  838. return length;
  839. }
  840. if (length == sizeof(u32)) {
  841. result->typ = fdtdec_get_int(blob, node, name, 0);
  842. result->min = result->typ;
  843. result->max = result->typ;
  844. } else {
  845. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  846. }
  847. return ret;
  848. }
  849. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  850. struct display_timing *dt)
  851. {
  852. int i, node, timings_node;
  853. u32 val = 0;
  854. int ret = 0;
  855. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  856. if (timings_node < 0)
  857. return timings_node;
  858. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  859. node > 0 && i != index;
  860. node = fdt_next_subnode(blob, node))
  861. i++;
  862. if (node < 0)
  863. return node;
  864. memset(dt, 0, sizeof(*dt));
  865. ret |= decode_timing_property(blob, node, "hback-porch",
  866. &dt->hback_porch);
  867. ret |= decode_timing_property(blob, node, "hfront-porch",
  868. &dt->hfront_porch);
  869. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  870. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  871. ret |= decode_timing_property(blob, node, "vback-porch",
  872. &dt->vback_porch);
  873. ret |= decode_timing_property(blob, node, "vfront-porch",
  874. &dt->vfront_porch);
  875. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  876. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  877. ret |= decode_timing_property(blob, node, "clock-frequency",
  878. &dt->pixelclock);
  879. dt->flags = 0;
  880. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  881. if (val != -1) {
  882. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  883. DISPLAY_FLAGS_VSYNC_LOW;
  884. }
  885. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  886. if (val != -1) {
  887. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  888. DISPLAY_FLAGS_HSYNC_LOW;
  889. }
  890. val = fdtdec_get_int(blob, node, "de-active", -1);
  891. if (val != -1) {
  892. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  893. DISPLAY_FLAGS_DE_LOW;
  894. }
  895. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  896. if (val != -1) {
  897. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  898. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  899. }
  900. if (fdtdec_get_bool(blob, node, "interlaced"))
  901. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  902. if (fdtdec_get_bool(blob, node, "doublescan"))
  903. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  904. if (fdtdec_get_bool(blob, node, "doubleclk"))
  905. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  906. return ret;
  907. }
  908. int fdtdec_setup_mem_size_base(void)
  909. {
  910. int ret;
  911. ofnode mem;
  912. struct resource res;
  913. mem = ofnode_path("/memory");
  914. if (!ofnode_valid(mem)) {
  915. debug("%s: Missing /memory node\n", __func__);
  916. return -EINVAL;
  917. }
  918. ret = ofnode_read_resource(mem, 0, &res);
  919. if (ret != 0) {
  920. debug("%s: Unable to decode first memory bank\n", __func__);
  921. return -EINVAL;
  922. }
  923. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  924. gd->ram_base = (unsigned long)res.start;
  925. debug("%s: Initial DRAM size %llx\n", __func__,
  926. (unsigned long long)gd->ram_size);
  927. return 0;
  928. }
  929. ofnode get_next_memory_node(ofnode mem)
  930. {
  931. do {
  932. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  933. } while (!ofnode_is_available(mem));
  934. return mem;
  935. }
  936. int fdtdec_setup_memory_banksize(void)
  937. {
  938. int bank, ret, reg = 0;
  939. struct resource res;
  940. ofnode mem = ofnode_null();
  941. mem = get_next_memory_node(mem);
  942. if (!ofnode_valid(mem)) {
  943. debug("%s: Missing /memory node\n", __func__);
  944. return -EINVAL;
  945. }
  946. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  947. ret = ofnode_read_resource(mem, reg++, &res);
  948. if (ret < 0) {
  949. reg = 0;
  950. mem = get_next_memory_node(mem);
  951. if (!ofnode_valid(mem))
  952. break;
  953. ret = ofnode_read_resource(mem, reg++, &res);
  954. if (ret < 0)
  955. break;
  956. }
  957. if (ret != 0)
  958. return -EINVAL;
  959. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  960. gd->bd->bi_dram[bank].size =
  961. (phys_size_t)(res.end - res.start + 1);
  962. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  963. __func__, bank,
  964. (unsigned long long)gd->bd->bi_dram[bank].start,
  965. (unsigned long long)gd->bd->bi_dram[bank].size);
  966. }
  967. return 0;
  968. }
  969. int fdtdec_setup_mem_size_base_lowest(void)
  970. {
  971. int bank, ret, reg = 0;
  972. struct resource res;
  973. unsigned long base;
  974. phys_size_t size;
  975. ofnode mem = ofnode_null();
  976. gd->ram_base = (unsigned long)~0;
  977. mem = get_next_memory_node(mem);
  978. if (!ofnode_valid(mem)) {
  979. debug("%s: Missing /memory node\n", __func__);
  980. return -EINVAL;
  981. }
  982. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  983. ret = ofnode_read_resource(mem, reg++, &res);
  984. if (ret < 0) {
  985. reg = 0;
  986. mem = get_next_memory_node(mem);
  987. if (!ofnode_valid(mem))
  988. break;
  989. ret = ofnode_read_resource(mem, reg++, &res);
  990. if (ret < 0)
  991. break;
  992. }
  993. if (ret != 0)
  994. return -EINVAL;
  995. base = (unsigned long)res.start;
  996. size = (phys_size_t)(res.end - res.start + 1);
  997. if (gd->ram_base > base && size) {
  998. gd->ram_base = base;
  999. gd->ram_size = size;
  1000. debug("%s: Initial DRAM base %lx size %lx\n",
  1001. __func__, base, (unsigned long)size);
  1002. }
  1003. }
  1004. return 0;
  1005. }
  1006. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1007. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1008. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1009. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1010. {
  1011. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  1012. bool gzip = 0, lzo = 0;
  1013. ulong sz_in = sz_src;
  1014. void *dst;
  1015. int rc;
  1016. if (CONFIG_IS_ENABLED(GZIP))
  1017. if (gzip_parse_header(src, sz_in) >= 0)
  1018. gzip = 1;
  1019. if (CONFIG_IS_ENABLED(LZO))
  1020. if (!gzip && lzop_is_valid_header(src))
  1021. lzo = 1;
  1022. if (!gzip && !lzo)
  1023. return -EBADMSG;
  1024. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1025. dst = malloc(sz_out);
  1026. if (!dst) {
  1027. puts("uncompress_blob: Unable to allocate memory\n");
  1028. return -ENOMEM;
  1029. }
  1030. } else {
  1031. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1032. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1033. # else
  1034. return -ENOTSUPP;
  1035. # endif
  1036. }
  1037. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1038. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1039. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1040. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1041. else
  1042. hang();
  1043. if (rc < 0) {
  1044. /* not a valid compressed blob */
  1045. puts("uncompress_blob: Unable to uncompress\n");
  1046. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1047. free(dst);
  1048. return -EBADMSG;
  1049. }
  1050. *dstp = dst;
  1051. return 0;
  1052. }
  1053. # else
  1054. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1055. {
  1056. *dstp = (void *)src;
  1057. return 0;
  1058. }
  1059. # endif
  1060. #endif
  1061. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1062. /*
  1063. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1064. * provide and/or fixup the fdt.
  1065. */
  1066. __weak void *board_fdt_blob_setup(void)
  1067. {
  1068. void *fdt_blob = NULL;
  1069. #ifdef CONFIG_SPL_BUILD
  1070. /* FDT is at end of BSS unless it is in a different memory region */
  1071. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1072. fdt_blob = (ulong *)&_image_binary_end;
  1073. else
  1074. fdt_blob = (ulong *)&__bss_end;
  1075. #else
  1076. /* FDT is at end of image */
  1077. fdt_blob = (ulong *)&_end;
  1078. #endif
  1079. return fdt_blob;
  1080. }
  1081. #endif
  1082. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1083. {
  1084. const char *path;
  1085. int offset, err;
  1086. if (!is_valid_ethaddr(mac))
  1087. return -EINVAL;
  1088. path = fdt_get_alias(fdt, "ethernet");
  1089. if (!path)
  1090. return 0;
  1091. debug("ethernet alias found: %s\n", path);
  1092. offset = fdt_path_offset(fdt, path);
  1093. if (offset < 0) {
  1094. debug("ethernet alias points to absent node %s\n", path);
  1095. return -ENOENT;
  1096. }
  1097. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1098. if (err < 0)
  1099. return err;
  1100. debug("MAC address: %pM\n", mac);
  1101. return 0;
  1102. }
  1103. static int fdtdec_init_reserved_memory(void *blob)
  1104. {
  1105. int na, ns, node, err;
  1106. fdt32_t value;
  1107. /* inherit #address-cells and #size-cells from the root node */
  1108. na = fdt_address_cells(blob, 0);
  1109. ns = fdt_size_cells(blob, 0);
  1110. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1111. if (node < 0)
  1112. return node;
  1113. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1114. if (err < 0)
  1115. return err;
  1116. value = cpu_to_fdt32(ns);
  1117. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1118. if (err < 0)
  1119. return err;
  1120. value = cpu_to_fdt32(na);
  1121. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1122. if (err < 0)
  1123. return err;
  1124. return node;
  1125. }
  1126. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1127. const struct fdt_memory *carveout,
  1128. uint32_t *phandlep, bool no_map)
  1129. {
  1130. fdt32_t cells[4] = {}, *ptr = cells;
  1131. uint32_t upper, lower, phandle;
  1132. int parent, node, na, ns, err;
  1133. fdt_size_t size;
  1134. char name[64];
  1135. /* create an empty /reserved-memory node if one doesn't exist */
  1136. parent = fdt_path_offset(blob, "/reserved-memory");
  1137. if (parent < 0) {
  1138. parent = fdtdec_init_reserved_memory(blob);
  1139. if (parent < 0)
  1140. return parent;
  1141. }
  1142. /* only 1 or 2 #address-cells and #size-cells are supported */
  1143. na = fdt_address_cells(blob, parent);
  1144. if (na < 1 || na > 2)
  1145. return -FDT_ERR_BADNCELLS;
  1146. ns = fdt_size_cells(blob, parent);
  1147. if (ns < 1 || ns > 2)
  1148. return -FDT_ERR_BADNCELLS;
  1149. /* find a matching node and return the phandle to that */
  1150. fdt_for_each_subnode(node, blob, parent) {
  1151. const char *name = fdt_get_name(blob, node, NULL);
  1152. fdt_addr_t addr;
  1153. fdt_size_t size;
  1154. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1155. &size, false);
  1156. if (addr == FDT_ADDR_T_NONE) {
  1157. debug("failed to read address/size for %s\n", name);
  1158. continue;
  1159. }
  1160. if (addr == carveout->start && (addr + size - 1) ==
  1161. carveout->end) {
  1162. if (phandlep)
  1163. *phandlep = fdt_get_phandle(blob, node);
  1164. return 0;
  1165. }
  1166. }
  1167. /*
  1168. * Unpack the start address and generate the name of the new node
  1169. * base on the basename and the unit-address.
  1170. */
  1171. upper = upper_32_bits(carveout->start);
  1172. lower = lower_32_bits(carveout->start);
  1173. if (na > 1 && upper > 0)
  1174. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1175. lower);
  1176. else {
  1177. if (upper > 0) {
  1178. debug("address %08x:%08x exceeds addressable space\n",
  1179. upper, lower);
  1180. return -FDT_ERR_BADVALUE;
  1181. }
  1182. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1183. }
  1184. node = fdt_add_subnode(blob, parent, name);
  1185. if (node < 0)
  1186. return node;
  1187. if (phandlep) {
  1188. err = fdt_generate_phandle(blob, &phandle);
  1189. if (err < 0)
  1190. return err;
  1191. err = fdtdec_set_phandle(blob, node, phandle);
  1192. if (err < 0)
  1193. return err;
  1194. }
  1195. /* store one or two address cells */
  1196. if (na > 1)
  1197. *ptr++ = cpu_to_fdt32(upper);
  1198. *ptr++ = cpu_to_fdt32(lower);
  1199. /* store one or two size cells */
  1200. size = carveout->end - carveout->start + 1;
  1201. upper = upper_32_bits(size);
  1202. lower = lower_32_bits(size);
  1203. if (ns > 1)
  1204. *ptr++ = cpu_to_fdt32(upper);
  1205. *ptr++ = cpu_to_fdt32(lower);
  1206. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1207. if (err < 0)
  1208. return err;
  1209. if (no_map) {
  1210. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1211. if (err < 0)
  1212. return err;
  1213. }
  1214. /* return the phandle for the new node for the caller to use */
  1215. if (phandlep)
  1216. *phandlep = phandle;
  1217. return 0;
  1218. }
  1219. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1220. unsigned int index, struct fdt_memory *carveout)
  1221. {
  1222. const fdt32_t *prop;
  1223. uint32_t phandle;
  1224. int offset, len;
  1225. fdt_size_t size;
  1226. offset = fdt_path_offset(blob, node);
  1227. if (offset < 0)
  1228. return offset;
  1229. prop = fdt_getprop(blob, offset, name, &len);
  1230. if (!prop) {
  1231. debug("failed to get %s for %s\n", name, node);
  1232. return -FDT_ERR_NOTFOUND;
  1233. }
  1234. if ((len % sizeof(phandle)) != 0) {
  1235. debug("invalid phandle property\n");
  1236. return -FDT_ERR_BADPHANDLE;
  1237. }
  1238. if (len < (sizeof(phandle) * (index + 1))) {
  1239. debug("invalid phandle index\n");
  1240. return -FDT_ERR_BADPHANDLE;
  1241. }
  1242. phandle = fdt32_to_cpu(prop[index]);
  1243. offset = fdt_node_offset_by_phandle(blob, phandle);
  1244. if (offset < 0) {
  1245. debug("failed to find node for phandle %u\n", phandle);
  1246. return offset;
  1247. }
  1248. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1249. "reg", 0, &size,
  1250. true);
  1251. if (carveout->start == FDT_ADDR_T_NONE) {
  1252. debug("failed to read address/size from \"reg\" property\n");
  1253. return -FDT_ERR_NOTFOUND;
  1254. }
  1255. carveout->end = carveout->start + size - 1;
  1256. return 0;
  1257. }
  1258. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1259. unsigned int index, const char *name,
  1260. const struct fdt_memory *carveout)
  1261. {
  1262. uint32_t phandle;
  1263. int err, offset, len;
  1264. fdt32_t value;
  1265. void *prop;
  1266. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
  1267. if (err < 0) {
  1268. debug("failed to add reserved memory: %d\n", err);
  1269. return err;
  1270. }
  1271. offset = fdt_path_offset(blob, node);
  1272. if (offset < 0) {
  1273. debug("failed to find offset for node %s: %d\n", node, offset);
  1274. return offset;
  1275. }
  1276. value = cpu_to_fdt32(phandle);
  1277. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1278. if (len == -FDT_ERR_NOTFOUND)
  1279. len = 0;
  1280. else
  1281. return len;
  1282. }
  1283. if ((index + 1) * sizeof(value) > len) {
  1284. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1285. (index + 1) * sizeof(value),
  1286. &prop);
  1287. if (err < 0) {
  1288. debug("failed to resize reserved memory property: %s\n",
  1289. fdt_strerror(err));
  1290. return err;
  1291. }
  1292. }
  1293. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1294. strlen(prop_name),
  1295. index * sizeof(value),
  1296. &value, sizeof(value));
  1297. if (err < 0) {
  1298. debug("failed to update %s property for node %s: %s\n",
  1299. prop_name, node, fdt_strerror(err));
  1300. return err;
  1301. }
  1302. return 0;
  1303. }
  1304. __weak int fdtdec_board_setup(const void *fdt_blob)
  1305. {
  1306. return 0;
  1307. }
  1308. int fdtdec_setup(void)
  1309. {
  1310. int ret;
  1311. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1312. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1313. void *fdt_blob;
  1314. # endif
  1315. # ifdef CONFIG_OF_EMBED
  1316. /* Get a pointer to the FDT */
  1317. # ifdef CONFIG_SPL_BUILD
  1318. gd->fdt_blob = __dtb_dt_spl_begin;
  1319. # else
  1320. gd->fdt_blob = __dtb_dt_begin;
  1321. # endif
  1322. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1323. /* Allow the board to override the fdt address. */
  1324. gd->fdt_blob = board_fdt_blob_setup();
  1325. # elif defined(CONFIG_OF_HOSTFILE)
  1326. if (sandbox_read_fdt_from_file()) {
  1327. puts("Failed to read control FDT\n");
  1328. return -1;
  1329. }
  1330. # elif defined(CONFIG_OF_PRIOR_STAGE)
  1331. gd->fdt_blob = (void *)(uintptr_t)prior_stage_fdt_address;
  1332. # endif
  1333. # ifndef CONFIG_SPL_BUILD
  1334. /* Allow the early environment to override the fdt address */
  1335. gd->fdt_blob = map_sysmem
  1336. (env_get_ulong("fdtcontroladdr", 16,
  1337. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1338. # endif
  1339. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1340. /*
  1341. * Try and uncompress the blob.
  1342. * Unfortunately there is no way to know how big the input blob really
  1343. * is. So let us set the maximum input size arbitrarily high. 16MB
  1344. * ought to be more than enough for packed DTBs.
  1345. */
  1346. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1347. gd->fdt_blob = fdt_blob;
  1348. /*
  1349. * Check if blob is a FIT images containings DTBs.
  1350. * If so, pick the most relevant
  1351. */
  1352. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1353. if (fdt_blob) {
  1354. gd->multi_dtb_fit = gd->fdt_blob;
  1355. gd->fdt_blob = fdt_blob;
  1356. }
  1357. # endif
  1358. #endif
  1359. ret = fdtdec_prepare_fdt();
  1360. if (!ret)
  1361. ret = fdtdec_board_setup(gd->fdt_blob);
  1362. return ret;
  1363. }
  1364. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1365. int fdtdec_resetup(int *rescan)
  1366. {
  1367. void *fdt_blob;
  1368. /*
  1369. * If the current DTB is part of a compressed FIT image,
  1370. * try to locate the best match from the uncompressed
  1371. * FIT image stillpresent there. Save the time and space
  1372. * required to uncompress it again.
  1373. */
  1374. if (gd->multi_dtb_fit) {
  1375. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1376. if (fdt_blob == gd->fdt_blob) {
  1377. /*
  1378. * The best match did not change. no need to tear down
  1379. * the DM and rescan the fdt.
  1380. */
  1381. *rescan = 0;
  1382. return 0;
  1383. }
  1384. *rescan = 1;
  1385. gd->fdt_blob = fdt_blob;
  1386. return fdtdec_prepare_fdt();
  1387. }
  1388. /*
  1389. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1390. * not a FIT image containings DTB, but a single DTB. There is no need
  1391. * to teard down DM and rescan the DT in this case.
  1392. */
  1393. *rescan = 0;
  1394. return 0;
  1395. }
  1396. #endif
  1397. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1398. phys_addr_t *basep, phys_size_t *sizep,
  1399. struct bd_info *bd)
  1400. {
  1401. int addr_cells, size_cells;
  1402. const u32 *cell, *end;
  1403. u64 total_size, size, addr;
  1404. int node, child;
  1405. bool auto_size;
  1406. int bank;
  1407. int len;
  1408. debug("%s: board_id=%d\n", __func__, board_id);
  1409. if (!area)
  1410. area = "/memory";
  1411. node = fdt_path_offset(blob, area);
  1412. if (node < 0) {
  1413. debug("No %s node found\n", area);
  1414. return -ENOENT;
  1415. }
  1416. cell = fdt_getprop(blob, node, "reg", &len);
  1417. if (!cell) {
  1418. debug("No reg property found\n");
  1419. return -ENOENT;
  1420. }
  1421. addr_cells = fdt_address_cells(blob, node);
  1422. size_cells = fdt_size_cells(blob, node);
  1423. /* Check the board id and mask */
  1424. for (child = fdt_first_subnode(blob, node);
  1425. child >= 0;
  1426. child = fdt_next_subnode(blob, child)) {
  1427. int match_mask, match_value;
  1428. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1429. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1430. if (match_value >= 0 &&
  1431. ((board_id & match_mask) == match_value)) {
  1432. /* Found matching mask */
  1433. debug("Found matching mask %d\n", match_mask);
  1434. node = child;
  1435. cell = fdt_getprop(blob, node, "reg", &len);
  1436. if (!cell) {
  1437. debug("No memory-banks property found\n");
  1438. return -EINVAL;
  1439. }
  1440. break;
  1441. }
  1442. }
  1443. /* Note: if no matching subnode was found we use the parent node */
  1444. if (bd) {
  1445. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1446. CONFIG_NR_DRAM_BANKS);
  1447. }
  1448. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1449. total_size = 0;
  1450. end = cell + len / 4 - addr_cells - size_cells;
  1451. debug("cell at %p, end %p\n", cell, end);
  1452. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1453. if (cell > end)
  1454. break;
  1455. addr = 0;
  1456. if (addr_cells == 2)
  1457. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1458. addr += fdt32_to_cpu(*cell++);
  1459. if (bd)
  1460. bd->bi_dram[bank].start = addr;
  1461. if (basep && !bank)
  1462. *basep = (phys_addr_t)addr;
  1463. size = 0;
  1464. if (size_cells == 2)
  1465. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1466. size += fdt32_to_cpu(*cell++);
  1467. if (auto_size) {
  1468. u64 new_size;
  1469. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1470. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1471. if (new_size == size) {
  1472. debug("OK\n");
  1473. } else {
  1474. debug("sized to %llx\n", new_size);
  1475. size = new_size;
  1476. }
  1477. }
  1478. if (bd)
  1479. bd->bi_dram[bank].size = size;
  1480. total_size += size;
  1481. }
  1482. debug("Memory size %llu\n", total_size);
  1483. if (sizep)
  1484. *sizep = (phys_size_t)total_size;
  1485. return 0;
  1486. }
  1487. #endif /* !USE_HOSTCC */