synquacer.h 2.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2016-2017 Socionext Inc.
  4. */
  5. #ifndef __CONFIG_H
  6. #define __CONFIG_H
  7. /* Timers for fasp(TIMCLK) */
  8. #define CONFIG_SYS_HZ 1000 /* 1 msec */
  9. #define CONFIG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */
  10. /*
  11. * SDRAM (for initialize)
  12. */
  13. #define CONFIG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */
  14. #define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */
  15. #define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */
  16. #define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE
  17. #define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */
  18. /*
  19. * Boot info
  20. */
  21. #define CONFIG_SYS_INIT_SP_ADDR (0xe0000000) /* stack of init proccess */
  22. #define CONFIG_SYS_MALLOC_LEN (0x01000000) /* 16Mbyte size of malloc() */
  23. #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default kernel load address */
  24. /*
  25. * Hardware drivers support
  26. */
  27. /* RTC */
  28. #define CONFIG_SYS_I2C_RTC_ADDR 0x51
  29. /* Serial (pl011) */
  30. #define UART_CLK (62500000)
  31. #define CONFIG_SERIAL_MULTI
  32. #define CONFIG_PL011_SERIAL
  33. #define CONFIG_PL011_CLOCK UART_CLK
  34. #define CONFIG_PL01x_PORTS {(void *)(0x2a400000)}
  35. #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
  36. /* Support MTD */
  37. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  38. #define CONFIG_SYS_FLASH_BASE (0x08000000)
  39. #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
  40. #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (512 * 1024))
  41. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE)
  42. #define CONFIG_BAUDRATE 115200
  43. #define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600 }
  44. #define CONFIG_SYS_CBSIZE 1024
  45. #define CONFIG_SYS_MAXARGS 128
  46. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  47. /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */
  48. /* #define CONFIG_SYS_PCI_64BIT 1 */
  49. /* Distro boot settings */
  50. #ifndef CONFIG_SPL_BUILD
  51. #ifdef CONFIG_CMD_USB
  52. #define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0)
  53. #else
  54. #define BOOT_TARGET_DEVICE_USB(func)
  55. #endif
  56. #ifdef CONFIG_CMD_MMC
  57. #define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0)
  58. #else
  59. #define BOOT_TARGET_DEVICE_MMC(func)
  60. #endif
  61. #ifdef CONFIG_CMD_NVME
  62. #define BOOT_TARGET_DEVICE_NVME(func) func(NVME, nvme, 0)
  63. #else
  64. #define BOOT_TARGET_DEVICE_NVME(func)
  65. #endif
  66. #ifdef CONFIG_CMD_SCSI
  67. #define BOOT_TARGET_DEVICE_SCSI(func) func(SCSI, scsi, 0) func(SCSI, scsi, 1)
  68. #else
  69. #define BOOT_TARGET_DEVICE_SCSI(func)
  70. #endif
  71. #define BOOT_TARGET_DEVICES(func) \
  72. BOOT_TARGET_DEVICE_USB(func) \
  73. BOOT_TARGET_DEVICE_MMC(func) \
  74. BOOT_TARGET_DEVICE_SCSI(func) \
  75. BOOT_TARGET_DEVICE_NVME(func) \
  76. #include <config_distro_bootcmd.h>
  77. #else /* CONFIG_SPL_BUILD */
  78. #define BOOTENV
  79. #endif
  80. #define CONFIG_EXTRA_ENV_SETTINGS \
  81. "fdt_addr_r=0x9fe00000\0" \
  82. "kernel_addr_r=0x90000000\0" \
  83. "ramdisk_addr_r=0xa0000000\0" \
  84. "scriptaddr=0x88000000\0" \
  85. "pxefile_addr_r=0x88100000\0" \
  86. BOOTENV
  87. #endif /* __CONFIG_H */