Kconfig 51 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. help
  13. U-Boot expects to be linked to a specific hard-coded address, and to
  14. be loaded to and run from that address. This option lifts that
  15. restriction, thus allowing the code to be loaded to and executed from
  16. almost any 4K aligned address. This logic relies on the relocation
  17. information that is embedded in the binary to support U-Boot
  18. relocating itself to the top-of-RAM later during execution.
  19. config INIT_SP_RELATIVE
  20. bool "Specify the early stack pointer relative to the .bss section"
  21. default n if ARCH_QEMU
  22. default y if POSITION_INDEPENDENT
  23. help
  24. U-Boot typically uses a hard-coded value for the stack pointer
  25. before relocation. Enable this option to instead calculate the
  26. initial SP at run-time. This is useful to avoid hard-coding addresses
  27. into U-Boot, so that it can be loaded and executed at arbitrary
  28. addresses and thus avoid using arbitrary addresses at runtime.
  29. If this option is enabled, the early stack pointer is set to
  30. &_bss_start with a offset value added. The offset is specified by
  31. SYS_INIT_SP_BSS_OFFSET.
  32. config SYS_INIT_SP_BSS_OFFSET
  33. int "Early stack offset from the .bss base address"
  34. depends on INIT_SP_RELATIVE
  35. default 524288
  36. help
  37. This option's value is the offset added to &_bss_start in order to
  38. calculate the stack pointer. This offset should be large enough so
  39. that the early malloc region, global data (gd), and early stack usage
  40. do not overlap any appended DTB.
  41. config LINUX_KERNEL_IMAGE_HEADER
  42. bool
  43. help
  44. Place a Linux kernel image header at the start of the U-Boot binary.
  45. The format of the header is described in the Linux kernel source at
  46. Documentation/arm64/booting.txt. This feature is useful since the
  47. image header reports the amount of memory (BSS and similar) that
  48. U-Boot needs to use, but which isn't part of the binary.
  49. if LINUX_KERNEL_IMAGE_HEADER
  50. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  51. hex
  52. help
  53. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  54. TEXT_OFFSET value written to the Linux kernel image header.
  55. endif
  56. endif
  57. config GIC_V3_ITS
  58. bool "ARM GICV3 ITS"
  59. select REGMAP
  60. select SYSCON
  61. select IRQ
  62. help
  63. ARM GICV3 Interrupt translation service (ITS).
  64. Basic support for programming locality specific peripheral
  65. interrupts (LPI) configuration tables and enable LPI tables.
  66. LPI configuration table can be used by u-boot or Linux.
  67. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  68. configuration table can not be re-programmed, unless GICV3 reset.
  69. config STATIC_RELA
  70. bool
  71. default y if ARM64
  72. config DMA_ADDR_T_64BIT
  73. bool
  74. default y if ARM64
  75. config HAS_VBAR
  76. bool
  77. config HAS_THUMB2
  78. bool
  79. config GPIO_EXTRA_HEADER
  80. bool
  81. # Used for compatibility with asm files copied from the kernel
  82. config ARM_ASM_UNIFIED
  83. bool
  84. default y
  85. # Used for compatibility with asm files copied from the kernel
  86. config THUMB2_KERNEL
  87. bool
  88. config SYS_ICACHE_OFF
  89. bool "Do not enable icache"
  90. default n
  91. help
  92. Do not enable instruction cache in U-Boot.
  93. config SPL_SYS_ICACHE_OFF
  94. bool "Do not enable icache in SPL"
  95. depends on SPL
  96. default SYS_ICACHE_OFF
  97. help
  98. Do not enable instruction cache in SPL.
  99. config SYS_DCACHE_OFF
  100. bool "Do not enable dcache"
  101. default n
  102. help
  103. Do not enable data cache in U-Boot.
  104. config SPL_SYS_DCACHE_OFF
  105. bool "Do not enable dcache in SPL"
  106. depends on SPL
  107. default SYS_DCACHE_OFF
  108. help
  109. Do not enable data cache in SPL.
  110. config SYS_ARM_CACHE_CP15
  111. bool "CP15 based cache enabling support"
  112. help
  113. Select this if your processor suports enabling caches by using
  114. CP15 registers.
  115. config SYS_ARM_MMU
  116. bool "MMU-based Paged Memory Management Support"
  117. select SYS_ARM_CACHE_CP15
  118. help
  119. Select if you want MMU-based virtualised addressing space
  120. support via paged memory management.
  121. config SYS_ARM_MPU
  122. bool 'Use the ARM v7 PMSA Compliant MPU'
  123. help
  124. Some ARM systems without an MMU have instead a Memory Protection
  125. Unit (MPU) that defines the type and permissions for regions of
  126. memory.
  127. If your CPU has an MPU then you should choose 'y' here unless you
  128. know that you do not want to use the MPU.
  129. # If set, the workarounds for these ARM errata are applied early during U-Boot
  130. # startup. Note that in general these options force the workarounds to be
  131. # applied; no CPU-type/version detection exists, unlike the similar options in
  132. # the Linux kernel. Do not set these options unless they apply! Also note that
  133. # the following can be machine-specific errata. These do have ability to
  134. # provide rudimentary version and machine-specific checks, but expect no
  135. # product checks:
  136. # CONFIG_ARM_ERRATA_430973
  137. # CONFIG_ARM_ERRATA_454179
  138. # CONFIG_ARM_ERRATA_621766
  139. # CONFIG_ARM_ERRATA_798870
  140. # CONFIG_ARM_ERRATA_801819
  141. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  142. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  143. config ARM_ERRATA_430973
  144. bool
  145. config ARM_ERRATA_454179
  146. bool
  147. config ARM_ERRATA_621766
  148. bool
  149. config ARM_ERRATA_716044
  150. bool
  151. config ARM_ERRATA_725233
  152. bool
  153. config ARM_ERRATA_742230
  154. bool
  155. config ARM_ERRATA_743622
  156. bool
  157. config ARM_ERRATA_751472
  158. bool
  159. config ARM_ERRATA_761320
  160. bool
  161. config ARM_ERRATA_773022
  162. bool
  163. config ARM_ERRATA_774769
  164. bool
  165. config ARM_ERRATA_794072
  166. bool
  167. config ARM_ERRATA_798870
  168. bool
  169. config ARM_ERRATA_801819
  170. bool
  171. config ARM_ERRATA_826974
  172. bool
  173. config ARM_ERRATA_828024
  174. bool
  175. config ARM_ERRATA_829520
  176. bool
  177. config ARM_ERRATA_833069
  178. bool
  179. config ARM_ERRATA_833471
  180. bool
  181. config ARM_ERRATA_845369
  182. bool
  183. config ARM_ERRATA_852421
  184. bool
  185. config ARM_ERRATA_852423
  186. bool
  187. config ARM_ERRATA_855873
  188. bool
  189. config ARM_CORTEX_A8_CVE_2017_5715
  190. bool
  191. config ARM_CORTEX_A15_CVE_2017_5715
  192. bool
  193. config CPU_ARM720T
  194. bool
  195. select SYS_CACHE_SHIFT_5
  196. imply SYS_ARM_MMU
  197. config CPU_ARM920T
  198. bool
  199. select SYS_CACHE_SHIFT_5
  200. imply SYS_ARM_MMU
  201. config CPU_ARM926EJS
  202. bool
  203. select SYS_CACHE_SHIFT_5
  204. imply SYS_ARM_MMU
  205. config CPU_ARM946ES
  206. bool
  207. select SYS_CACHE_SHIFT_5
  208. imply SYS_ARM_MMU
  209. config CPU_ARM1136
  210. bool
  211. select SYS_CACHE_SHIFT_5
  212. imply SYS_ARM_MMU
  213. config CPU_ARM1176
  214. bool
  215. select HAS_VBAR
  216. select SYS_CACHE_SHIFT_5
  217. imply SYS_ARM_MMU
  218. config CPU_V7A
  219. bool
  220. select HAS_THUMB2
  221. select HAS_VBAR
  222. select SYS_CACHE_SHIFT_6
  223. imply SYS_ARM_MMU
  224. config CPU_V7M
  225. bool
  226. select HAS_THUMB2
  227. select SYS_ARM_MPU
  228. select SYS_CACHE_SHIFT_5
  229. select SYS_THUMB_BUILD
  230. select THUMB2_KERNEL
  231. config CPU_V7R
  232. bool
  233. select HAS_THUMB2
  234. select SYS_ARM_CACHE_CP15
  235. select SYS_ARM_MPU
  236. select SYS_CACHE_SHIFT_6
  237. config CPU_PXA
  238. bool
  239. select SYS_CACHE_SHIFT_5
  240. imply SYS_ARM_MMU
  241. config CPU_SA1100
  242. bool
  243. select SYS_CACHE_SHIFT_5
  244. imply SYS_ARM_MMU
  245. config SYS_CPU
  246. default "arm720t" if CPU_ARM720T
  247. default "arm920t" if CPU_ARM920T
  248. default "arm926ejs" if CPU_ARM926EJS
  249. default "arm946es" if CPU_ARM946ES
  250. default "arm1136" if CPU_ARM1136
  251. default "arm1176" if CPU_ARM1176
  252. default "armv7" if CPU_V7A
  253. default "armv7" if CPU_V7R
  254. default "armv7m" if CPU_V7M
  255. default "pxa" if CPU_PXA
  256. default "sa1100" if CPU_SA1100
  257. default "armv8" if ARM64
  258. config SYS_ARM_ARCH
  259. int
  260. default 4 if CPU_ARM720T
  261. default 4 if CPU_ARM920T
  262. default 5 if CPU_ARM926EJS
  263. default 5 if CPU_ARM946ES
  264. default 6 if CPU_ARM1136
  265. default 6 if CPU_ARM1176
  266. default 7 if CPU_V7A
  267. default 7 if CPU_V7M
  268. default 7 if CPU_V7R
  269. default 5 if CPU_PXA
  270. default 4 if CPU_SA1100
  271. default 8 if ARM64
  272. config SYS_CACHE_SHIFT_5
  273. bool
  274. config SYS_CACHE_SHIFT_6
  275. bool
  276. config SYS_CACHE_SHIFT_7
  277. bool
  278. config SYS_CACHELINE_SIZE
  279. int
  280. default 128 if SYS_CACHE_SHIFT_7
  281. default 64 if SYS_CACHE_SHIFT_6
  282. default 32 if SYS_CACHE_SHIFT_5
  283. choice
  284. prompt "Select the ARM data write cache policy"
  285. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  286. CPU_PXA || RZA1
  287. default SYS_ARM_CACHE_WRITEBACK
  288. config SYS_ARM_CACHE_WRITEBACK
  289. bool "Write-back (WB)"
  290. help
  291. A write updates the cache only and marks the cache line as dirty.
  292. External memory is updated only when the line is evicted or explicitly
  293. cleaned.
  294. config SYS_ARM_CACHE_WRITETHROUGH
  295. bool "Write-through (WT)"
  296. help
  297. A write updates both the cache and the external memory system.
  298. This does not mark the cache line as dirty.
  299. config SYS_ARM_CACHE_WRITEALLOC
  300. bool "Write allocation (WA)"
  301. help
  302. A cache line is allocated on a write miss. This means that executing a
  303. store instruction on the processor might cause a burst read to occur.
  304. There is a linefill to obtain the data for the cache line, before the
  305. write is performed.
  306. endchoice
  307. config ARCH_CPU_INIT
  308. bool "Enable ARCH_CPU_INIT"
  309. help
  310. Some architectures require a call to arch_cpu_init().
  311. Say Y here to enable it
  312. config SYS_ARCH_TIMER
  313. bool "ARM Generic Timer support"
  314. depends on CPU_V7A || ARM64
  315. default y if ARM64
  316. help
  317. The ARM Generic Timer (aka arch-timer) provides an architected
  318. interface to a timer source on an SoC.
  319. It is mandatory for ARMv8 implementation and widely available
  320. on ARMv7 systems.
  321. config ARM_SMCCC
  322. bool "Support for ARM SMC Calling Convention (SMCCC)"
  323. depends on CPU_V7A || ARM64
  324. select ARM_PSCI_FW
  325. help
  326. Say Y here if you want to enable ARM SMC Calling Convention.
  327. This should be enabled if U-Boot needs to communicate with system
  328. firmware (for example, PSCI) according to SMCCC.
  329. config SEMIHOSTING
  330. bool "support boot from semihosting"
  331. help
  332. In emulated environments, semihosting is a way for
  333. the hosted environment to call out to the emulator to
  334. retrieve files from the host machine.
  335. config SYS_THUMB_BUILD
  336. bool "Build U-Boot using the Thumb instruction set"
  337. depends on !ARM64
  338. help
  339. Use this flag to build U-Boot using the Thumb instruction set for
  340. ARM architectures. Thumb instruction set provides better code
  341. density. For ARM architectures that support Thumb2 this flag will
  342. result in Thumb2 code generated by GCC.
  343. config SPL_SYS_THUMB_BUILD
  344. bool "Build SPL using the Thumb instruction set"
  345. default y if SYS_THUMB_BUILD
  346. depends on !ARM64 && SPL
  347. help
  348. Use this flag to build SPL using the Thumb instruction set for
  349. ARM architectures. Thumb instruction set provides better code
  350. density. For ARM architectures that support Thumb2 this flag will
  351. result in Thumb2 code generated by GCC.
  352. config TPL_SYS_THUMB_BUILD
  353. bool "Build TPL using the Thumb instruction set"
  354. default y if SYS_THUMB_BUILD
  355. depends on TPL && !ARM64
  356. help
  357. Use this flag to build TPL using the Thumb instruction set for
  358. ARM architectures. Thumb instruction set provides better code
  359. density. For ARM architectures that support Thumb2 this flag will
  360. result in Thumb2 code generated by GCC.
  361. config SYS_L2CACHE_OFF
  362. bool "L2cache off"
  363. help
  364. If SoC does not support L2CACHE or one does not want to enable
  365. L2CACHE, choose this option.
  366. config ENABLE_ARM_SOC_BOOT0_HOOK
  367. bool "prepare BOOT0 header"
  368. help
  369. If the SoC's BOOT0 requires a header area filled with (magic)
  370. values, then choose this option, and create a file included as
  371. <asm/arch/boot0.h> which contains the required assembler code.
  372. config ARM_CORTEX_CPU_IS_UP
  373. bool
  374. default n
  375. config USE_ARCH_MEMCPY
  376. bool "Use an assembly optimized implementation of memcpy"
  377. default y
  378. depends on !ARM64
  379. help
  380. Enable the generation of an optimized version of memcpy.
  381. Such an implementation may be faster under some conditions
  382. but may increase the binary size.
  383. config SPL_USE_ARCH_MEMCPY
  384. bool "Use an assembly optimized implementation of memcpy for SPL"
  385. default y if USE_ARCH_MEMCPY
  386. depends on !ARM64 && SPL
  387. help
  388. Enable the generation of an optimized version of memcpy.
  389. Such an implementation may be faster under some conditions
  390. but may increase the binary size.
  391. config TPL_USE_ARCH_MEMCPY
  392. bool "Use an assembly optimized implementation of memcpy for TPL"
  393. default y if USE_ARCH_MEMCPY
  394. depends on !ARM64 && TPL
  395. help
  396. Enable the generation of an optimized version of memcpy.
  397. Such an implementation may be faster under some conditions
  398. but may increase the binary size.
  399. config USE_ARCH_MEMSET
  400. bool "Use an assembly optimized implementation of memset"
  401. default y
  402. depends on !ARM64
  403. help
  404. Enable the generation of an optimized version of memset.
  405. Such an implementation may be faster under some conditions
  406. but may increase the binary size.
  407. config SPL_USE_ARCH_MEMSET
  408. bool "Use an assembly optimized implementation of memset for SPL"
  409. default y if USE_ARCH_MEMSET
  410. depends on !ARM64 && SPL
  411. help
  412. Enable the generation of an optimized version of memset.
  413. Such an implementation may be faster under some conditions
  414. but may increase the binary size.
  415. config TPL_USE_ARCH_MEMSET
  416. bool "Use an assembly optimized implementation of memset for TPL"
  417. default y if USE_ARCH_MEMSET
  418. depends on !ARM64 && TPL
  419. help
  420. Enable the generation of an optimized version of memset.
  421. Such an implementation may be faster under some conditions
  422. but may increase the binary size.
  423. config ARM64_SUPPORT_AARCH32
  424. bool "ARM64 system support AArch32 execution state"
  425. depends on ARM64
  426. default y if !TARGET_THUNDERX_88XX
  427. help
  428. This ARM64 system supports AArch32 execution state.
  429. choice
  430. prompt "Target select"
  431. default TARGET_HIKEY
  432. config ARCH_AT91
  433. bool "Atmel AT91"
  434. select GPIO_EXTRA_HEADER
  435. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  436. select SPL_SEPARATE_BSS if SPL
  437. config TARGET_EDB93XX
  438. bool "Support edb93xx"
  439. select CPU_ARM920T
  440. select GPIO_EXTRA_HEADER
  441. select PL010_SERIAL
  442. config TARGET_ASPENITE
  443. bool "Support aspenite"
  444. select CPU_ARM926EJS
  445. select GPIO_EXTRA_HEADER
  446. config TARGET_GPLUGD
  447. bool "Support gplugd"
  448. select CPU_ARM926EJS
  449. select GPIO_EXTRA_HEADER
  450. config ARCH_DAVINCI
  451. bool "TI DaVinci"
  452. select CPU_ARM926EJS
  453. select GPIO_EXTRA_HEADER
  454. select SPL_DM_SPI if SPL
  455. imply CMD_SAVES
  456. help
  457. Support for TI's DaVinci platform.
  458. config ARCH_KIRKWOOD
  459. bool "Marvell Kirkwood"
  460. select ARCH_MISC_INIT
  461. select BOARD_EARLY_INIT_F
  462. select CPU_ARM926EJS
  463. select GPIO_EXTRA_HEADER
  464. config ARCH_MVEBU
  465. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  466. select DM
  467. select DM_ETH
  468. select DM_SERIAL
  469. select DM_SPI
  470. select DM_SPI_FLASH
  471. select GPIO_EXTRA_HEADER
  472. select SPL_DM_SPI if SPL
  473. select SPL_DM_SPI_FLASH if SPL
  474. select OF_CONTROL
  475. select OF_SEPARATE
  476. select SPI
  477. imply CMD_DM
  478. config ARCH_ORION5X
  479. bool "Marvell Orion"
  480. select CPU_ARM926EJS
  481. select GPIO_EXTRA_HEADER
  482. config TARGET_SPEAR300
  483. bool "Support spear300"
  484. select BOARD_EARLY_INIT_F
  485. select CPU_ARM926EJS
  486. select GPIO_EXTRA_HEADER
  487. select PL011_SERIAL
  488. imply CMD_SAVES
  489. config TARGET_SPEAR310
  490. bool "Support spear310"
  491. select BOARD_EARLY_INIT_F
  492. select CPU_ARM926EJS
  493. select GPIO_EXTRA_HEADER
  494. select PL011_SERIAL
  495. imply CMD_SAVES
  496. config TARGET_SPEAR320
  497. bool "Support spear320"
  498. select BOARD_EARLY_INIT_F
  499. select CPU_ARM926EJS
  500. select GPIO_EXTRA_HEADER
  501. select PL011_SERIAL
  502. imply CMD_SAVES
  503. config TARGET_SPEAR600
  504. bool "Support spear600"
  505. select BOARD_EARLY_INIT_F
  506. select CPU_ARM926EJS
  507. select GPIO_EXTRA_HEADER
  508. select PL011_SERIAL
  509. imply CMD_SAVES
  510. config TARGET_STV0991
  511. bool "Support stv0991"
  512. select CPU_V7A
  513. select DM
  514. select DM_SERIAL
  515. select DM_SPI
  516. select DM_SPI_FLASH
  517. select GPIO_EXTRA_HEADER
  518. select PL01X_SERIAL
  519. select SPI
  520. select SPI_FLASH
  521. imply CMD_DM
  522. config TARGET_X600
  523. bool "Support x600"
  524. select BOARD_LATE_INIT
  525. select CPU_ARM926EJS
  526. select GPIO_EXTRA_HEADER
  527. select PL011_SERIAL
  528. select SUPPORT_SPL
  529. config TARGET_FLEA3
  530. bool "Support flea3"
  531. select CPU_ARM1136
  532. select GPIO_EXTRA_HEADER
  533. config ARCH_BCM283X
  534. bool "Broadcom BCM283X family"
  535. select DM
  536. select DM_GPIO
  537. select DM_SERIAL
  538. select GPIO_EXTRA_HEADER
  539. select OF_CONTROL
  540. select PL01X_SERIAL
  541. select SERIAL_SEARCH_ALL
  542. imply CMD_DM
  543. imply FAT_WRITE
  544. config ARCH_BCM63158
  545. bool "Broadcom BCM63158 family"
  546. select DM
  547. select OF_CONTROL
  548. imply CMD_DM
  549. config ARCH_BCM68360
  550. bool "Broadcom BCM68360 family"
  551. select DM
  552. select OF_CONTROL
  553. imply CMD_DM
  554. config ARCH_BCM6858
  555. bool "Broadcom BCM6858 family"
  556. select DM
  557. select OF_CONTROL
  558. imply CMD_DM
  559. config ARCH_BCMSTB
  560. bool "Broadcom BCM7XXX family"
  561. select CPU_V7A
  562. select DM
  563. select GPIO_EXTRA_HEADER
  564. select OF_CONTROL
  565. select OF_PRIOR_STAGE
  566. imply CMD_DM
  567. help
  568. This enables support for Broadcom ARM-based set-top box
  569. chipsets, including the 7445 family of chips.
  570. config TARGET_BCMCYGNUS
  571. bool "Support bcmcygnus"
  572. select CPU_V7A
  573. select GPIO_EXTRA_HEADER
  574. imply BCM_SF2_ETH
  575. imply BCM_SF2_ETH_GMAC
  576. imply CMD_HASH
  577. imply CRC32_VERIFY
  578. imply FAT_WRITE
  579. imply HASH_VERIFY
  580. imply NETDEVICES
  581. config TARGET_BCMNS2
  582. bool "Support Broadcom Northstar2"
  583. select ARM64
  584. select GPIO_EXTRA_HEADER
  585. help
  586. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  587. ARMv8 Cortex-A57 processors targeting a broad range of networking
  588. applications.
  589. config TARGET_BCMNS3
  590. bool "Support Broadcom NS3"
  591. select ARM64
  592. select BOARD_LATE_INIT
  593. help
  594. Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
  595. ARMv8 Cortex-A72 processors targeting a broad range of networking
  596. applications.
  597. config ARCH_EXYNOS
  598. bool "Samsung EXYNOS"
  599. select DM
  600. select DM_GPIO
  601. select DM_I2C
  602. select DM_KEYBOARD
  603. select DM_SERIAL
  604. select DM_SPI
  605. select DM_SPI_FLASH
  606. select SPI
  607. select GPIO_EXTRA_HEADER
  608. imply SYS_THUMB_BUILD
  609. imply CMD_DM
  610. imply FAT_WRITE
  611. config ARCH_S5PC1XX
  612. bool "Samsung S5PC1XX"
  613. select CPU_V7A
  614. select DM
  615. select DM_GPIO
  616. select DM_I2C
  617. select DM_SERIAL
  618. select GPIO_EXTRA_HEADER
  619. imply CMD_DM
  620. config ARCH_HIGHBANK
  621. bool "Calxeda Highbank"
  622. select CPU_V7A
  623. select PL01X_SERIAL
  624. select DM
  625. select DM_SERIAL
  626. select OF_CONTROL
  627. select OF_BOARD
  628. select CLK
  629. select CLK_CCF
  630. select AHCI
  631. select DM_ETH
  632. select PHYS_64BIT
  633. config ARCH_INTEGRATOR
  634. bool "ARM Ltd. Integrator family"
  635. select DM
  636. select DM_SERIAL
  637. select GPIO_EXTRA_HEADER
  638. select PL01X_SERIAL
  639. imply CMD_DM
  640. config ARCH_IPQ40XX
  641. bool "Qualcomm IPQ40xx SoCs"
  642. select CPU_V7A
  643. select DM
  644. select DM_GPIO
  645. select DM_SERIAL
  646. select DM_RESET
  647. select GPIO_EXTRA_HEADER
  648. select MSM_SMEM
  649. select PINCTRL
  650. select CLK
  651. select SMEM
  652. select OF_CONTROL
  653. imply CMD_DM
  654. config ARCH_KEYSTONE
  655. bool "TI Keystone"
  656. select CMD_POWEROFF
  657. select CPU_V7A
  658. select GPIO_EXTRA_HEADER
  659. select SUPPORT_SPL
  660. select SYS_ARCH_TIMER
  661. select SYS_THUMB_BUILD
  662. imply CMD_MTDPARTS
  663. imply CMD_SAVES
  664. imply FIT
  665. config ARCH_K3
  666. bool "Texas Instruments' K3 Architecture"
  667. select SPL
  668. select SUPPORT_SPL
  669. select FIT
  670. config ARCH_OMAP2PLUS
  671. bool "TI OMAP2+"
  672. select CPU_V7A
  673. select GPIO_EXTRA_HEADER
  674. select SPL_BOARD_INIT if SPL
  675. select SPL_STACK_R if SPL
  676. select SUPPORT_SPL
  677. imply TI_SYSC if DM && OF_CONTROL
  678. imply FIT
  679. config ARCH_MESON
  680. bool "Amlogic Meson"
  681. select GPIO_EXTRA_HEADER
  682. imply DISTRO_DEFAULTS
  683. imply DM_RNG
  684. help
  685. Support for the Meson SoC family developed by Amlogic Inc.,
  686. targeted at media players and tablet computers. We currently
  687. support the S905 (GXBaby) 64-bit SoC.
  688. config ARCH_MEDIATEK
  689. bool "MediaTek SoCs"
  690. select DM
  691. select GPIO_EXTRA_HEADER
  692. select OF_CONTROL
  693. select SPL_DM if SPL
  694. select SPL_LIBCOMMON_SUPPORT if SPL
  695. select SPL_LIBGENERIC_SUPPORT if SPL
  696. select SPL_OF_CONTROL if SPL
  697. select SUPPORT_SPL
  698. help
  699. Support for the MediaTek SoCs family developed by MediaTek Inc.
  700. Please refer to doc/README.mediatek for more information.
  701. config ARCH_LPC32XX
  702. bool "NXP LPC32xx platform"
  703. select CPU_ARM926EJS
  704. select DM
  705. select DM_GPIO
  706. select DM_SERIAL
  707. select GPIO_EXTRA_HEADER
  708. select SPL_DM if SPL
  709. select SUPPORT_SPL
  710. imply CMD_DM
  711. config ARCH_IMX8
  712. bool "NXP i.MX8 platform"
  713. select ARM64
  714. select DM
  715. select GPIO_EXTRA_HEADER
  716. select OF_CONTROL
  717. select ENABLE_ARM_SOC_BOOT0_HOOK
  718. config ARCH_IMX8M
  719. bool "NXP i.MX8M platform"
  720. select ARM64
  721. select GPIO_EXTRA_HEADER
  722. select SYS_FSL_HAS_SEC if IMX_HAB
  723. select SYS_FSL_SEC_COMPAT_4
  724. select SYS_FSL_SEC_LE
  725. select DM
  726. select SUPPORT_SPL
  727. imply CMD_DM
  728. config ARCH_IMXRT
  729. bool "NXP i.MXRT platform"
  730. select CPU_V7M
  731. select DM
  732. select DM_SERIAL
  733. select GPIO_EXTRA_HEADER
  734. select SUPPORT_SPL
  735. imply CMD_DM
  736. config ARCH_MX23
  737. bool "NXP i.MX23 family"
  738. select CPU_ARM926EJS
  739. select GPIO_EXTRA_HEADER
  740. select PL011_SERIAL
  741. select SUPPORT_SPL
  742. config ARCH_MX25
  743. bool "NXP MX25"
  744. select CPU_ARM926EJS
  745. select GPIO_EXTRA_HEADER
  746. imply MXC_GPIO
  747. config ARCH_MX28
  748. bool "NXP i.MX28 family"
  749. select CPU_ARM926EJS
  750. select GPIO_EXTRA_HEADER
  751. select PL011_SERIAL
  752. select SUPPORT_SPL
  753. config ARCH_MX31
  754. bool "NXP i.MX31 family"
  755. select CPU_ARM1136
  756. select GPIO_EXTRA_HEADER
  757. config ARCH_MX7ULP
  758. bool "NXP MX7ULP"
  759. select CPU_V7A
  760. select GPIO_EXTRA_HEADER
  761. select SYS_FSL_HAS_SEC if IMX_HAB
  762. select SYS_FSL_SEC_COMPAT_4
  763. select SYS_FSL_SEC_LE
  764. select ROM_UNIFIED_SECTIONS
  765. imply MXC_GPIO
  766. imply SYS_THUMB_BUILD
  767. config ARCH_MX7
  768. bool "Freescale MX7"
  769. select ARCH_MISC_INIT
  770. select CPU_V7A
  771. select GPIO_EXTRA_HEADER
  772. select SYS_FSL_HAS_SEC if IMX_HAB
  773. select SYS_FSL_SEC_COMPAT_4
  774. select SYS_FSL_SEC_LE
  775. imply BOARD_EARLY_INIT_F
  776. imply MXC_GPIO
  777. imply SYS_THUMB_BUILD
  778. config ARCH_MX6
  779. bool "Freescale MX6"
  780. select CPU_V7A
  781. select GPIO_EXTRA_HEADER
  782. select SYS_FSL_HAS_SEC
  783. select SYS_FSL_SEC_COMPAT_4
  784. select SYS_FSL_SEC_LE
  785. imply MXC_GPIO
  786. imply SYS_THUMB_BUILD
  787. if ARCH_MX6
  788. config SPL_LDSCRIPT
  789. default "arch/arm/mach-omap2/u-boot-spl.lds"
  790. endif
  791. config ARCH_MX5
  792. bool "Freescale MX5"
  793. select BOARD_EARLY_INIT_F
  794. select CPU_V7A
  795. select GPIO_EXTRA_HEADER
  796. imply MXC_GPIO
  797. config ARCH_NEXELL
  798. bool "Nexell S5P4418/S5P6818 SoC"
  799. select ENABLE_ARM_SOC_BOOT0_HOOK
  800. select DM
  801. select GPIO_EXTRA_HEADER
  802. config ARCH_OWL
  803. bool "Actions Semi OWL SoCs"
  804. select DM
  805. select DM_ETH
  806. select DM_SERIAL
  807. select GPIO_EXTRA_HEADER
  808. select OWL_SERIAL
  809. select CLK
  810. select CLK_OWL
  811. select OF_CONTROL
  812. select SYS_RELOC_GD_ENV_ADDR
  813. imply CMD_DM
  814. config ARCH_QEMU
  815. bool "QEMU Virtual Platform"
  816. select DM
  817. select DM_SERIAL
  818. select OF_CONTROL
  819. select PL01X_SERIAL
  820. imply CMD_DM
  821. imply DM_RNG
  822. imply DM_RTC
  823. imply RTC_PL031
  824. config ARCH_RMOBILE
  825. bool "Renesas ARM SoCs"
  826. select DM
  827. select DM_SERIAL
  828. select GPIO_EXTRA_HEADER
  829. imply BOARD_EARLY_INIT_F
  830. imply CMD_DM
  831. imply FAT_WRITE
  832. imply SYS_THUMB_BUILD
  833. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  834. config ARCH_SNAPDRAGON
  835. bool "Qualcomm Snapdragon SoCs"
  836. select ARM64
  837. select DM
  838. select DM_GPIO
  839. select DM_SERIAL
  840. select GPIO_EXTRA_HEADER
  841. select MSM_SMEM
  842. select OF_CONTROL
  843. select OF_SEPARATE
  844. select SMEM
  845. select SPMI
  846. imply CMD_DM
  847. config ARCH_SOCFPGA
  848. bool "Altera SOCFPGA family"
  849. select ARCH_EARLY_INIT_R
  850. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  851. select ARM64 if TARGET_SOCFPGA_SOC64
  852. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  853. select DM
  854. select DM_SERIAL
  855. select GPIO_EXTRA_HEADER
  856. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  857. select OF_CONTROL
  858. select SPL_DM_RESET if DM_RESET
  859. select SPL_DM_SERIAL
  860. select SPL_LIBCOMMON_SUPPORT
  861. select SPL_LIBGENERIC_SUPPORT
  862. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  863. select SPL_OF_CONTROL
  864. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
  865. select SPL_SERIAL_SUPPORT
  866. select SPL_SYSRESET
  867. select SPL_WATCHDOG_SUPPORT
  868. select SUPPORT_SPL
  869. select SYS_NS16550
  870. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  871. select SYSRESET
  872. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  873. select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
  874. imply CMD_DM
  875. imply CMD_MTDPARTS
  876. imply CRC32_VERIFY
  877. imply DM_SPI
  878. imply DM_SPI_FLASH
  879. imply FAT_WRITE
  880. imply SPL
  881. imply SPL_DM
  882. imply SPL_DM_SPI
  883. imply SPL_DM_SPI_FLASH
  884. imply SPL_LIBDISK_SUPPORT
  885. imply SPL_MMC_SUPPORT
  886. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  887. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  888. imply SPL_SPI_FLASH_SUPPORT
  889. imply SPL_SPI_SUPPORT
  890. imply L2X0_CACHE
  891. config ARCH_SUNXI
  892. bool "Support sunxi (Allwinner) SoCs"
  893. select BINMAN
  894. select CMD_GPIO
  895. select CMD_MMC if MMC
  896. select CMD_USB if DISTRO_DEFAULTS
  897. select CLK
  898. select DM
  899. select DM_ETH
  900. select DM_GPIO
  901. select DM_KEYBOARD
  902. select DM_MMC if MMC
  903. select DM_SCSI if SCSI
  904. select DM_SERIAL
  905. select DM_USB if DISTRO_DEFAULTS
  906. select GPIO_EXTRA_HEADER
  907. select OF_BOARD_SETUP
  908. select OF_CONTROL
  909. select OF_SEPARATE
  910. select SPECIFY_CONSOLE_INDEX
  911. select SPL_STACK_R if SPL
  912. select SPL_SYS_MALLOC_SIMPLE if SPL
  913. select SPL_SYS_THUMB_BUILD if !ARM64
  914. select SUNXI_GPIO
  915. select SYS_NS16550
  916. select SYS_THUMB_BUILD if !ARM64
  917. select USB if DISTRO_DEFAULTS
  918. select USB_KEYBOARD if DISTRO_DEFAULTS
  919. select USB_STORAGE if DISTRO_DEFAULTS
  920. select SPL_USE_TINY_PRINTF
  921. select USE_PREBOOT
  922. select SYS_RELOC_GD_ENV_ADDR
  923. imply BOARD_LATE_INIT
  924. imply CMD_DM
  925. imply CMD_GPT
  926. imply CMD_UBI if MTD_RAW_NAND
  927. imply DISTRO_DEFAULTS
  928. imply FAT_WRITE
  929. imply FIT
  930. imply OF_LIBFDT_OVERLAY
  931. imply PRE_CONSOLE_BUFFER
  932. imply SPL_GPIO_SUPPORT
  933. imply SPL_LIBCOMMON_SUPPORT
  934. imply SPL_LIBGENERIC_SUPPORT
  935. imply SPL_MMC_SUPPORT if MMC
  936. imply SPL_POWER_SUPPORT
  937. imply SPL_SERIAL_SUPPORT
  938. imply USB_GADGET
  939. config ARCH_U8500
  940. bool "ST-Ericsson U8500 Series"
  941. select CPU_V7A
  942. select DM
  943. select DM_GPIO
  944. select DM_MMC if MMC
  945. select DM_SERIAL
  946. select DM_USB if USB
  947. select OF_CONTROL
  948. select SYSRESET
  949. select TIMER
  950. imply ARM_PL180_MMCI
  951. imply DM_RTC
  952. imply NOMADIK_MTU_TIMER
  953. imply PL01X_SERIAL
  954. imply RTC_PL031
  955. imply SYSRESET_SYSCON
  956. config ARCH_VERSAL
  957. bool "Support Xilinx Versal Platform"
  958. select ARM64
  959. select CLK
  960. select DM
  961. select DM_ETH if NET
  962. select DM_MMC if MMC
  963. select DM_SERIAL
  964. select GPIO_EXTRA_HEADER
  965. select OF_CONTROL
  966. imply BOARD_LATE_INIT
  967. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  968. config ARCH_VF610
  969. bool "Freescale Vybrid"
  970. select CPU_V7A
  971. select GPIO_EXTRA_HEADER
  972. select SYS_FSL_ERRATUM_ESDHC111
  973. imply CMD_MTDPARTS
  974. imply MTD_RAW_NAND
  975. config ARCH_ZYNQ
  976. bool "Xilinx Zynq based platform"
  977. select CLK
  978. select CLK_ZYNQ
  979. select CPU_V7A
  980. select DM
  981. select DM_ETH if NET
  982. select DM_MMC if MMC
  983. select DM_SERIAL
  984. select DM_SPI
  985. select DM_SPI_FLASH
  986. select DM_USB if USB
  987. select GPIO_EXTRA_HEADER
  988. select OF_CONTROL
  989. select SPI
  990. select SPL_BOARD_INIT if SPL
  991. select SPL_CLK if SPL
  992. select SPL_DM if SPL
  993. select SPL_DM_SPI if SPL
  994. select SPL_DM_SPI_FLASH if SPL
  995. select SPL_OF_CONTROL if SPL
  996. select SPL_SEPARATE_BSS if SPL
  997. select SUPPORT_SPL
  998. imply ARCH_EARLY_INIT_R
  999. imply BOARD_LATE_INIT
  1000. imply CMD_CLK
  1001. imply CMD_DM
  1002. imply CMD_SPL
  1003. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1004. imply FAT_WRITE
  1005. config ARCH_ZYNQMP_R5
  1006. bool "Xilinx ZynqMP R5 based platform"
  1007. select CLK
  1008. select CPU_V7R
  1009. select DM
  1010. select DM_ETH if NET
  1011. select DM_MMC if MMC
  1012. select DM_SERIAL
  1013. select GPIO_EXTRA_HEADER
  1014. select OF_CONTROL
  1015. imply CMD_DM
  1016. imply DM_USB_GADGET
  1017. config ARCH_ZYNQMP
  1018. bool "Xilinx ZynqMP based platform"
  1019. select ARM64
  1020. select CLK
  1021. select DM
  1022. select DM_ETH if NET
  1023. select DM_MAILBOX
  1024. select DM_MMC if MMC
  1025. select DM_SERIAL
  1026. select DM_SPI if SPI
  1027. select DM_SPI_FLASH if DM_SPI
  1028. select DM_USB if USB
  1029. select FIRMWARE
  1030. select GPIO_EXTRA_HEADER
  1031. select OF_CONTROL
  1032. select SPL_BOARD_INIT if SPL
  1033. select SPL_CLK if SPL
  1034. select SPL_DM if SPL
  1035. select SPL_DM_SPI if SPI && SPL_DM
  1036. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  1037. select SPL_DM_MAILBOX if SPL
  1038. select SPL_FIRMWARE if SPL
  1039. select SPL_SEPARATE_BSS if SPL
  1040. select SUPPORT_SPL
  1041. select ZYNQMP_IPI
  1042. imply BOARD_LATE_INIT
  1043. imply CMD_DM
  1044. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1045. imply FAT_WRITE
  1046. imply MP
  1047. imply DM_USB_GADGET
  1048. config ARCH_TEGRA
  1049. bool "NVIDIA Tegra"
  1050. select GPIO_EXTRA_HEADER
  1051. imply DISTRO_DEFAULTS
  1052. imply FAT_WRITE
  1053. config TARGET_VEXPRESS64_AEMV8A
  1054. bool "Support vexpress_aemv8a"
  1055. select ARM64
  1056. select GPIO_EXTRA_HEADER
  1057. select PL01X_SERIAL
  1058. config TARGET_VEXPRESS64_BASE_FVP
  1059. bool "Support Versatile Express ARMv8a FVP BASE model"
  1060. select ARM64
  1061. select GPIO_EXTRA_HEADER
  1062. select PL01X_SERIAL
  1063. select SEMIHOSTING
  1064. config TARGET_VEXPRESS64_JUNO
  1065. bool "Support Versatile Express Juno Development Platform"
  1066. select ARM64
  1067. select GPIO_EXTRA_HEADER
  1068. select PL01X_SERIAL
  1069. select DM
  1070. select OF_CONTROL
  1071. select OF_BOARD
  1072. select CLK
  1073. select DM_SERIAL
  1074. select ARM_PSCI_FW
  1075. select PSCI_RESET
  1076. select DM_ETH
  1077. select BLK
  1078. select USB
  1079. select DM_USB
  1080. config TARGET_TOTAL_COMPUTE
  1081. bool "Support Total Compute Platform"
  1082. select ARM64
  1083. select PL01X_SERIAL
  1084. select DM
  1085. select DM_SERIAL
  1086. select DM_MMC
  1087. select DM_GPIO
  1088. config TARGET_LS2080A_EMU
  1089. bool "Support ls2080a_emu"
  1090. select ARCH_LS2080A
  1091. select ARM64
  1092. select ARMV8_MULTIENTRY
  1093. select FSL_DDR_SYNC_REFRESH
  1094. select GPIO_EXTRA_HEADER
  1095. help
  1096. Support for Freescale LS2080A_EMU platform.
  1097. The LS2080A Development System (EMULATOR) is a pre-silicon
  1098. development platform that supports the QorIQ LS2080A
  1099. Layerscape Architecture processor.
  1100. config TARGET_LS1088AQDS
  1101. bool "Support ls1088aqds"
  1102. select ARCH_LS1088A
  1103. select ARM64
  1104. select ARMV8_MULTIENTRY
  1105. select ARCH_SUPPORT_TFABOOT
  1106. select BOARD_LATE_INIT
  1107. select GPIO_EXTRA_HEADER
  1108. select SUPPORT_SPL
  1109. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1110. help
  1111. Support for NXP LS1088AQDS platform.
  1112. The LS1088A Development System (QDS) is a high-performance
  1113. development platform that supports the QorIQ LS1088A
  1114. Layerscape Architecture processor.
  1115. config TARGET_LS2080AQDS
  1116. bool "Support ls2080aqds"
  1117. select ARCH_LS2080A
  1118. select ARM64
  1119. select ARMV8_MULTIENTRY
  1120. select ARCH_SUPPORT_TFABOOT
  1121. select BOARD_LATE_INIT
  1122. select GPIO_EXTRA_HEADER
  1123. select SUPPORT_SPL
  1124. imply SCSI
  1125. imply SCSI_AHCI
  1126. select FSL_DDR_BIST
  1127. select FSL_DDR_INTERACTIVE if !SPL
  1128. help
  1129. Support for Freescale LS2080AQDS platform.
  1130. The LS2080A Development System (QDS) is a high-performance
  1131. development platform that supports the QorIQ LS2080A
  1132. Layerscape Architecture processor.
  1133. config TARGET_LS2080ARDB
  1134. bool "Support ls2080ardb"
  1135. select ARCH_LS2080A
  1136. select ARM64
  1137. select ARMV8_MULTIENTRY
  1138. select ARCH_SUPPORT_TFABOOT
  1139. select BOARD_LATE_INIT
  1140. select SUPPORT_SPL
  1141. select FSL_DDR_BIST
  1142. select FSL_DDR_INTERACTIVE if !SPL
  1143. select GPIO_EXTRA_HEADER
  1144. imply SCSI
  1145. imply SCSI_AHCI
  1146. help
  1147. Support for Freescale LS2080ARDB platform.
  1148. The LS2080A Reference design board (RDB) is a high-performance
  1149. development platform that supports the QorIQ LS2080A
  1150. Layerscape Architecture processor.
  1151. config TARGET_LS2081ARDB
  1152. bool "Support ls2081ardb"
  1153. select ARCH_LS2080A
  1154. select ARM64
  1155. select ARMV8_MULTIENTRY
  1156. select BOARD_LATE_INIT
  1157. select GPIO_EXTRA_HEADER
  1158. select SUPPORT_SPL
  1159. help
  1160. Support for Freescale LS2081ARDB platform.
  1161. The LS2081A Reference design board (RDB) is a high-performance
  1162. development platform that supports the QorIQ LS2081A/LS2041A
  1163. Layerscape Architecture processor.
  1164. config TARGET_LX2160ARDB
  1165. bool "Support lx2160ardb"
  1166. select ARCH_LX2160A
  1167. select ARM64
  1168. select ARMV8_MULTIENTRY
  1169. select ARCH_SUPPORT_TFABOOT
  1170. select BOARD_LATE_INIT
  1171. select GPIO_EXTRA_HEADER
  1172. help
  1173. Support for NXP LX2160ARDB platform.
  1174. The lx2160ardb (LX2160A Reference design board (RDB)
  1175. is a high-performance development platform that supports the
  1176. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1177. config TARGET_LX2160AQDS
  1178. bool "Support lx2160aqds"
  1179. select ARCH_LX2160A
  1180. select ARM64
  1181. select ARMV8_MULTIENTRY
  1182. select ARCH_SUPPORT_TFABOOT
  1183. select BOARD_LATE_INIT
  1184. select GPIO_EXTRA_HEADER
  1185. help
  1186. Support for NXP LX2160AQDS platform.
  1187. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1188. is a high-performance development platform that supports the
  1189. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1190. config TARGET_LX2162AQDS
  1191. bool "Support lx2162aqds"
  1192. select ARCH_LX2162A
  1193. select ARCH_MISC_INIT
  1194. select ARM64
  1195. select ARMV8_MULTIENTRY
  1196. select ARCH_SUPPORT_TFABOOT
  1197. select BOARD_LATE_INIT
  1198. select GPIO_EXTRA_HEADER
  1199. help
  1200. Support for NXP LX2162AQDS platform.
  1201. The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
  1202. config TARGET_HIKEY
  1203. bool "Support HiKey 96boards Consumer Edition Platform"
  1204. select ARM64
  1205. select DM
  1206. select DM_GPIO
  1207. select DM_SERIAL
  1208. select GPIO_EXTRA_HEADER
  1209. select OF_CONTROL
  1210. select PL01X_SERIAL
  1211. select SPECIFY_CONSOLE_INDEX
  1212. imply CMD_DM
  1213. help
  1214. Support for HiKey 96boards platform. It features a HI6220
  1215. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1216. config TARGET_HIKEY960
  1217. bool "Support HiKey960 96boards Consumer Edition Platform"
  1218. select ARM64
  1219. select DM
  1220. select DM_SERIAL
  1221. select GPIO_EXTRA_HEADER
  1222. select OF_CONTROL
  1223. select PL01X_SERIAL
  1224. imply CMD_DM
  1225. help
  1226. Support for HiKey960 96boards platform. It features a HI3660
  1227. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1228. config TARGET_POPLAR
  1229. bool "Support Poplar 96boards Enterprise Edition Platform"
  1230. select ARM64
  1231. select DM
  1232. select DM_SERIAL
  1233. select DM_USB
  1234. select GPIO_EXTRA_HEADER
  1235. select OF_CONTROL
  1236. select PL01X_SERIAL
  1237. imply CMD_DM
  1238. help
  1239. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1240. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1241. making it capable of running any commercial set-top solution based on
  1242. Linux or Android.
  1243. config TARGET_LS1012AQDS
  1244. bool "Support ls1012aqds"
  1245. select ARCH_LS1012A
  1246. select ARM64
  1247. select ARCH_SUPPORT_TFABOOT
  1248. select BOARD_LATE_INIT
  1249. select GPIO_EXTRA_HEADER
  1250. help
  1251. Support for Freescale LS1012AQDS platform.
  1252. The LS1012A Development System (QDS) is a high-performance
  1253. development platform that supports the QorIQ LS1012A
  1254. Layerscape Architecture processor.
  1255. config TARGET_LS1012ARDB
  1256. bool "Support ls1012ardb"
  1257. select ARCH_LS1012A
  1258. select ARM64
  1259. select ARCH_SUPPORT_TFABOOT
  1260. select BOARD_LATE_INIT
  1261. select GPIO_EXTRA_HEADER
  1262. imply SCSI
  1263. imply SCSI_AHCI
  1264. help
  1265. Support for Freescale LS1012ARDB platform.
  1266. The LS1012A Reference design board (RDB) is a high-performance
  1267. development platform that supports the QorIQ LS1012A
  1268. Layerscape Architecture processor.
  1269. config TARGET_LS1012A2G5RDB
  1270. bool "Support ls1012a2g5rdb"
  1271. select ARCH_LS1012A
  1272. select ARM64
  1273. select ARCH_SUPPORT_TFABOOT
  1274. select BOARD_LATE_INIT
  1275. select GPIO_EXTRA_HEADER
  1276. imply SCSI
  1277. help
  1278. Support for Freescale LS1012A2G5RDB platform.
  1279. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1280. development platform that supports the QorIQ LS1012A
  1281. Layerscape Architecture processor.
  1282. config TARGET_LS1012AFRWY
  1283. bool "Support ls1012afrwy"
  1284. select ARCH_LS1012A
  1285. select ARM64
  1286. select ARCH_SUPPORT_TFABOOT
  1287. select BOARD_LATE_INIT
  1288. select GPIO_EXTRA_HEADER
  1289. imply SCSI
  1290. imply SCSI_AHCI
  1291. help
  1292. Support for Freescale LS1012AFRWY platform.
  1293. The LS1012A FRWY board (FRWY) is a high-performance
  1294. development platform that supports the QorIQ LS1012A
  1295. Layerscape Architecture processor.
  1296. config TARGET_LS1012AFRDM
  1297. bool "Support ls1012afrdm"
  1298. select ARCH_LS1012A
  1299. select ARM64
  1300. select ARCH_SUPPORT_TFABOOT
  1301. select GPIO_EXTRA_HEADER
  1302. help
  1303. Support for Freescale LS1012AFRDM platform.
  1304. The LS1012A Freedom board (FRDM) is a high-performance
  1305. development platform that supports the QorIQ LS1012A
  1306. Layerscape Architecture processor.
  1307. config TARGET_LS1028AQDS
  1308. bool "Support ls1028aqds"
  1309. select ARCH_LS1028A
  1310. select ARM64
  1311. select ARMV8_MULTIENTRY
  1312. select ARCH_SUPPORT_TFABOOT
  1313. select BOARD_LATE_INIT
  1314. select GPIO_EXTRA_HEADER
  1315. help
  1316. Support for Freescale LS1028AQDS platform
  1317. The LS1028A Development System (QDS) is a high-performance
  1318. development platform that supports the QorIQ LS1028A
  1319. Layerscape Architecture processor.
  1320. config TARGET_LS1028ARDB
  1321. bool "Support ls1028ardb"
  1322. select ARCH_LS1028A
  1323. select ARM64
  1324. select ARMV8_MULTIENTRY
  1325. select ARCH_SUPPORT_TFABOOT
  1326. select BOARD_LATE_INIT
  1327. select GPIO_EXTRA_HEADER
  1328. help
  1329. Support for Freescale LS1028ARDB platform
  1330. The LS1028A Development System (RDB) is a high-performance
  1331. development platform that supports the QorIQ LS1028A
  1332. Layerscape Architecture processor.
  1333. config TARGET_LS1088ARDB
  1334. bool "Support ls1088ardb"
  1335. select ARCH_LS1088A
  1336. select ARM64
  1337. select ARMV8_MULTIENTRY
  1338. select ARCH_SUPPORT_TFABOOT
  1339. select BOARD_LATE_INIT
  1340. select SUPPORT_SPL
  1341. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1342. select GPIO_EXTRA_HEADER
  1343. help
  1344. Support for NXP LS1088ARDB platform.
  1345. The LS1088A Reference design board (RDB) is a high-performance
  1346. development platform that supports the QorIQ LS1088A
  1347. Layerscape Architecture processor.
  1348. config TARGET_LS1021AQDS
  1349. bool "Support ls1021aqds"
  1350. select ARCH_LS1021A
  1351. select ARCH_SUPPORT_PSCI
  1352. select BOARD_EARLY_INIT_F
  1353. select BOARD_LATE_INIT
  1354. select CPU_V7A
  1355. select CPU_V7_HAS_NONSEC
  1356. select CPU_V7_HAS_VIRT
  1357. select LS1_DEEP_SLEEP
  1358. select SUPPORT_SPL
  1359. select SYS_FSL_DDR
  1360. select FSL_DDR_INTERACTIVE
  1361. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1362. select GPIO_EXTRA_HEADER
  1363. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1364. imply SCSI
  1365. config TARGET_LS1021ATWR
  1366. bool "Support ls1021atwr"
  1367. select ARCH_LS1021A
  1368. select ARCH_SUPPORT_PSCI
  1369. select BOARD_EARLY_INIT_F
  1370. select BOARD_LATE_INIT
  1371. select CPU_V7A
  1372. select CPU_V7_HAS_NONSEC
  1373. select CPU_V7_HAS_VIRT
  1374. select LS1_DEEP_SLEEP
  1375. select SUPPORT_SPL
  1376. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1377. select GPIO_EXTRA_HEADER
  1378. imply SCSI
  1379. config TARGET_PG_WCOM_SELI8
  1380. bool "Support Hitachi-Powergrids SELI8 service unit card"
  1381. select ARCH_LS1021A
  1382. select ARCH_SUPPORT_PSCI
  1383. select BOARD_EARLY_INIT_F
  1384. select BOARD_LATE_INIT
  1385. select CPU_V7A
  1386. select CPU_V7_HAS_NONSEC
  1387. select CPU_V7_HAS_VIRT
  1388. select SYS_FSL_DDR
  1389. select FSL_DDR_INTERACTIVE
  1390. select GPIO_EXTRA_HEADER
  1391. select VENDOR_KM
  1392. imply SCSI
  1393. help
  1394. Support for Hitachi-Powergrids SELI8 service unit card.
  1395. SELI8 is a QorIQ LS1021a based service unit card used
  1396. in XMC20 and FOX615 product families.
  1397. config TARGET_PG_WCOM_EXPU1
  1398. bool "Support Hitachi-Powergrids EXPU1 service unit card"
  1399. select ARCH_LS1021A
  1400. select ARCH_SUPPORT_PSCI
  1401. select BOARD_EARLY_INIT_F
  1402. select BOARD_LATE_INIT
  1403. select CPU_V7A
  1404. select CPU_V7_HAS_NONSEC
  1405. select CPU_V7_HAS_VIRT
  1406. select SYS_FSL_DDR
  1407. select FSL_DDR_INTERACTIVE
  1408. select VENDOR_KM
  1409. imply SCSI
  1410. help
  1411. Support for Hitachi-Powergrids EXPU1 service unit card.
  1412. EXPU1 is a QorIQ LS1021a based service unit card used
  1413. in XMC20 and FOX615 product families.
  1414. config TARGET_LS1021ATSN
  1415. bool "Support ls1021atsn"
  1416. select ARCH_LS1021A
  1417. select ARCH_SUPPORT_PSCI
  1418. select BOARD_EARLY_INIT_F
  1419. select BOARD_LATE_INIT
  1420. select CPU_V7A
  1421. select CPU_V7_HAS_NONSEC
  1422. select CPU_V7_HAS_VIRT
  1423. select LS1_DEEP_SLEEP
  1424. select SUPPORT_SPL
  1425. select GPIO_EXTRA_HEADER
  1426. imply SCSI
  1427. config TARGET_LS1021AIOT
  1428. bool "Support ls1021aiot"
  1429. select ARCH_LS1021A
  1430. select ARCH_SUPPORT_PSCI
  1431. select BOARD_LATE_INIT
  1432. select CPU_V7A
  1433. select CPU_V7_HAS_NONSEC
  1434. select CPU_V7_HAS_VIRT
  1435. select SUPPORT_SPL
  1436. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1437. select GPIO_EXTRA_HEADER
  1438. imply SCSI
  1439. help
  1440. Support for Freescale LS1021AIOT platform.
  1441. The LS1021A Freescale board (IOT) is a high-performance
  1442. development platform that supports the QorIQ LS1021A
  1443. Layerscape Architecture processor.
  1444. config TARGET_LS1043AQDS
  1445. bool "Support ls1043aqds"
  1446. select ARCH_LS1043A
  1447. select ARM64
  1448. select ARMV8_MULTIENTRY
  1449. select ARCH_SUPPORT_TFABOOT
  1450. select BOARD_EARLY_INIT_F
  1451. select BOARD_LATE_INIT
  1452. select SUPPORT_SPL
  1453. select FSL_DDR_INTERACTIVE if !SPL
  1454. select FSL_DSPI if !SPL_NO_DSPI
  1455. select DM_SPI_FLASH if FSL_DSPI
  1456. select GPIO_EXTRA_HEADER
  1457. imply SCSI
  1458. imply SCSI_AHCI
  1459. help
  1460. Support for Freescale LS1043AQDS platform.
  1461. config TARGET_LS1043ARDB
  1462. bool "Support ls1043ardb"
  1463. select ARCH_LS1043A
  1464. select ARM64
  1465. select ARMV8_MULTIENTRY
  1466. select ARCH_SUPPORT_TFABOOT
  1467. select BOARD_EARLY_INIT_F
  1468. select BOARD_LATE_INIT
  1469. select SUPPORT_SPL
  1470. select FSL_DSPI if !SPL_NO_DSPI
  1471. select DM_SPI_FLASH if FSL_DSPI
  1472. select GPIO_EXTRA_HEADER
  1473. help
  1474. Support for Freescale LS1043ARDB platform.
  1475. config TARGET_LS1046AQDS
  1476. bool "Support ls1046aqds"
  1477. select ARCH_LS1046A
  1478. select ARM64
  1479. select ARMV8_MULTIENTRY
  1480. select ARCH_SUPPORT_TFABOOT
  1481. select BOARD_EARLY_INIT_F
  1482. select BOARD_LATE_INIT
  1483. select DM_SPI_FLASH if DM_SPI
  1484. select SUPPORT_SPL
  1485. select FSL_DDR_BIST if !SPL
  1486. select FSL_DDR_INTERACTIVE if !SPL
  1487. select FSL_DDR_INTERACTIVE if !SPL
  1488. select GPIO_EXTRA_HEADER
  1489. imply SCSI
  1490. help
  1491. Support for Freescale LS1046AQDS platform.
  1492. The LS1046A Development System (QDS) is a high-performance
  1493. development platform that supports the QorIQ LS1046A
  1494. Layerscape Architecture processor.
  1495. config TARGET_LS1046ARDB
  1496. bool "Support ls1046ardb"
  1497. select ARCH_LS1046A
  1498. select ARM64
  1499. select ARMV8_MULTIENTRY
  1500. select ARCH_SUPPORT_TFABOOT
  1501. select BOARD_EARLY_INIT_F
  1502. select BOARD_LATE_INIT
  1503. select DM_SPI_FLASH if DM_SPI
  1504. select POWER_MC34VR500
  1505. select SUPPORT_SPL
  1506. select FSL_DDR_BIST
  1507. select FSL_DDR_INTERACTIVE if !SPL
  1508. select GPIO_EXTRA_HEADER
  1509. imply SCSI
  1510. help
  1511. Support for Freescale LS1046ARDB platform.
  1512. The LS1046A Reference Design Board (RDB) is a high-performance
  1513. development platform that supports the QorIQ LS1046A
  1514. Layerscape Architecture processor.
  1515. config TARGET_LS1046AFRWY
  1516. bool "Support ls1046afrwy"
  1517. select ARCH_LS1046A
  1518. select ARM64
  1519. select ARMV8_MULTIENTRY
  1520. select ARCH_SUPPORT_TFABOOT
  1521. select BOARD_EARLY_INIT_F
  1522. select BOARD_LATE_INIT
  1523. select DM_SPI_FLASH if DM_SPI
  1524. select GPIO_EXTRA_HEADER
  1525. imply SCSI
  1526. help
  1527. Support for Freescale LS1046AFRWY platform.
  1528. The LS1046A Freeway Board (FRWY) is a high-performance
  1529. development platform that supports the QorIQ LS1046A
  1530. Layerscape Architecture processor.
  1531. config TARGET_SL28
  1532. bool "Support sl28"
  1533. select ARCH_LS1028A
  1534. select ARM64
  1535. select ARMV8_MULTIENTRY
  1536. select SUPPORT_SPL
  1537. select BINMAN
  1538. select DM
  1539. select DM_GPIO
  1540. select DM_I2C
  1541. select DM_MMC
  1542. select DM_SPI_FLASH
  1543. select DM_ETH
  1544. select DM_MDIO
  1545. select DM_PCI
  1546. select DM_RNG
  1547. select DM_RTC
  1548. select DM_SCSI
  1549. select DM_SERIAL
  1550. select DM_SPI
  1551. select DM_USB
  1552. select GPIO_EXTRA_HEADER
  1553. select SPL_DM if SPL
  1554. select SPL_DM_SPI if SPL
  1555. select SPL_DM_SPI_FLASH if SPL
  1556. select SPL_DM_I2C if SPL
  1557. select SPL_DM_MMC if SPL
  1558. select SPL_DM_SERIAL if SPL
  1559. help
  1560. Support for Kontron SMARC-sAL28 board.
  1561. config TARGET_COLIBRI_PXA270
  1562. bool "Support colibri_pxa270"
  1563. select CPU_PXA
  1564. select GPIO_EXTRA_HEADER
  1565. config ARCH_UNIPHIER
  1566. bool "Socionext UniPhier SoCs"
  1567. select BOARD_LATE_INIT
  1568. select DM
  1569. select DM_ETH
  1570. select DM_GPIO
  1571. select DM_I2C
  1572. select DM_MMC
  1573. select DM_MTD
  1574. select DM_RESET
  1575. select DM_SERIAL
  1576. select DM_USB
  1577. select OF_BOARD_SETUP
  1578. select OF_CONTROL
  1579. select OF_LIBFDT
  1580. select PINCTRL
  1581. select SPL_BOARD_INIT if SPL
  1582. select SPL_DM if SPL
  1583. select SPL_LIBCOMMON_SUPPORT if SPL
  1584. select SPL_LIBGENERIC_SUPPORT if SPL
  1585. select SPL_OF_CONTROL if SPL
  1586. select SPL_PINCTRL if SPL
  1587. select SUPPORT_SPL
  1588. imply CMD_DM
  1589. imply DISTRO_DEFAULTS
  1590. imply FAT_WRITE
  1591. help
  1592. Support for UniPhier SoC family developed by Socionext Inc.
  1593. (formerly, System LSI Business Division of Panasonic Corporation)
  1594. config ARCH_SYNQUACER
  1595. bool "Socionext SynQuacer SoCs"
  1596. select ARM64
  1597. select DM
  1598. select GIC_V3
  1599. select PSCI_RESET
  1600. select SYSRESET
  1601. select SYSRESET_PSCI
  1602. select OF_CONTROL
  1603. help
  1604. Support for SynQuacer SoC family developed by Socionext Inc.
  1605. This SoC is used on 96boards EE DeveloperBox.
  1606. config ARCH_STM32
  1607. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1608. select CPU_V7M
  1609. select DM
  1610. select DM_SERIAL
  1611. select GPIO_EXTRA_HEADER
  1612. imply CMD_DM
  1613. config ARCH_STI
  1614. bool "Support STMicrolectronics SoCs"
  1615. select BLK
  1616. select CPU_V7A
  1617. select DM
  1618. select DM_MMC
  1619. select DM_RESET
  1620. select DM_SERIAL
  1621. imply CMD_DM
  1622. help
  1623. Support for STMicroelectronics STiH407/10 SoC family.
  1624. This SoC is used on Linaro 96Board STiH410-B2260
  1625. config ARCH_STM32MP
  1626. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1627. select ARCH_MISC_INIT
  1628. select ARCH_SUPPORT_TFABOOT
  1629. select BOARD_LATE_INIT
  1630. select CLK
  1631. select DM
  1632. select DM_GPIO
  1633. select DM_RESET
  1634. select DM_SERIAL
  1635. select GPIO_EXTRA_HEADER
  1636. select MISC
  1637. select OF_CONTROL
  1638. select OF_LIBFDT
  1639. select OF_SYSTEM_SETUP
  1640. select PINCTRL
  1641. select REGMAP
  1642. select SUPPORT_SPL
  1643. select SYSCON
  1644. select SYSRESET
  1645. select SYS_THUMB_BUILD
  1646. imply SPL_SYSRESET
  1647. imply CMD_DM
  1648. imply CMD_POWEROFF
  1649. imply OF_LIBFDT_OVERLAY
  1650. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1651. imply USE_PREBOOT
  1652. help
  1653. Support for STM32MP SoC family developed by STMicroelectronics,
  1654. MPUs based on ARM cortex A core
  1655. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1656. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1657. chain.
  1658. SPL is the unsecure FSBL for the basic boot chain.
  1659. config ARCH_ROCKCHIP
  1660. bool "Support Rockchip SoCs"
  1661. select BLK
  1662. select BINMAN if SPL_OPTEE
  1663. select DM
  1664. select DM_GPIO
  1665. select DM_I2C
  1666. select DM_MMC
  1667. select DM_PWM
  1668. select DM_REGULATOR
  1669. select DM_SERIAL
  1670. select DM_SPI
  1671. select DM_SPI_FLASH
  1672. select DM_USB if USB
  1673. select ENABLE_ARM_SOC_BOOT0_HOOK
  1674. select OF_CONTROL
  1675. select SPI
  1676. select SPL_DM if SPL
  1677. select SPL_DM_SPI if SPL
  1678. select SPL_DM_SPI_FLASH if SPL
  1679. select SYS_MALLOC_F
  1680. select SYS_THUMB_BUILD if !ARM64
  1681. imply ADC
  1682. imply CMD_DM
  1683. imply DEBUG_UART_BOARD_INIT
  1684. imply DISTRO_DEFAULTS
  1685. imply FAT_WRITE
  1686. imply SARADC_ROCKCHIP
  1687. imply SPL_SYSRESET
  1688. imply SPL_SYS_MALLOC_SIMPLE
  1689. imply SYS_NS16550
  1690. imply TPL_SYSRESET
  1691. imply USB_FUNCTION_FASTBOOT
  1692. config ARCH_OCTEONTX
  1693. bool "Support OcteonTX SoCs"
  1694. select CLK
  1695. select DM
  1696. select GPIO_EXTRA_HEADER
  1697. select ARM64
  1698. select OF_CONTROL
  1699. select OF_LIVE
  1700. select BOARD_LATE_INIT
  1701. select SYS_CACHE_SHIFT_7
  1702. config ARCH_OCTEONTX2
  1703. bool "Support OcteonTX2 SoCs"
  1704. select CLK
  1705. select DM
  1706. select GPIO_EXTRA_HEADER
  1707. select ARM64
  1708. select OF_CONTROL
  1709. select OF_LIVE
  1710. select BOARD_LATE_INIT
  1711. select SYS_CACHE_SHIFT_7
  1712. config TARGET_THUNDERX_88XX
  1713. bool "Support ThunderX 88xx"
  1714. select ARM64
  1715. select GPIO_EXTRA_HEADER
  1716. select OF_CONTROL
  1717. select PL01X_SERIAL
  1718. select SYS_CACHE_SHIFT_7
  1719. config ARCH_ASPEED
  1720. bool "Support Aspeed SoCs"
  1721. select DM
  1722. select OF_CONTROL
  1723. imply CMD_DM
  1724. config TARGET_DURIAN
  1725. bool "Support Phytium Durian Platform"
  1726. select ARM64
  1727. select GPIO_EXTRA_HEADER
  1728. help
  1729. Support for durian platform.
  1730. It has 2GB Sdram, uart and pcie.
  1731. config TARGET_PRESIDIO_ASIC
  1732. bool "Support Cortina Presidio ASIC Platform"
  1733. select ARM64
  1734. config TARGET_XENGUEST_ARM64
  1735. bool "Xen guest ARM64"
  1736. select ARM64
  1737. select XEN
  1738. select OF_CONTROL
  1739. select LINUX_KERNEL_IMAGE_HEADER
  1740. select XEN_SERIAL
  1741. select SSCANF
  1742. endchoice
  1743. config ARCH_SUPPORT_TFABOOT
  1744. bool
  1745. config TFABOOT
  1746. bool "Support for booting from TF-A"
  1747. depends on ARCH_SUPPORT_TFABOOT
  1748. default n
  1749. help
  1750. Some platforms support the setup of secure registers (for instance
  1751. for CPU errata handling) or provide secure services like PSCI.
  1752. Those services could also be provided by other firmware parts
  1753. like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
  1754. does not need to (and cannot) execute this code.
  1755. Enabling this option will make a U-Boot binary that is relying
  1756. on other firmware layers to provide secure functionality.
  1757. config TI_SECURE_DEVICE
  1758. bool "HS Device Type Support"
  1759. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1760. help
  1761. If a high secure (HS) device type is being used, this config
  1762. must be set. This option impacts various aspects of the
  1763. build system (to create signed boot images that can be
  1764. authenticated) and the code. See the doc/README.ti-secure
  1765. file for further details.
  1766. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1767. config ISW_ENTRY_ADDR
  1768. hex "Address in memory or XIP address of bootloader entry point"
  1769. default 0x402F4000 if AM43XX
  1770. default 0x402F0400 if AM33XX
  1771. default 0x40301350 if OMAP54XX
  1772. help
  1773. After any reset, the boot ROM searches the boot media for a valid
  1774. boot image. For non-XIP devices, the ROM then copies the image into
  1775. internal memory. For all boot modes, after the ROM processes the
  1776. boot image it eventually computes the entry point address depending
  1777. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1778. image headers.
  1779. endif
  1780. source "arch/arm/mach-aspeed/Kconfig"
  1781. source "arch/arm/mach-at91/Kconfig"
  1782. source "arch/arm/mach-bcm283x/Kconfig"
  1783. source "arch/arm/mach-bcmstb/Kconfig"
  1784. source "arch/arm/mach-davinci/Kconfig"
  1785. source "arch/arm/mach-exynos/Kconfig"
  1786. source "arch/arm/mach-highbank/Kconfig"
  1787. source "arch/arm/mach-integrator/Kconfig"
  1788. source "arch/arm/mach-ipq40xx/Kconfig"
  1789. source "arch/arm/mach-k3/Kconfig"
  1790. source "arch/arm/mach-keystone/Kconfig"
  1791. source "arch/arm/mach-kirkwood/Kconfig"
  1792. source "arch/arm/mach-lpc32xx/Kconfig"
  1793. source "arch/arm/mach-mvebu/Kconfig"
  1794. source "arch/arm/mach-octeontx/Kconfig"
  1795. source "arch/arm/mach-octeontx2/Kconfig"
  1796. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1797. source "arch/arm/mach-imx/mx2/Kconfig"
  1798. source "arch/arm/mach-imx/mx3/Kconfig"
  1799. source "arch/arm/mach-imx/mx5/Kconfig"
  1800. source "arch/arm/mach-imx/mx6/Kconfig"
  1801. source "arch/arm/mach-imx/mx7/Kconfig"
  1802. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1803. source "arch/arm/mach-imx/imx8/Kconfig"
  1804. source "arch/arm/mach-imx/imx8m/Kconfig"
  1805. source "arch/arm/mach-imx/imxrt/Kconfig"
  1806. source "arch/arm/mach-imx/mxs/Kconfig"
  1807. source "arch/arm/mach-omap2/Kconfig"
  1808. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1809. source "arch/arm/mach-orion5x/Kconfig"
  1810. source "arch/arm/mach-owl/Kconfig"
  1811. source "arch/arm/mach-rmobile/Kconfig"
  1812. source "arch/arm/mach-meson/Kconfig"
  1813. source "arch/arm/mach-mediatek/Kconfig"
  1814. source "arch/arm/mach-qemu/Kconfig"
  1815. source "arch/arm/mach-rockchip/Kconfig"
  1816. source "arch/arm/mach-s5pc1xx/Kconfig"
  1817. source "arch/arm/mach-snapdragon/Kconfig"
  1818. source "arch/arm/mach-socfpga/Kconfig"
  1819. source "arch/arm/mach-sti/Kconfig"
  1820. source "arch/arm/mach-stm32/Kconfig"
  1821. source "arch/arm/mach-stm32mp/Kconfig"
  1822. source "arch/arm/mach-sunxi/Kconfig"
  1823. source "arch/arm/mach-tegra/Kconfig"
  1824. source "arch/arm/mach-u8500/Kconfig"
  1825. source "arch/arm/mach-uniphier/Kconfig"
  1826. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1827. source "arch/arm/mach-zynq/Kconfig"
  1828. source "arch/arm/mach-zynqmp/Kconfig"
  1829. source "arch/arm/mach-versal/Kconfig"
  1830. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1831. source "arch/arm/cpu/armv7/Kconfig"
  1832. source "arch/arm/cpu/armv8/Kconfig"
  1833. source "arch/arm/mach-imx/Kconfig"
  1834. source "arch/arm/mach-nexell/Kconfig"
  1835. source "board/armltd/total_compute/Kconfig"
  1836. source "board/bosch/shc/Kconfig"
  1837. source "board/bosch/guardian/Kconfig"
  1838. source "board/CarMediaLab/flea3/Kconfig"
  1839. source "board/Marvell/aspenite/Kconfig"
  1840. source "board/Marvell/gplugd/Kconfig"
  1841. source "board/Marvell/octeontx/Kconfig"
  1842. source "board/Marvell/octeontx2/Kconfig"
  1843. source "board/armltd/vexpress64/Kconfig"
  1844. source "board/cortina/presidio-asic/Kconfig"
  1845. source "board/broadcom/bcm963158/Kconfig"
  1846. source "board/broadcom/bcm968360bg/Kconfig"
  1847. source "board/broadcom/bcm968580xref/Kconfig"
  1848. source "board/broadcom/bcmns3/Kconfig"
  1849. source "board/cavium/thunderx/Kconfig"
  1850. source "board/cirrus/edb93xx/Kconfig"
  1851. source "board/eets/pdu001/Kconfig"
  1852. source "board/emulation/qemu-arm/Kconfig"
  1853. source "board/freescale/ls2080aqds/Kconfig"
  1854. source "board/freescale/ls2080ardb/Kconfig"
  1855. source "board/freescale/ls1088a/Kconfig"
  1856. source "board/freescale/ls1028a/Kconfig"
  1857. source "board/freescale/ls1021aqds/Kconfig"
  1858. source "board/freescale/ls1043aqds/Kconfig"
  1859. source "board/freescale/ls1021atwr/Kconfig"
  1860. source "board/freescale/ls1021atsn/Kconfig"
  1861. source "board/freescale/ls1021aiot/Kconfig"
  1862. source "board/freescale/ls1046aqds/Kconfig"
  1863. source "board/freescale/ls1043ardb/Kconfig"
  1864. source "board/freescale/ls1046ardb/Kconfig"
  1865. source "board/freescale/ls1046afrwy/Kconfig"
  1866. source "board/freescale/ls1012aqds/Kconfig"
  1867. source "board/freescale/ls1012ardb/Kconfig"
  1868. source "board/freescale/ls1012afrdm/Kconfig"
  1869. source "board/freescale/lx2160a/Kconfig"
  1870. source "board/grinn/chiliboard/Kconfig"
  1871. source "board/hisilicon/hikey/Kconfig"
  1872. source "board/hisilicon/hikey960/Kconfig"
  1873. source "board/hisilicon/poplar/Kconfig"
  1874. source "board/isee/igep003x/Kconfig"
  1875. source "board/kontron/sl28/Kconfig"
  1876. source "board/myir/mys_6ulx/Kconfig"
  1877. source "board/seeed/npi_imx6ull/Kconfig"
  1878. source "board/socionext/developerbox/Kconfig"
  1879. source "board/spear/spear300/Kconfig"
  1880. source "board/spear/spear310/Kconfig"
  1881. source "board/spear/spear320/Kconfig"
  1882. source "board/spear/spear600/Kconfig"
  1883. source "board/spear/x600/Kconfig"
  1884. source "board/st/stv0991/Kconfig"
  1885. source "board/tcl/sl50/Kconfig"
  1886. source "board/toradex/colibri_pxa270/Kconfig"
  1887. source "board/variscite/dart_6ul/Kconfig"
  1888. source "board/vscom/baltos/Kconfig"
  1889. source "board/phytium/durian/Kconfig"
  1890. source "board/xen/xenguest_arm64/Kconfig"
  1891. source "board/keymile/Kconfig"
  1892. source "arch/arm/Kconfig.debug"
  1893. endmenu
  1894. config SPL_LDSCRIPT
  1895. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1896. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1897. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64