cfi_flash.c 53 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. /*
  41. * This file implements a Common Flash Interface (CFI) driver for
  42. * U-Boot.
  43. *
  44. * The width of the port and the width of the chips are determined at
  45. * initialization. These widths are used to calculate the address for
  46. * access CFI data structures.
  47. *
  48. * References
  49. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  50. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  51. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  52. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  53. * AMD CFI Specification, Release 2.0 December 1, 2001
  54. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  55. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  56. *
  57. * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  58. * reading and writing ... (yes there is such a Hardware).
  59. */
  60. #ifndef CFG_FLASH_BANKS_LIST
  61. #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  62. #endif
  63. #define FLASH_CMD_CFI 0x98
  64. #define FLASH_CMD_READ_ID 0x90
  65. #define FLASH_CMD_RESET 0xff
  66. #define FLASH_CMD_BLOCK_ERASE 0x20
  67. #define FLASH_CMD_ERASE_CONFIRM 0xD0
  68. #define FLASH_CMD_WRITE 0x40
  69. #define FLASH_CMD_PROTECT 0x60
  70. #define FLASH_CMD_PROTECT_SET 0x01
  71. #define FLASH_CMD_PROTECT_CLEAR 0xD0
  72. #define FLASH_CMD_CLEAR_STATUS 0x50
  73. #define FLASH_CMD_READ_STATUS 0x70
  74. #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
  75. #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
  76. #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
  77. #define FLASH_STATUS_DONE 0x80
  78. #define FLASH_STATUS_ESS 0x40
  79. #define FLASH_STATUS_ECLBS 0x20
  80. #define FLASH_STATUS_PSLBS 0x10
  81. #define FLASH_STATUS_VPENS 0x08
  82. #define FLASH_STATUS_PSS 0x04
  83. #define FLASH_STATUS_DPS 0x02
  84. #define FLASH_STATUS_R 0x01
  85. #define FLASH_STATUS_PROTECT 0x01
  86. #define AMD_CMD_RESET 0xF0
  87. #define AMD_CMD_WRITE 0xA0
  88. #define AMD_CMD_ERASE_START 0x80
  89. #define AMD_CMD_ERASE_SECTOR 0x30
  90. #define AMD_CMD_UNLOCK_START 0xAA
  91. #define AMD_CMD_UNLOCK_ACK 0x55
  92. #define AMD_CMD_WRITE_TO_BUFFER 0x25
  93. #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
  94. #define AMD_STATUS_TOGGLE 0x40
  95. #define AMD_STATUS_ERROR 0x20
  96. #define ATM_CMD_UNLOCK_SECT 0x70
  97. #define ATM_CMD_SOFTLOCK_START 0x80
  98. #define ATM_CMD_LOCK_SECT 0x40
  99. #define FLASH_OFFSET_MANUFACTURER_ID 0x00
  100. #define FLASH_OFFSET_DEVICE_ID 0x01
  101. #define FLASH_OFFSET_DEVICE_ID2 0x0E
  102. #define FLASH_OFFSET_DEVICE_ID3 0x0F
  103. #define FLASH_OFFSET_CFI 0x55
  104. #define FLASH_OFFSET_CFI_ALT 0x555
  105. #define FLASH_OFFSET_CFI_RESP 0x10
  106. #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
  107. /* extended query table primary address */
  108. #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
  109. #define FLASH_OFFSET_WTOUT 0x1F
  110. #define FLASH_OFFSET_WBTOUT 0x20
  111. #define FLASH_OFFSET_ETOUT 0x21
  112. #define FLASH_OFFSET_CETOUT 0x22
  113. #define FLASH_OFFSET_WMAX_TOUT 0x23
  114. #define FLASH_OFFSET_WBMAX_TOUT 0x24
  115. #define FLASH_OFFSET_EMAX_TOUT 0x25
  116. #define FLASH_OFFSET_CEMAX_TOUT 0x26
  117. #define FLASH_OFFSET_SIZE 0x27
  118. #define FLASH_OFFSET_INTERFACE 0x28
  119. #define FLASH_OFFSET_BUFFER_SIZE 0x2A
  120. #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
  121. #define FLASH_OFFSET_ERASE_REGIONS 0x2D
  122. #define FLASH_OFFSET_PROTECT 0x02
  123. #define FLASH_OFFSET_USER_PROTECTION 0x85
  124. #define FLASH_OFFSET_INTEL_PROTECTION 0x81
  125. #define CFI_CMDSET_NONE 0
  126. #define CFI_CMDSET_INTEL_EXTENDED 1
  127. #define CFI_CMDSET_AMD_STANDARD 2
  128. #define CFI_CMDSET_INTEL_STANDARD 3
  129. #define CFI_CMDSET_AMD_EXTENDED 4
  130. #define CFI_CMDSET_MITSU_STANDARD 256
  131. #define CFI_CMDSET_MITSU_EXTENDED 257
  132. #define CFI_CMDSET_SST 258
  133. #define CFI_CMDSET_INTEL_PROG_REGIONS 512
  134. #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
  135. # undef FLASH_CMD_RESET
  136. # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
  137. #endif
  138. typedef union {
  139. unsigned char c;
  140. unsigned short w;
  141. unsigned long l;
  142. unsigned long long ll;
  143. } cfiword_t;
  144. #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
  145. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  146. /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
  147. #ifdef CFG_MAX_FLASH_BANKS_DETECT
  148. # define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS_DETECT
  149. #else
  150. # define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS
  151. #endif
  152. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  153. /*
  154. * Check if chip width is defined. If not, start detecting with 8bit.
  155. */
  156. #ifndef CFG_FLASH_CFI_WIDTH
  157. #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  158. #endif
  159. typedef unsigned long flash_sect_t;
  160. /* CFI standard query structure */
  161. struct cfi_qry {
  162. u8 qry[3];
  163. u16 p_id;
  164. u16 p_adr;
  165. u16 a_id;
  166. u16 a_adr;
  167. u8 vcc_min;
  168. u8 vcc_max;
  169. u8 vpp_min;
  170. u8 vpp_max;
  171. u8 word_write_timeout_typ;
  172. u8 buf_write_timeout_typ;
  173. u8 block_erase_timeout_typ;
  174. u8 chip_erase_timeout_typ;
  175. u8 word_write_timeout_max;
  176. u8 buf_write_timeout_max;
  177. u8 block_erase_timeout_max;
  178. u8 chip_erase_timeout_max;
  179. u8 dev_size;
  180. u16 interface_desc;
  181. u16 max_buf_write_size;
  182. u8 num_erase_regions;
  183. u32 erase_region_info[NUM_ERASE_REGIONS];
  184. } __attribute__((packed));
  185. struct cfi_pri_hdr {
  186. u8 pri[3];
  187. u8 major_version;
  188. u8 minor_version;
  189. } __attribute__((packed));
  190. static void flash_write8(u8 value, void *addr)
  191. {
  192. __raw_writeb(value, addr);
  193. }
  194. static void flash_write16(u16 value, void *addr)
  195. {
  196. __raw_writew(value, addr);
  197. }
  198. static void flash_write32(u32 value, void *addr)
  199. {
  200. __raw_writel(value, addr);
  201. }
  202. static void flash_write64(u64 value, void *addr)
  203. {
  204. /* No architectures currently implement __raw_writeq() */
  205. *(volatile u64 *)addr = value;
  206. }
  207. static u8 flash_read8(void *addr)
  208. {
  209. return __raw_readb(addr);
  210. }
  211. static u16 flash_read16(void *addr)
  212. {
  213. return __raw_readw(addr);
  214. }
  215. static u32 flash_read32(void *addr)
  216. {
  217. return __raw_readl(addr);
  218. }
  219. static u64 __flash_read64(void *addr)
  220. {
  221. /* No architectures currently implement __raw_readq() */
  222. return *(volatile u64 *)addr;
  223. }
  224. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  225. /*-----------------------------------------------------------------------
  226. */
  227. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
  228. static flash_info_t *flash_get_info(ulong base)
  229. {
  230. int i;
  231. flash_info_t * info = 0;
  232. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  233. info = & flash_info[i];
  234. if (info->size && info->start[0] <= base &&
  235. base <= info->start[0] + info->size - 1)
  236. break;
  237. }
  238. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  239. }
  240. #endif
  241. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  242. {
  243. if (sect != (info->sector_count - 1))
  244. return info->start[sect + 1] - info->start[sect];
  245. else
  246. return info->start[0] + info->size - info->start[sect];
  247. }
  248. /*-----------------------------------------------------------------------
  249. * create an address based on the offset and the port width
  250. */
  251. static inline void *
  252. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  253. {
  254. unsigned int byte_offset = offset * info->portwidth;
  255. return map_physmem(info->start[sect] + byte_offset,
  256. flash_sector_size(info, sect) - byte_offset,
  257. MAP_NOCACHE);
  258. }
  259. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  260. unsigned int offset, void *addr)
  261. {
  262. unsigned int byte_offset = offset * info->portwidth;
  263. unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
  264. }
  265. /*-----------------------------------------------------------------------
  266. * make a proper sized command based on the port and chip widths
  267. */
  268. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  269. {
  270. int i;
  271. int cword_offset;
  272. int cp_offset;
  273. #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
  274. u32 cmd_le = cpu_to_le32(cmd);
  275. #endif
  276. uchar val;
  277. uchar *cp = (uchar *) cmdbuf;
  278. for (i = info->portwidth; i > 0; i--){
  279. cword_offset = (info->portwidth-i)%info->chipwidth;
  280. #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
  281. cp_offset = info->portwidth - i;
  282. val = *((uchar*)&cmd_le + cword_offset);
  283. #else
  284. cp_offset = i - 1;
  285. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  286. #endif
  287. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  288. }
  289. }
  290. #ifdef DEBUG
  291. /*-----------------------------------------------------------------------
  292. * Debug support
  293. */
  294. static void print_longlong (char *str, unsigned long long data)
  295. {
  296. int i;
  297. char *cp;
  298. cp = (unsigned char *) &data;
  299. for (i = 0; i < 8; i++)
  300. sprintf (&str[i * 2], "%2.2x", *cp++);
  301. }
  302. static void flash_printqry (struct cfi_qry *qry)
  303. {
  304. u8 *p = (u8 *)qry;
  305. int x, y;
  306. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  307. debug("%02x : ", x);
  308. for (y = 0; y < 16; y++)
  309. debug("%2.2x ", p[x + y]);
  310. debug(" ");
  311. for (y = 0; y < 16; y++) {
  312. unsigned char c = p[x + y];
  313. if (c >= 0x20 && c <= 0x7e)
  314. debug("%c", c);
  315. else
  316. debug(".");
  317. }
  318. debug("\n");
  319. }
  320. }
  321. #endif
  322. /*-----------------------------------------------------------------------
  323. * read a character at a port width address
  324. */
  325. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  326. {
  327. uchar *cp;
  328. uchar retval;
  329. cp = flash_map (info, 0, offset);
  330. #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
  331. retval = flash_read8(cp);
  332. #else
  333. retval = flash_read8(cp + info->portwidth - 1);
  334. #endif
  335. flash_unmap (info, 0, offset, cp);
  336. return retval;
  337. }
  338. /*-----------------------------------------------------------------------
  339. * read a word at a port width address, assume 16bit bus
  340. */
  341. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  342. {
  343. ushort *addr, retval;
  344. addr = flash_map (info, 0, offset);
  345. retval = flash_read16 (addr);
  346. flash_unmap (info, 0, offset, addr);
  347. return retval;
  348. }
  349. /*-----------------------------------------------------------------------
  350. * read a long word by picking the least significant byte of each maximum
  351. * port size word. Swap for ppc format.
  352. */
  353. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  354. uint offset)
  355. {
  356. uchar *addr;
  357. ulong retval;
  358. #ifdef DEBUG
  359. int x;
  360. #endif
  361. addr = flash_map (info, sect, offset);
  362. #ifdef DEBUG
  363. debug ("long addr is at %p info->portwidth = %d\n", addr,
  364. info->portwidth);
  365. for (x = 0; x < 4 * info->portwidth; x++) {
  366. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  367. }
  368. #endif
  369. #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
  370. retval = ((flash_read8(addr) << 16) |
  371. (flash_read8(addr + info->portwidth) << 24) |
  372. (flash_read8(addr + 2 * info->portwidth)) |
  373. (flash_read8(addr + 3 * info->portwidth) << 8));
  374. #else
  375. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  376. (flash_read8(addr + info->portwidth - 1) << 16) |
  377. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  378. (flash_read8(addr + 3 * info->portwidth - 1)));
  379. #endif
  380. flash_unmap(info, sect, offset, addr);
  381. return retval;
  382. }
  383. /*
  384. * Write a proper sized command to the correct address
  385. */
  386. static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  387. uint offset, u32 cmd)
  388. {
  389. void *addr;
  390. cfiword_t cword;
  391. addr = flash_map (info, sect, offset);
  392. flash_make_cmd (info, cmd, &cword);
  393. switch (info->portwidth) {
  394. case FLASH_CFI_8BIT:
  395. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  396. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  397. flash_write8(cword.c, addr);
  398. break;
  399. case FLASH_CFI_16BIT:
  400. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  401. cmd, cword.w,
  402. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  403. flash_write16(cword.w, addr);
  404. break;
  405. case FLASH_CFI_32BIT:
  406. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  407. cmd, cword.l,
  408. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  409. flash_write32(cword.l, addr);
  410. break;
  411. case FLASH_CFI_64BIT:
  412. #ifdef DEBUG
  413. {
  414. char str[20];
  415. print_longlong (str, cword.ll);
  416. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  417. addr, cmd, str,
  418. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  419. }
  420. #endif
  421. flash_write64(cword.ll, addr);
  422. break;
  423. }
  424. /* Ensure all the instructions are fully finished */
  425. sync();
  426. flash_unmap(info, sect, offset, addr);
  427. }
  428. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  429. {
  430. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  431. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  432. }
  433. /*-----------------------------------------------------------------------
  434. */
  435. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  436. uint offset, uchar cmd)
  437. {
  438. void *addr;
  439. cfiword_t cword;
  440. int retval;
  441. addr = flash_map (info, sect, offset);
  442. flash_make_cmd (info, cmd, &cword);
  443. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  444. switch (info->portwidth) {
  445. case FLASH_CFI_8BIT:
  446. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  447. retval = (flash_read8(addr) == cword.c);
  448. break;
  449. case FLASH_CFI_16BIT:
  450. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  451. retval = (flash_read16(addr) == cword.w);
  452. break;
  453. case FLASH_CFI_32BIT:
  454. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  455. retval = (flash_read32(addr) == cword.l);
  456. break;
  457. case FLASH_CFI_64BIT:
  458. #ifdef DEBUG
  459. {
  460. char str1[20];
  461. char str2[20];
  462. print_longlong (str1, flash_read64(addr));
  463. print_longlong (str2, cword.ll);
  464. debug ("is= %s %s\n", str1, str2);
  465. }
  466. #endif
  467. retval = (flash_read64(addr) == cword.ll);
  468. break;
  469. default:
  470. retval = 0;
  471. break;
  472. }
  473. flash_unmap(info, sect, offset, addr);
  474. return retval;
  475. }
  476. /*-----------------------------------------------------------------------
  477. */
  478. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  479. uint offset, uchar cmd)
  480. {
  481. void *addr;
  482. cfiword_t cword;
  483. int retval;
  484. addr = flash_map (info, sect, offset);
  485. flash_make_cmd (info, cmd, &cword);
  486. switch (info->portwidth) {
  487. case FLASH_CFI_8BIT:
  488. retval = ((flash_read8(addr) & cword.c) == cword.c);
  489. break;
  490. case FLASH_CFI_16BIT:
  491. retval = ((flash_read16(addr) & cword.w) == cword.w);
  492. break;
  493. case FLASH_CFI_32BIT:
  494. retval = ((flash_read32(addr) & cword.l) == cword.l);
  495. break;
  496. case FLASH_CFI_64BIT:
  497. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  498. break;
  499. default:
  500. retval = 0;
  501. break;
  502. }
  503. flash_unmap(info, sect, offset, addr);
  504. return retval;
  505. }
  506. /*-----------------------------------------------------------------------
  507. */
  508. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  509. uint offset, uchar cmd)
  510. {
  511. void *addr;
  512. cfiword_t cword;
  513. int retval;
  514. addr = flash_map (info, sect, offset);
  515. flash_make_cmd (info, cmd, &cword);
  516. switch (info->portwidth) {
  517. case FLASH_CFI_8BIT:
  518. retval = flash_read8(addr) != flash_read8(addr);
  519. break;
  520. case FLASH_CFI_16BIT:
  521. retval = flash_read16(addr) != flash_read16(addr);
  522. break;
  523. case FLASH_CFI_32BIT:
  524. retval = flash_read32(addr) != flash_read32(addr);
  525. break;
  526. case FLASH_CFI_64BIT:
  527. retval = flash_read64(addr) != flash_read64(addr);
  528. break;
  529. default:
  530. retval = 0;
  531. break;
  532. }
  533. flash_unmap(info, sect, offset, addr);
  534. return retval;
  535. }
  536. /*
  537. * flash_is_busy - check to see if the flash is busy
  538. *
  539. * This routine checks the status of the chip and returns true if the
  540. * chip is busy.
  541. */
  542. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  543. {
  544. int retval;
  545. switch (info->vendor) {
  546. case CFI_CMDSET_INTEL_PROG_REGIONS:
  547. case CFI_CMDSET_INTEL_STANDARD:
  548. case CFI_CMDSET_INTEL_EXTENDED:
  549. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  550. break;
  551. case CFI_CMDSET_AMD_STANDARD:
  552. case CFI_CMDSET_AMD_EXTENDED:
  553. #ifdef CONFIG_FLASH_CFI_LEGACY
  554. case CFI_CMDSET_AMD_LEGACY:
  555. #endif
  556. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  557. break;
  558. default:
  559. retval = 0;
  560. }
  561. debug ("flash_is_busy: %d\n", retval);
  562. return retval;
  563. }
  564. /*-----------------------------------------------------------------------
  565. * wait for XSR.7 to be set. Time out with an error if it does not.
  566. * This routine does not set the flash to read-array mode.
  567. */
  568. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  569. ulong tout, char *prompt)
  570. {
  571. ulong start;
  572. #if CFG_HZ != 1000
  573. tout *= CFG_HZ/1000;
  574. #endif
  575. /* Wait for command completion */
  576. start = get_timer (0);
  577. while (flash_is_busy (info, sector)) {
  578. if (get_timer (start) > tout) {
  579. printf ("Flash %s timeout at address %lx data %lx\n",
  580. prompt, info->start[sector],
  581. flash_read_long (info, sector, 0));
  582. flash_write_cmd (info, sector, 0, info->cmd_reset);
  583. return ERR_TIMOUT;
  584. }
  585. udelay (1); /* also triggers watchdog */
  586. }
  587. return ERR_OK;
  588. }
  589. /*-----------------------------------------------------------------------
  590. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  591. * do a full status check.
  592. *
  593. * This routine sets the flash to read-array mode.
  594. */
  595. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  596. ulong tout, char *prompt)
  597. {
  598. int retcode;
  599. retcode = flash_status_check (info, sector, tout, prompt);
  600. switch (info->vendor) {
  601. case CFI_CMDSET_INTEL_PROG_REGIONS:
  602. case CFI_CMDSET_INTEL_EXTENDED:
  603. case CFI_CMDSET_INTEL_STANDARD:
  604. if ((retcode == ERR_OK)
  605. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  606. retcode = ERR_INVAL;
  607. printf ("Flash %s error at address %lx\n", prompt,
  608. info->start[sector]);
  609. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  610. FLASH_STATUS_PSLBS)) {
  611. puts ("Command Sequence Error.\n");
  612. } else if (flash_isset (info, sector, 0,
  613. FLASH_STATUS_ECLBS)) {
  614. puts ("Block Erase Error.\n");
  615. retcode = ERR_NOT_ERASED;
  616. } else if (flash_isset (info, sector, 0,
  617. FLASH_STATUS_PSLBS)) {
  618. puts ("Locking Error\n");
  619. }
  620. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  621. puts ("Block locked.\n");
  622. retcode = ERR_PROTECTED;
  623. }
  624. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  625. puts ("Vpp Low Error.\n");
  626. }
  627. flash_write_cmd (info, sector, 0, info->cmd_reset);
  628. break;
  629. default:
  630. break;
  631. }
  632. return retcode;
  633. }
  634. /*-----------------------------------------------------------------------
  635. */
  636. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  637. {
  638. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  639. unsigned short w;
  640. unsigned int l;
  641. unsigned long long ll;
  642. #endif
  643. switch (info->portwidth) {
  644. case FLASH_CFI_8BIT:
  645. cword->c = c;
  646. break;
  647. case FLASH_CFI_16BIT:
  648. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  649. w = c;
  650. w <<= 8;
  651. cword->w = (cword->w >> 8) | w;
  652. #else
  653. cword->w = (cword->w << 8) | c;
  654. #endif
  655. break;
  656. case FLASH_CFI_32BIT:
  657. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  658. l = c;
  659. l <<= 24;
  660. cword->l = (cword->l >> 8) | l;
  661. #else
  662. cword->l = (cword->l << 8) | c;
  663. #endif
  664. break;
  665. case FLASH_CFI_64BIT:
  666. #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
  667. ll = c;
  668. ll <<= 56;
  669. cword->ll = (cword->ll >> 8) | ll;
  670. #else
  671. cword->ll = (cword->ll << 8) | c;
  672. #endif
  673. break;
  674. }
  675. }
  676. /* loop through the sectors from the highest address when the passed
  677. * address is greater or equal to the sector address we have a match
  678. */
  679. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  680. {
  681. flash_sect_t sector;
  682. for (sector = info->sector_count - 1; sector >= 0; sector--) {
  683. if (addr >= info->start[sector])
  684. break;
  685. }
  686. return sector;
  687. }
  688. /*-----------------------------------------------------------------------
  689. */
  690. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  691. cfiword_t cword)
  692. {
  693. void *dstaddr;
  694. int flag;
  695. dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
  696. /* Check if Flash is (sufficiently) erased */
  697. switch (info->portwidth) {
  698. case FLASH_CFI_8BIT:
  699. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  700. break;
  701. case FLASH_CFI_16BIT:
  702. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  703. break;
  704. case FLASH_CFI_32BIT:
  705. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  706. break;
  707. case FLASH_CFI_64BIT:
  708. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  709. break;
  710. default:
  711. flag = 0;
  712. break;
  713. }
  714. if (!flag) {
  715. unmap_physmem(dstaddr, info->portwidth);
  716. return ERR_NOT_ERASED;
  717. }
  718. /* Disable interrupts which might cause a timeout here */
  719. flag = disable_interrupts ();
  720. switch (info->vendor) {
  721. case CFI_CMDSET_INTEL_PROG_REGIONS:
  722. case CFI_CMDSET_INTEL_EXTENDED:
  723. case CFI_CMDSET_INTEL_STANDARD:
  724. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  725. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  726. break;
  727. case CFI_CMDSET_AMD_EXTENDED:
  728. case CFI_CMDSET_AMD_STANDARD:
  729. #ifdef CONFIG_FLASH_CFI_LEGACY
  730. case CFI_CMDSET_AMD_LEGACY:
  731. #endif
  732. flash_unlock_seq (info, 0);
  733. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  734. break;
  735. }
  736. switch (info->portwidth) {
  737. case FLASH_CFI_8BIT:
  738. flash_write8(cword.c, dstaddr);
  739. break;
  740. case FLASH_CFI_16BIT:
  741. flash_write16(cword.w, dstaddr);
  742. break;
  743. case FLASH_CFI_32BIT:
  744. flash_write32(cword.l, dstaddr);
  745. break;
  746. case FLASH_CFI_64BIT:
  747. flash_write64(cword.ll, dstaddr);
  748. break;
  749. }
  750. /* re-enable interrupts if necessary */
  751. if (flag)
  752. enable_interrupts ();
  753. unmap_physmem(dstaddr, info->portwidth);
  754. return flash_full_status_check (info, find_sector (info, dest),
  755. info->write_tout, "write");
  756. }
  757. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  758. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  759. int len)
  760. {
  761. flash_sect_t sector;
  762. int cnt;
  763. int retcode;
  764. void *src = cp;
  765. void *dst = map_physmem(dest, len, MAP_NOCACHE);
  766. void *dst2 = dst;
  767. int flag = 0;
  768. uint offset = 0;
  769. unsigned int shift;
  770. uchar write_cmd;
  771. switch (info->portwidth) {
  772. case FLASH_CFI_8BIT:
  773. shift = 0;
  774. break;
  775. case FLASH_CFI_16BIT:
  776. shift = 1;
  777. break;
  778. case FLASH_CFI_32BIT:
  779. shift = 2;
  780. break;
  781. case FLASH_CFI_64BIT:
  782. shift = 3;
  783. break;
  784. default:
  785. retcode = ERR_INVAL;
  786. goto out_unmap;
  787. }
  788. cnt = len >> shift;
  789. while ((cnt-- > 0) && (flag == 0)) {
  790. switch (info->portwidth) {
  791. case FLASH_CFI_8BIT:
  792. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  793. flash_read8(src));
  794. src += 1, dst2 += 1;
  795. break;
  796. case FLASH_CFI_16BIT:
  797. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  798. flash_read16(src));
  799. src += 2, dst2 += 2;
  800. break;
  801. case FLASH_CFI_32BIT:
  802. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  803. flash_read32(src));
  804. src += 4, dst2 += 4;
  805. break;
  806. case FLASH_CFI_64BIT:
  807. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  808. flash_read64(src));
  809. src += 8, dst2 += 8;
  810. break;
  811. }
  812. }
  813. if (!flag) {
  814. retcode = ERR_NOT_ERASED;
  815. goto out_unmap;
  816. }
  817. src = cp;
  818. sector = find_sector (info, dest);
  819. switch (info->vendor) {
  820. case CFI_CMDSET_INTEL_PROG_REGIONS:
  821. case CFI_CMDSET_INTEL_STANDARD:
  822. case CFI_CMDSET_INTEL_EXTENDED:
  823. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  824. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  825. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  826. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  827. flash_write_cmd (info, sector, 0, write_cmd);
  828. retcode = flash_status_check (info, sector,
  829. info->buffer_write_tout,
  830. "write to buffer");
  831. if (retcode == ERR_OK) {
  832. /* reduce the number of loops by the width of
  833. * the port */
  834. cnt = len >> shift;
  835. flash_write_cmd (info, sector, 0, cnt - 1);
  836. while (cnt-- > 0) {
  837. switch (info->portwidth) {
  838. case FLASH_CFI_8BIT:
  839. flash_write8(flash_read8(src), dst);
  840. src += 1, dst += 1;
  841. break;
  842. case FLASH_CFI_16BIT:
  843. flash_write16(flash_read16(src), dst);
  844. src += 2, dst += 2;
  845. break;
  846. case FLASH_CFI_32BIT:
  847. flash_write32(flash_read32(src), dst);
  848. src += 4, dst += 4;
  849. break;
  850. case FLASH_CFI_64BIT:
  851. flash_write64(flash_read64(src), dst);
  852. src += 8, dst += 8;
  853. break;
  854. default:
  855. retcode = ERR_INVAL;
  856. goto out_unmap;
  857. }
  858. }
  859. flash_write_cmd (info, sector, 0,
  860. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  861. retcode = flash_full_status_check (
  862. info, sector, info->buffer_write_tout,
  863. "buffer write");
  864. }
  865. break;
  866. case CFI_CMDSET_AMD_STANDARD:
  867. case CFI_CMDSET_AMD_EXTENDED:
  868. flash_unlock_seq(info,0);
  869. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  870. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  871. #endif
  872. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  873. cnt = len >> shift;
  874. flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
  875. switch (info->portwidth) {
  876. case FLASH_CFI_8BIT:
  877. while (cnt-- > 0) {
  878. flash_write8(flash_read8(src), dst);
  879. src += 1, dst += 1;
  880. }
  881. break;
  882. case FLASH_CFI_16BIT:
  883. while (cnt-- > 0) {
  884. flash_write16(flash_read16(src), dst);
  885. src += 2, dst += 2;
  886. }
  887. break;
  888. case FLASH_CFI_32BIT:
  889. while (cnt-- > 0) {
  890. flash_write32(flash_read32(src), dst);
  891. src += 4, dst += 4;
  892. }
  893. break;
  894. case FLASH_CFI_64BIT:
  895. while (cnt-- > 0) {
  896. flash_write64(flash_read64(src), dst);
  897. src += 8, dst += 8;
  898. }
  899. break;
  900. default:
  901. retcode = ERR_INVAL;
  902. goto out_unmap;
  903. }
  904. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  905. retcode = flash_full_status_check (info, sector,
  906. info->buffer_write_tout,
  907. "buffer write");
  908. break;
  909. default:
  910. debug ("Unknown Command Set\n");
  911. retcode = ERR_INVAL;
  912. break;
  913. }
  914. out_unmap:
  915. unmap_physmem(dst, len);
  916. return retcode;
  917. }
  918. #endif /* CFG_FLASH_USE_BUFFER_WRITE */
  919. /*-----------------------------------------------------------------------
  920. */
  921. int flash_erase (flash_info_t * info, int s_first, int s_last)
  922. {
  923. int rcode = 0;
  924. int prot;
  925. flash_sect_t sect;
  926. if (info->flash_id != FLASH_MAN_CFI) {
  927. puts ("Can't erase unknown flash type - aborted\n");
  928. return 1;
  929. }
  930. if ((s_first < 0) || (s_first > s_last)) {
  931. puts ("- no sectors to erase\n");
  932. return 1;
  933. }
  934. prot = 0;
  935. for (sect = s_first; sect <= s_last; ++sect) {
  936. if (info->protect[sect]) {
  937. prot++;
  938. }
  939. }
  940. if (prot) {
  941. printf ("- Warning: %d protected sectors will not be erased!\n",
  942. prot);
  943. } else {
  944. putc ('\n');
  945. }
  946. for (sect = s_first; sect <= s_last; sect++) {
  947. if (info->protect[sect] == 0) { /* not protected */
  948. switch (info->vendor) {
  949. case CFI_CMDSET_INTEL_PROG_REGIONS:
  950. case CFI_CMDSET_INTEL_STANDARD:
  951. case CFI_CMDSET_INTEL_EXTENDED:
  952. flash_write_cmd (info, sect, 0,
  953. FLASH_CMD_CLEAR_STATUS);
  954. flash_write_cmd (info, sect, 0,
  955. FLASH_CMD_BLOCK_ERASE);
  956. flash_write_cmd (info, sect, 0,
  957. FLASH_CMD_ERASE_CONFIRM);
  958. break;
  959. case CFI_CMDSET_AMD_STANDARD:
  960. case CFI_CMDSET_AMD_EXTENDED:
  961. flash_unlock_seq (info, sect);
  962. flash_write_cmd (info, sect,
  963. info->addr_unlock1,
  964. AMD_CMD_ERASE_START);
  965. flash_unlock_seq (info, sect);
  966. flash_write_cmd (info, sect, 0,
  967. AMD_CMD_ERASE_SECTOR);
  968. break;
  969. #ifdef CONFIG_FLASH_CFI_LEGACY
  970. case CFI_CMDSET_AMD_LEGACY:
  971. flash_unlock_seq (info, 0);
  972. flash_write_cmd (info, 0, info->addr_unlock1,
  973. AMD_CMD_ERASE_START);
  974. flash_unlock_seq (info, 0);
  975. flash_write_cmd (info, sect, 0,
  976. AMD_CMD_ERASE_SECTOR);
  977. break;
  978. #endif
  979. default:
  980. debug ("Unkown flash vendor %d\n",
  981. info->vendor);
  982. break;
  983. }
  984. if (flash_full_status_check
  985. (info, sect, info->erase_blk_tout, "erase")) {
  986. rcode = 1;
  987. } else
  988. putc ('.');
  989. }
  990. }
  991. puts (" done\n");
  992. return rcode;
  993. }
  994. /*-----------------------------------------------------------------------
  995. */
  996. void flash_print_info (flash_info_t * info)
  997. {
  998. int i;
  999. if (info->flash_id != FLASH_MAN_CFI) {
  1000. puts ("missing or unknown FLASH type\n");
  1001. return;
  1002. }
  1003. printf ("%s FLASH (%d x %d)",
  1004. info->name,
  1005. (info->portwidth << 3), (info->chipwidth << 3));
  1006. if (info->size < 1024*1024)
  1007. printf (" Size: %ld kB in %d Sectors\n",
  1008. info->size >> 10, info->sector_count);
  1009. else
  1010. printf (" Size: %ld MB in %d Sectors\n",
  1011. info->size >> 20, info->sector_count);
  1012. printf (" ");
  1013. switch (info->vendor) {
  1014. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1015. printf ("Intel Prog Regions");
  1016. break;
  1017. case CFI_CMDSET_INTEL_STANDARD:
  1018. printf ("Intel Standard");
  1019. break;
  1020. case CFI_CMDSET_INTEL_EXTENDED:
  1021. printf ("Intel Extended");
  1022. break;
  1023. case CFI_CMDSET_AMD_STANDARD:
  1024. printf ("AMD Standard");
  1025. break;
  1026. case CFI_CMDSET_AMD_EXTENDED:
  1027. printf ("AMD Extended");
  1028. break;
  1029. #ifdef CONFIG_FLASH_CFI_LEGACY
  1030. case CFI_CMDSET_AMD_LEGACY:
  1031. printf ("AMD Legacy");
  1032. break;
  1033. #endif
  1034. default:
  1035. printf ("Unknown (%d)", info->vendor);
  1036. break;
  1037. }
  1038. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
  1039. info->manufacturer_id, info->device_id);
  1040. if (info->device_id == 0x7E) {
  1041. printf("%04X", info->device_id2);
  1042. }
  1043. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1044. info->erase_blk_tout,
  1045. info->write_tout);
  1046. if (info->buffer_size > 1) {
  1047. printf (" Buffer write timeout: %ld ms, "
  1048. "buffer size: %d bytes\n",
  1049. info->buffer_write_tout,
  1050. info->buffer_size);
  1051. }
  1052. puts ("\n Sector Start Addresses:");
  1053. for (i = 0; i < info->sector_count; ++i) {
  1054. if ((i % 5) == 0)
  1055. printf ("\n");
  1056. #ifdef CFG_FLASH_EMPTY_INFO
  1057. int k;
  1058. int size;
  1059. int erased;
  1060. volatile unsigned long *flash;
  1061. /*
  1062. * Check if whole sector is erased
  1063. */
  1064. size = flash_sector_size(info, i);
  1065. erased = 1;
  1066. flash = (volatile unsigned long *) info->start[i];
  1067. size = size >> 2; /* divide by 4 for longword access */
  1068. for (k = 0; k < size; k++) {
  1069. if (*flash++ != 0xffffffff) {
  1070. erased = 0;
  1071. break;
  1072. }
  1073. }
  1074. /* print empty and read-only info */
  1075. printf (" %08lX %c %s ",
  1076. info->start[i],
  1077. erased ? 'E' : ' ',
  1078. info->protect[i] ? "RO" : " ");
  1079. #else /* ! CFG_FLASH_EMPTY_INFO */
  1080. printf (" %08lX %s ",
  1081. info->start[i],
  1082. info->protect[i] ? "RO" : " ");
  1083. #endif
  1084. }
  1085. putc ('\n');
  1086. return;
  1087. }
  1088. /*-----------------------------------------------------------------------
  1089. * This is used in a few places in write_buf() to show programming
  1090. * progress. Making it a function is nasty because it needs to do side
  1091. * effect updates to digit and dots. Repeated code is nasty too, so
  1092. * we define it once here.
  1093. */
  1094. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1095. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1096. dots -= dots_sub; \
  1097. if ((scale > 0) && (dots <= 0)) { \
  1098. if ((digit % 5) == 0) \
  1099. printf ("%d", digit / 5); \
  1100. else \
  1101. putc ('.'); \
  1102. digit--; \
  1103. dots += scale; \
  1104. }
  1105. #else
  1106. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1107. #endif
  1108. /*-----------------------------------------------------------------------
  1109. * Copy memory to flash, returns:
  1110. * 0 - OK
  1111. * 1 - write timeout
  1112. * 2 - Flash not erased
  1113. */
  1114. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1115. {
  1116. ulong wp;
  1117. uchar *p;
  1118. int aln;
  1119. cfiword_t cword;
  1120. int i, rc;
  1121. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  1122. int buffered_size;
  1123. #endif
  1124. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1125. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1126. int scale = 0;
  1127. int dots = 0;
  1128. /*
  1129. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1130. */
  1131. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1132. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1133. CONFIG_FLASH_SHOW_PROGRESS);
  1134. }
  1135. #endif
  1136. /* get lower aligned address */
  1137. wp = (addr & ~(info->portwidth - 1));
  1138. /* handle unaligned start */
  1139. if ((aln = addr - wp) != 0) {
  1140. cword.l = 0;
  1141. p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
  1142. for (i = 0; i < aln; ++i)
  1143. flash_add_byte (info, &cword, flash_read8(p + i));
  1144. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1145. flash_add_byte (info, &cword, *src++);
  1146. cnt--;
  1147. }
  1148. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1149. flash_add_byte (info, &cword, flash_read8(p + i));
  1150. rc = flash_write_cfiword (info, wp, cword);
  1151. unmap_physmem(p, info->portwidth);
  1152. if (rc != 0)
  1153. return rc;
  1154. wp += i;
  1155. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1156. }
  1157. /* handle the aligned part */
  1158. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  1159. buffered_size = (info->portwidth / info->chipwidth);
  1160. buffered_size *= info->buffer_size;
  1161. while (cnt >= info->portwidth) {
  1162. /* prohibit buffer write when buffer_size is 1 */
  1163. if (info->buffer_size == 1) {
  1164. cword.l = 0;
  1165. for (i = 0; i < info->portwidth; i++)
  1166. flash_add_byte (info, &cword, *src++);
  1167. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1168. return rc;
  1169. wp += info->portwidth;
  1170. cnt -= info->portwidth;
  1171. continue;
  1172. }
  1173. /* write buffer until next buffered_size aligned boundary */
  1174. i = buffered_size - (wp % buffered_size);
  1175. if (i > cnt)
  1176. i = cnt;
  1177. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1178. return rc;
  1179. i -= i & (info->portwidth - 1);
  1180. wp += i;
  1181. src += i;
  1182. cnt -= i;
  1183. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1184. }
  1185. #else
  1186. while (cnt >= info->portwidth) {
  1187. cword.l = 0;
  1188. for (i = 0; i < info->portwidth; i++) {
  1189. flash_add_byte (info, &cword, *src++);
  1190. }
  1191. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1192. return rc;
  1193. wp += info->portwidth;
  1194. cnt -= info->portwidth;
  1195. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1196. }
  1197. #endif /* CFG_FLASH_USE_BUFFER_WRITE */
  1198. if (cnt == 0) {
  1199. return (0);
  1200. }
  1201. /*
  1202. * handle unaligned tail bytes
  1203. */
  1204. cword.l = 0;
  1205. p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
  1206. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1207. flash_add_byte (info, &cword, *src++);
  1208. --cnt;
  1209. }
  1210. for (; i < info->portwidth; ++i)
  1211. flash_add_byte (info, &cword, flash_read8(p + i));
  1212. unmap_physmem(p, info->portwidth);
  1213. return flash_write_cfiword (info, wp, cword);
  1214. }
  1215. /*-----------------------------------------------------------------------
  1216. */
  1217. #ifdef CFG_FLASH_PROTECTION
  1218. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1219. {
  1220. int retcode = 0;
  1221. switch (info->vendor) {
  1222. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1223. case CFI_CMDSET_INTEL_STANDARD:
  1224. case CFI_CMDSET_INTEL_EXTENDED:
  1225. flash_write_cmd (info, sector, 0,
  1226. FLASH_CMD_CLEAR_STATUS);
  1227. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1228. if (prot)
  1229. flash_write_cmd (info, sector, 0,
  1230. FLASH_CMD_PROTECT_SET);
  1231. else
  1232. flash_write_cmd (info, sector, 0,
  1233. FLASH_CMD_PROTECT_CLEAR);
  1234. break;
  1235. case CFI_CMDSET_AMD_EXTENDED:
  1236. case CFI_CMDSET_AMD_STANDARD:
  1237. /* U-Boot only checks the first byte */
  1238. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1239. if (prot) {
  1240. flash_unlock_seq (info, 0);
  1241. flash_write_cmd (info, 0,
  1242. info->addr_unlock1,
  1243. ATM_CMD_SOFTLOCK_START);
  1244. flash_unlock_seq (info, 0);
  1245. flash_write_cmd (info, sector, 0,
  1246. ATM_CMD_LOCK_SECT);
  1247. } else {
  1248. flash_write_cmd (info, 0,
  1249. info->addr_unlock1,
  1250. AMD_CMD_UNLOCK_START);
  1251. if (info->device_id == ATM_ID_BV6416)
  1252. flash_write_cmd (info, sector,
  1253. 0, ATM_CMD_UNLOCK_SECT);
  1254. }
  1255. }
  1256. break;
  1257. #ifdef CONFIG_FLASH_CFI_LEGACY
  1258. case CFI_CMDSET_AMD_LEGACY:
  1259. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1260. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1261. if (prot)
  1262. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1263. else
  1264. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1265. #endif
  1266. };
  1267. if ((retcode =
  1268. flash_full_status_check (info, sector, info->erase_blk_tout,
  1269. prot ? "protect" : "unprotect")) == 0) {
  1270. info->protect[sector] = prot;
  1271. /*
  1272. * On some of Intel's flash chips (marked via legacy_unlock)
  1273. * unprotect unprotects all locking.
  1274. */
  1275. if ((prot == 0) && (info->legacy_unlock)) {
  1276. flash_sect_t i;
  1277. for (i = 0; i < info->sector_count; i++) {
  1278. if (info->protect[i])
  1279. flash_real_protect (info, i, 1);
  1280. }
  1281. }
  1282. }
  1283. return retcode;
  1284. }
  1285. /*-----------------------------------------------------------------------
  1286. * flash_read_user_serial - read the OneTimeProgramming cells
  1287. */
  1288. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1289. int len)
  1290. {
  1291. uchar *src;
  1292. uchar *dst;
  1293. dst = buffer;
  1294. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1295. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1296. memcpy (dst, src + offset, len);
  1297. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1298. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1299. }
  1300. /*
  1301. * flash_read_factory_serial - read the device Id from the protection area
  1302. */
  1303. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1304. int len)
  1305. {
  1306. uchar *src;
  1307. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1308. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1309. memcpy (buffer, src + offset, len);
  1310. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1311. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1312. }
  1313. #endif /* CFG_FLASH_PROTECTION */
  1314. /*-----------------------------------------------------------------------
  1315. * Reverse the order of the erase regions in the CFI QRY structure.
  1316. * This is needed for chips that are either a) correctly detected as
  1317. * top-boot, or b) buggy.
  1318. */
  1319. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1320. {
  1321. unsigned int i, j;
  1322. u32 tmp;
  1323. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1324. tmp = qry->erase_region_info[i];
  1325. qry->erase_region_info[i] = qry->erase_region_info[j];
  1326. qry->erase_region_info[j] = tmp;
  1327. }
  1328. }
  1329. /*-----------------------------------------------------------------------
  1330. * read jedec ids from device and set corresponding fields in info struct
  1331. *
  1332. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1333. *
  1334. */
  1335. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1336. {
  1337. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1338. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1339. udelay(1000); /* some flash are slow to respond */
  1340. info->manufacturer_id = flash_read_uchar (info,
  1341. FLASH_OFFSET_MANUFACTURER_ID);
  1342. info->device_id = flash_read_uchar (info,
  1343. FLASH_OFFSET_DEVICE_ID);
  1344. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1345. }
  1346. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1347. {
  1348. info->cmd_reset = FLASH_CMD_RESET;
  1349. cmdset_intel_read_jedec_ids(info);
  1350. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1351. #ifdef CFG_FLASH_PROTECTION
  1352. /* read legacy lock/unlock bit from intel flash */
  1353. if (info->ext_addr) {
  1354. info->legacy_unlock = flash_read_uchar (info,
  1355. info->ext_addr + 5) & 0x08;
  1356. }
  1357. #endif
  1358. return 0;
  1359. }
  1360. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1361. {
  1362. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1363. flash_unlock_seq(info, 0);
  1364. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1365. udelay(1000); /* some flash are slow to respond */
  1366. info->manufacturer_id = flash_read_uchar (info,
  1367. FLASH_OFFSET_MANUFACTURER_ID);
  1368. switch (info->chipwidth){
  1369. case FLASH_CFI_8BIT:
  1370. info->device_id = flash_read_uchar (info,
  1371. FLASH_OFFSET_DEVICE_ID);
  1372. if (info->device_id == 0x7E) {
  1373. /* AMD 3-byte (expanded) device ids */
  1374. info->device_id2 = flash_read_uchar (info,
  1375. FLASH_OFFSET_DEVICE_ID2);
  1376. info->device_id2 <<= 8;
  1377. info->device_id2 |= flash_read_uchar (info,
  1378. FLASH_OFFSET_DEVICE_ID3);
  1379. }
  1380. break;
  1381. case FLASH_CFI_16BIT:
  1382. info->device_id = flash_read_word (info,
  1383. FLASH_OFFSET_DEVICE_ID);
  1384. break;
  1385. default:
  1386. break;
  1387. }
  1388. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1389. }
  1390. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1391. {
  1392. info->cmd_reset = AMD_CMD_RESET;
  1393. cmdset_amd_read_jedec_ids(info);
  1394. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1395. return 0;
  1396. }
  1397. #ifdef CONFIG_FLASH_CFI_LEGACY
  1398. static void flash_read_jedec_ids (flash_info_t * info)
  1399. {
  1400. info->manufacturer_id = 0;
  1401. info->device_id = 0;
  1402. info->device_id2 = 0;
  1403. switch (info->vendor) {
  1404. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1405. case CFI_CMDSET_INTEL_STANDARD:
  1406. case CFI_CMDSET_INTEL_EXTENDED:
  1407. cmdset_intel_read_jedec_ids(info);
  1408. break;
  1409. case CFI_CMDSET_AMD_STANDARD:
  1410. case CFI_CMDSET_AMD_EXTENDED:
  1411. cmdset_amd_read_jedec_ids(info);
  1412. break;
  1413. default:
  1414. break;
  1415. }
  1416. }
  1417. /*-----------------------------------------------------------------------
  1418. * Call board code to request info about non-CFI flash.
  1419. * board_flash_get_legacy needs to fill in at least:
  1420. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1421. */
  1422. static int flash_detect_legacy(ulong base, int banknum)
  1423. {
  1424. flash_info_t *info = &flash_info[banknum];
  1425. if (board_flash_get_legacy(base, banknum, info)) {
  1426. /* board code may have filled info completely. If not, we
  1427. use JEDEC ID probing. */
  1428. if (!info->vendor) {
  1429. int modes[] = {
  1430. CFI_CMDSET_AMD_STANDARD,
  1431. CFI_CMDSET_INTEL_STANDARD
  1432. };
  1433. int i;
  1434. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1435. info->vendor = modes[i];
  1436. info->start[0] = base;
  1437. if (info->portwidth == FLASH_CFI_8BIT
  1438. && info->interface == FLASH_CFI_X8X16) {
  1439. info->addr_unlock1 = 0x2AAA;
  1440. info->addr_unlock2 = 0x5555;
  1441. } else {
  1442. info->addr_unlock1 = 0x5555;
  1443. info->addr_unlock2 = 0x2AAA;
  1444. }
  1445. flash_read_jedec_ids(info);
  1446. debug("JEDEC PROBE: ID %x %x %x\n",
  1447. info->manufacturer_id,
  1448. info->device_id,
  1449. info->device_id2);
  1450. if (jedec_flash_match(info, base))
  1451. break;
  1452. }
  1453. }
  1454. switch(info->vendor) {
  1455. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1456. case CFI_CMDSET_INTEL_STANDARD:
  1457. case CFI_CMDSET_INTEL_EXTENDED:
  1458. info->cmd_reset = FLASH_CMD_RESET;
  1459. break;
  1460. case CFI_CMDSET_AMD_STANDARD:
  1461. case CFI_CMDSET_AMD_EXTENDED:
  1462. case CFI_CMDSET_AMD_LEGACY:
  1463. info->cmd_reset = AMD_CMD_RESET;
  1464. break;
  1465. }
  1466. info->flash_id = FLASH_MAN_CFI;
  1467. return 1;
  1468. }
  1469. return 0; /* use CFI */
  1470. }
  1471. #else
  1472. static inline int flash_detect_legacy(ulong base, int banknum)
  1473. {
  1474. return 0; /* use CFI */
  1475. }
  1476. #endif
  1477. /*-----------------------------------------------------------------------
  1478. * detect if flash is compatible with the Common Flash Interface (CFI)
  1479. * http://www.jedec.org/download/search/jesd68.pdf
  1480. */
  1481. static void flash_read_cfi (flash_info_t *info, void *buf,
  1482. unsigned int start, size_t len)
  1483. {
  1484. u8 *p = buf;
  1485. unsigned int i;
  1486. for (i = 0; i < len; i++)
  1487. p[i] = flash_read_uchar(info, start + i);
  1488. }
  1489. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1490. {
  1491. int cfi_offset;
  1492. /* We do not yet know what kind of commandset to use, so we issue
  1493. the reset command in both Intel and AMD variants, in the hope
  1494. that AMD flash roms ignore the Intel command. */
  1495. flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
  1496. flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
  1497. for (cfi_offset=0;
  1498. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1499. cfi_offset++) {
  1500. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1501. FLASH_CMD_CFI);
  1502. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1503. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1504. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1505. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1506. sizeof(struct cfi_qry));
  1507. info->interface = le16_to_cpu(qry->interface_desc);
  1508. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1509. debug ("device interface is %d\n",
  1510. info->interface);
  1511. debug ("found port %d chip %d ",
  1512. info->portwidth, info->chipwidth);
  1513. debug ("port %d bits chip %d bits\n",
  1514. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1515. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1516. /* calculate command offsets as in the Linux driver */
  1517. info->addr_unlock1 = 0x555;
  1518. info->addr_unlock2 = 0x2aa;
  1519. /*
  1520. * modify the unlock address if we are
  1521. * in compatibility mode
  1522. */
  1523. if ( /* x8/x16 in x8 mode */
  1524. ((info->chipwidth == FLASH_CFI_BY8) &&
  1525. (info->interface == FLASH_CFI_X8X16)) ||
  1526. /* x16/x32 in x16 mode */
  1527. ((info->chipwidth == FLASH_CFI_BY16) &&
  1528. (info->interface == FLASH_CFI_X16X32)))
  1529. {
  1530. info->addr_unlock1 = 0xaaa;
  1531. info->addr_unlock2 = 0x555;
  1532. }
  1533. info->name = "CFI conformant";
  1534. return 1;
  1535. }
  1536. }
  1537. return 0;
  1538. }
  1539. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1540. {
  1541. debug ("flash detect cfi\n");
  1542. for (info->portwidth = CFG_FLASH_CFI_WIDTH;
  1543. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1544. for (info->chipwidth = FLASH_CFI_BY8;
  1545. info->chipwidth <= info->portwidth;
  1546. info->chipwidth <<= 1)
  1547. if (__flash_detect_cfi(info, qry))
  1548. return 1;
  1549. }
  1550. debug ("not found\n");
  1551. return 0;
  1552. }
  1553. /*
  1554. * Manufacturer-specific quirks. Add workarounds for geometry
  1555. * reversal, etc. here.
  1556. */
  1557. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1558. {
  1559. /* check if flash geometry needs reversal */
  1560. if (qry->num_erase_regions > 1) {
  1561. /* reverse geometry if top boot part */
  1562. if (info->cfi_version < 0x3131) {
  1563. /* CFI < 1.1, try to guess from device id */
  1564. if ((info->device_id & 0x80) != 0)
  1565. cfi_reverse_geometry(qry);
  1566. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1567. /* CFI >= 1.1, deduct from top/bottom flag */
  1568. /* note: ext_addr is valid since cfi_version > 0 */
  1569. cfi_reverse_geometry(qry);
  1570. }
  1571. }
  1572. }
  1573. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1574. {
  1575. int reverse_geometry = 0;
  1576. /* Check the "top boot" bit in the PRI */
  1577. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1578. reverse_geometry = 1;
  1579. /* AT49BV6416(T) list the erase regions in the wrong order.
  1580. * However, the device ID is identical with the non-broken
  1581. * AT49BV642D since u-boot only reads the low byte (they
  1582. * differ in the high byte.) So leave out this fixup for now.
  1583. */
  1584. #if 0
  1585. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1586. reverse_geometry = !reverse_geometry;
  1587. #endif
  1588. if (reverse_geometry)
  1589. cfi_reverse_geometry(qry);
  1590. }
  1591. /*
  1592. * The following code cannot be run from FLASH!
  1593. *
  1594. */
  1595. ulong flash_get_size (ulong base, int banknum)
  1596. {
  1597. flash_info_t *info = &flash_info[banknum];
  1598. int i, j;
  1599. flash_sect_t sect_cnt;
  1600. unsigned long sector;
  1601. unsigned long tmp;
  1602. int size_ratio;
  1603. uchar num_erase_regions;
  1604. int erase_region_size;
  1605. int erase_region_count;
  1606. struct cfi_qry qry;
  1607. memset(&qry, 0, sizeof(qry));
  1608. info->ext_addr = 0;
  1609. info->cfi_version = 0;
  1610. #ifdef CFG_FLASH_PROTECTION
  1611. info->legacy_unlock = 0;
  1612. #endif
  1613. info->start[0] = base;
  1614. if (flash_detect_cfi (info, &qry)) {
  1615. info->vendor = le16_to_cpu(qry.p_id);
  1616. info->ext_addr = le16_to_cpu(qry.p_adr);
  1617. num_erase_regions = qry.num_erase_regions;
  1618. if (info->ext_addr) {
  1619. info->cfi_version = (ushort) flash_read_uchar (info,
  1620. info->ext_addr + 3) << 8;
  1621. info->cfi_version |= (ushort) flash_read_uchar (info,
  1622. info->ext_addr + 4);
  1623. }
  1624. #ifdef DEBUG
  1625. flash_printqry (&qry);
  1626. #endif
  1627. switch (info->vendor) {
  1628. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1629. case CFI_CMDSET_INTEL_STANDARD:
  1630. case CFI_CMDSET_INTEL_EXTENDED:
  1631. cmdset_intel_init(info, &qry);
  1632. break;
  1633. case CFI_CMDSET_AMD_STANDARD:
  1634. case CFI_CMDSET_AMD_EXTENDED:
  1635. cmdset_amd_init(info, &qry);
  1636. break;
  1637. default:
  1638. printf("CFI: Unknown command set 0x%x\n",
  1639. info->vendor);
  1640. /*
  1641. * Unfortunately, this means we don't know how
  1642. * to get the chip back to Read mode. Might
  1643. * as well try an Intel-style reset...
  1644. */
  1645. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1646. return 0;
  1647. }
  1648. /* Do manufacturer-specific fixups */
  1649. switch (info->manufacturer_id) {
  1650. case 0x0001:
  1651. flash_fixup_amd(info, &qry);
  1652. break;
  1653. case 0x001f:
  1654. flash_fixup_atmel(info, &qry);
  1655. break;
  1656. }
  1657. debug ("manufacturer is %d\n", info->vendor);
  1658. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1659. debug ("device id is 0x%x\n", info->device_id);
  1660. debug ("device id2 is 0x%x\n", info->device_id2);
  1661. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1662. size_ratio = info->portwidth / info->chipwidth;
  1663. /* if the chip is x8/x16 reduce the ratio by half */
  1664. if ((info->interface == FLASH_CFI_X8X16)
  1665. && (info->chipwidth == FLASH_CFI_BY8)) {
  1666. size_ratio >>= 1;
  1667. }
  1668. debug ("size_ratio %d port %d bits chip %d bits\n",
  1669. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1670. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1671. debug ("found %d erase regions\n", num_erase_regions);
  1672. sect_cnt = 0;
  1673. sector = base;
  1674. for (i = 0; i < num_erase_regions; i++) {
  1675. if (i > NUM_ERASE_REGIONS) {
  1676. printf ("%d erase regions found, only %d used\n",
  1677. num_erase_regions, NUM_ERASE_REGIONS);
  1678. break;
  1679. }
  1680. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1681. debug("erase region %u: 0x%08lx\n", i, tmp);
  1682. erase_region_count = (tmp & 0xffff) + 1;
  1683. tmp >>= 16;
  1684. erase_region_size =
  1685. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1686. debug ("erase_region_count = %d erase_region_size = %d\n",
  1687. erase_region_count, erase_region_size);
  1688. for (j = 0; j < erase_region_count; j++) {
  1689. if (sect_cnt >= CFG_MAX_FLASH_SECT) {
  1690. printf("ERROR: too many flash sectors\n");
  1691. break;
  1692. }
  1693. info->start[sect_cnt] = sector;
  1694. sector += (erase_region_size * size_ratio);
  1695. /*
  1696. * Only read protection status from
  1697. * supported devices (intel...)
  1698. */
  1699. switch (info->vendor) {
  1700. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1701. case CFI_CMDSET_INTEL_EXTENDED:
  1702. case CFI_CMDSET_INTEL_STANDARD:
  1703. info->protect[sect_cnt] =
  1704. flash_isset (info, sect_cnt,
  1705. FLASH_OFFSET_PROTECT,
  1706. FLASH_STATUS_PROTECT);
  1707. break;
  1708. default:
  1709. /* default: not protected */
  1710. info->protect[sect_cnt] = 0;
  1711. }
  1712. sect_cnt++;
  1713. }
  1714. }
  1715. info->sector_count = sect_cnt;
  1716. info->size = 1 << qry.dev_size;
  1717. /* multiply the size by the number of chips */
  1718. info->size *= size_ratio;
  1719. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1720. tmp = 1 << qry.block_erase_timeout_typ;
  1721. info->erase_blk_tout = tmp *
  1722. (1 << qry.block_erase_timeout_max);
  1723. tmp = (1 << qry.buf_write_timeout_typ) *
  1724. (1 << qry.buf_write_timeout_max);
  1725. /* round up when converting to ms */
  1726. info->buffer_write_tout = (tmp + 999) / 1000;
  1727. tmp = (1 << qry.word_write_timeout_typ) *
  1728. (1 << qry.word_write_timeout_max);
  1729. /* round up when converting to ms */
  1730. info->write_tout = (tmp + 999) / 1000;
  1731. info->flash_id = FLASH_MAN_CFI;
  1732. if ((info->interface == FLASH_CFI_X8X16) &&
  1733. (info->chipwidth == FLASH_CFI_BY8)) {
  1734. /* XXX - Need to test on x8/x16 in parallel. */
  1735. info->portwidth >>= 1;
  1736. }
  1737. }
  1738. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1739. return (info->size);
  1740. }
  1741. /*-----------------------------------------------------------------------
  1742. */
  1743. unsigned long flash_init (void)
  1744. {
  1745. unsigned long size = 0;
  1746. int i;
  1747. #if defined(CFG_FLASH_AUTOPROTECT_LIST)
  1748. struct apl_s {
  1749. ulong start;
  1750. ulong size;
  1751. } apl[] = CFG_FLASH_AUTOPROTECT_LIST;
  1752. #endif
  1753. #ifdef CFG_FLASH_PROTECTION
  1754. char *s = getenv("unlock");
  1755. #endif
  1756. #define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CFG_FLASH_BANKS_LIST)[i])
  1757. /* Init: no FLASHes known */
  1758. for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
  1759. flash_info[i].flash_id = FLASH_UNKNOWN;
  1760. if (!flash_detect_legacy (BANK_BASE(i), i))
  1761. flash_get_size (BANK_BASE(i), i);
  1762. size += flash_info[i].size;
  1763. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1764. #ifndef CFG_FLASH_QUIET_TEST
  1765. printf ("## Unknown FLASH on Bank %d "
  1766. "- Size = 0x%08lx = %ld MB\n",
  1767. i+1, flash_info[i].size,
  1768. flash_info[i].size << 20);
  1769. #endif /* CFG_FLASH_QUIET_TEST */
  1770. }
  1771. #ifdef CFG_FLASH_PROTECTION
  1772. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1773. /*
  1774. * Only the U-Boot image and it's environment
  1775. * is protected, all other sectors are
  1776. * unprotected (unlocked) if flash hardware
  1777. * protection is used (CFG_FLASH_PROTECTION)
  1778. * and the environment variable "unlock" is
  1779. * set to "yes".
  1780. */
  1781. if (flash_info[i].legacy_unlock) {
  1782. int k;
  1783. /*
  1784. * Disable legacy_unlock temporarily,
  1785. * since flash_real_protect would
  1786. * relock all other sectors again
  1787. * otherwise.
  1788. */
  1789. flash_info[i].legacy_unlock = 0;
  1790. /*
  1791. * Legacy unlocking (e.g. Intel J3) ->
  1792. * unlock only one sector. This will
  1793. * unlock all sectors.
  1794. */
  1795. flash_real_protect (&flash_info[i], 0, 0);
  1796. flash_info[i].legacy_unlock = 1;
  1797. /*
  1798. * Manually mark other sectors as
  1799. * unlocked (unprotected)
  1800. */
  1801. for (k = 1; k < flash_info[i].sector_count; k++)
  1802. flash_info[i].protect[k] = 0;
  1803. } else {
  1804. /*
  1805. * No legancy unlocking -> unlock all sectors
  1806. */
  1807. flash_protect (FLAG_PROTECT_CLEAR,
  1808. flash_info[i].start[0],
  1809. flash_info[i].start[0]
  1810. + flash_info[i].size - 1,
  1811. &flash_info[i]);
  1812. }
  1813. }
  1814. #endif /* CFG_FLASH_PROTECTION */
  1815. }
  1816. /* Monitor protection ON by default */
  1817. #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
  1818. flash_protect (FLAG_PROTECT_SET,
  1819. CFG_MONITOR_BASE,
  1820. CFG_MONITOR_BASE + monitor_flash_len - 1,
  1821. flash_get_info(CFG_MONITOR_BASE));
  1822. #endif
  1823. /* Environment protection ON by default */
  1824. #ifdef CONFIG_ENV_IS_IN_FLASH
  1825. flash_protect (FLAG_PROTECT_SET,
  1826. CFG_ENV_ADDR,
  1827. CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
  1828. flash_get_info(CFG_ENV_ADDR));
  1829. #endif
  1830. /* Redundant environment protection ON by default */
  1831. #ifdef CFG_ENV_ADDR_REDUND
  1832. flash_protect (FLAG_PROTECT_SET,
  1833. CFG_ENV_ADDR_REDUND,
  1834. CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
  1835. flash_get_info(CFG_ENV_ADDR_REDUND));
  1836. #endif
  1837. #if defined(CFG_FLASH_AUTOPROTECT_LIST)
  1838. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1839. debug("autoprotecting from %08x to %08x\n",
  1840. apl[i].start, apl[i].start + apl[i].size - 1);
  1841. flash_protect (FLAG_PROTECT_SET,
  1842. apl[i].start,
  1843. apl[i].start + apl[i].size - 1,
  1844. flash_get_info(apl[i].start));
  1845. }
  1846. #endif
  1847. return (size);
  1848. }