flash.c 15 KB

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  1. /*
  2. * (C) Copyright 2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * flash_real_protect() routine based on boards/alaska/flash.c
  6. * (C) Copyright 2001
  7. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. /* Intel-compatible flash commands */
  29. #define INTEL_ERASE 0x20
  30. #define INTEL_PROGRAM 0x40
  31. #define INTEL_CLEAR 0x50
  32. #define INTEL_LOCKBIT 0x60
  33. #define INTEL_PROTECT 0x01
  34. #define INTEL_STATUS 0x70
  35. #define INTEL_READID 0x90
  36. #define INTEL_READID 0x90
  37. #define INTEL_SUSPEND 0xB0
  38. #define INTEL_CONFIRM 0xD0
  39. #define INTEL_RESET 0xFF
  40. /* Intel-compatible flash status bits */
  41. #define INTEL_FINISHED 0x80
  42. #define INTEL_OK 0x80
  43. typedef unsigned char FLASH_PORT_WIDTH;
  44. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  45. #define FPW FLASH_PORT_WIDTH
  46. #define FPWV FLASH_PORT_WIDTHV
  47. #define FLASH_ID_MASK 0xFF
  48. #define ORMASK(size) ((-size) & OR_AM_MSK)
  49. #define FLASH_CYCLE1 0x0555
  50. #define FLASH_CYCLE2 0x02aa
  51. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  52. /*-----------------------------------------------------------------------
  53. * Functions
  54. */
  55. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  56. static void flash_reset(flash_info_t *info);
  57. static flash_info_t *flash_get_info(ulong base);
  58. static int write_data (flash_info_t *info, FPWV *dest, FPW data); /* O2D */
  59. static void flash_sync_real_protect (flash_info_t * info);
  60. static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
  61. /*-----------------------------------------------------------------------
  62. * flash_init()
  63. *
  64. * sets up flash_info and returns size of FLASH (bytes)
  65. */
  66. unsigned long flash_init (void)
  67. {
  68. unsigned long size = 0;
  69. int i;
  70. extern void flash_preinit(void);
  71. extern void flash_afterinit(ulong);
  72. flash_preinit();
  73. /* Init: no FLASHes known */
  74. for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
  75. memset(&flash_info[i], 0, sizeof(flash_info_t));
  76. flash_info[i].flash_id = FLASH_UNKNOWN;
  77. }
  78. /* Query flash chip */
  79. flash_info[0].size =
  80. flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
  81. size += flash_info[0].size;
  82. /* get the h/w and s/w protection status in sync */
  83. flash_sync_real_protect(&flash_info[0]);
  84. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  85. /* monitor protection ON by default */
  86. flash_protect(FLAG_PROTECT_SET,
  87. CFG_MONITOR_BASE,
  88. CFG_MONITOR_BASE+monitor_flash_len-1,
  89. flash_get_info(CFG_MONITOR_BASE));
  90. #endif
  91. #ifdef CONFIG_ENV_IS_IN_FLASH
  92. /* ENV protection ON by default */
  93. flash_protect(FLAG_PROTECT_SET,
  94. CFG_ENV_ADDR,
  95. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  96. flash_get_info(CFG_ENV_ADDR));
  97. #endif
  98. flash_afterinit(size);
  99. return (size ? size : 1);
  100. }
  101. /*-----------------------------------------------------------------------
  102. */
  103. static void flash_reset(flash_info_t *info)
  104. {
  105. FPWV *base = (FPWV *)(info->start[0]);
  106. /* Put FLASH back in read mode */
  107. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  108. *base = (FPW) INTEL_RESET; /* Intel Read Mode */
  109. }
  110. /*-----------------------------------------------------------------------
  111. */
  112. static flash_info_t *flash_get_info(ulong base)
  113. {
  114. int i;
  115. flash_info_t * info;
  116. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  117. info = & flash_info[i];
  118. if (info->size &&
  119. info->start[0] <= base &&
  120. base <= info->start[0] + info->size - 1)
  121. break;
  122. }
  123. return (i == CFG_MAX_FLASH_BANKS ? 0 : info);
  124. }
  125. /*-----------------------------------------------------------------------
  126. */
  127. void flash_print_info (flash_info_t *info)
  128. {
  129. int i;
  130. uchar *boottype;
  131. uchar *bootletter;
  132. char *fmt;
  133. uchar botbootletter[] = "B";
  134. uchar topbootletter[] = "T";
  135. uchar botboottype[] = "bottom boot sector";
  136. uchar topboottype[] = "top boot sector";
  137. if (info->flash_id == FLASH_UNKNOWN) {
  138. printf ("missing or unknown FLASH type\n");
  139. return;
  140. }
  141. switch (info->flash_id & FLASH_VENDMASK) {
  142. case FLASH_MAN_INTEL:
  143. printf ("INTEL ");
  144. break;
  145. default:
  146. printf ("Unknown Vendor ");
  147. break;
  148. }
  149. /* check for top or bottom boot, if it applies */
  150. if (info->flash_id & FLASH_BTYPE) {
  151. boottype = botboottype;
  152. bootletter = botbootletter;
  153. } else {
  154. boottype = topboottype;
  155. bootletter = topbootletter;
  156. }
  157. switch (info->flash_id & FLASH_TYPEMASK) {
  158. case FLASH_28F128J3A:
  159. fmt = "28F128J3 (128 Mbit, uniform sectors)\n";
  160. break;
  161. default:
  162. fmt = "Unknown Chip Type\n";
  163. break;
  164. }
  165. printf (fmt, bootletter, boottype);
  166. printf (" Size: %ld MB in %d Sectors\n",
  167. info->size >> 20,
  168. info->sector_count);
  169. printf (" Sector Start Addresses:");
  170. for (i=0; i<info->sector_count; ++i) {
  171. if ((i % 5) == 0)
  172. printf ("\n ");
  173. printf (" %08lX%s", info->start[i],
  174. info->protect[i] ? " (RO)" : " ");
  175. }
  176. printf ("\n");
  177. }
  178. /*-----------------------------------------------------------------------
  179. */
  180. /*
  181. * The following code cannot be run from FLASH!
  182. */
  183. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  184. {
  185. int i;
  186. /* Write auto select command: read Manufacturer ID */
  187. /* Write auto select command sequence and test FLASH answer */
  188. addr[FLASH_CYCLE1] = (FPW) INTEL_READID; /* selects Intel or AMD */
  189. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  190. * This works for any bus width and any FLASH device width.
  191. */
  192. udelay(100);
  193. switch (addr[0] & 0xff) {
  194. case (uchar)INTEL_MANUFACT:
  195. info->flash_id = FLASH_MAN_INTEL;
  196. break;
  197. default:
  198. info->flash_id = FLASH_UNKNOWN;
  199. info->sector_count = 0;
  200. info->size = 0;
  201. break;
  202. }
  203. /* Strataflash is configurable to 8/16bit Bus,
  204. * but the Query-Structure is Word-orientated */
  205. if (info->flash_id != FLASH_UNKNOWN) {
  206. switch ((FPW)addr[2]) {
  207. case (FPW)INTEL_ID_28F128J3:
  208. info->flash_id += FLASH_28F128J3A;
  209. info->sector_count = 128;
  210. info->size = 0x01000000;
  211. for( i = 0; i < info->sector_count; i++ )
  212. info->start[i] = (ulong)addr + (i * 0x20000);
  213. break; /* => Intel Strataflash 16MB */
  214. default:
  215. printf("Flash_id != %xd\n", (FPW)addr[2]);
  216. info->flash_id = FLASH_UNKNOWN;
  217. info->sector_count = 0;
  218. info->size = 0;
  219. return (0); /* => no or unknown flash */
  220. }
  221. }
  222. /* Put FLASH back in read mode */
  223. flash_reset(info);
  224. return (info->size);
  225. }
  226. /*-----------------------------------------------------------------------
  227. */
  228. int flash_erase (flash_info_t *info, int s_first, int s_last)
  229. {
  230. FPWV *addr;
  231. int flag, prot, sect;
  232. ulong start, now, last;
  233. int rcode = 0;
  234. if ((s_first < 0) || (s_first > s_last)) {
  235. if (info->flash_id == FLASH_UNKNOWN) {
  236. printf ("- missing\n");
  237. } else {
  238. printf ("- no sectors to erase\n");
  239. }
  240. return 1;
  241. }
  242. switch (info->flash_id & FLASH_TYPEMASK) {
  243. case FLASH_28F128J3A:
  244. break;
  245. case FLASH_UNKNOWN:
  246. default:
  247. printf ("Can't erase unknown flash type %08lx - aborted\n",
  248. info->flash_id);
  249. return 1;
  250. }
  251. prot = 0;
  252. for (sect = s_first; sect <= s_last; ++sect)
  253. if (info->protect[sect])
  254. prot++;
  255. if (prot)
  256. printf ("- Warning: %d protected sectors will not be erased!",
  257. prot);
  258. printf ("\n");
  259. last = get_timer(0);
  260. /* Start erase on unprotected sectors */
  261. for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
  262. if (info->protect[sect] != 0) /* protected, skip it */
  263. continue;
  264. /* Disable interrupts which might cause a timeout here */
  265. flag = disable_interrupts();
  266. addr = (FPWV *)(info->start[sect]);
  267. *addr = (FPW) INTEL_CLEAR; /* clear status register */
  268. *addr = (FPW) INTEL_ERASE; /* erase setup */
  269. *addr = (FPW) INTEL_CONFIRM; /* erase confirm */
  270. /* re-enable interrupts if necessary */
  271. if (flag)
  272. enable_interrupts();
  273. start = get_timer(0);
  274. /* wait at least 80us for Intel - let's wait 1 ms */
  275. udelay (1000);
  276. while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
  277. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  278. printf ("Timeout\n");
  279. *addr = (FPW) INTEL_SUSPEND;/* suspend erase */
  280. flash_reset(info); /* reset to read mode */
  281. rcode = 1; /* failed */
  282. break;
  283. }
  284. /* show that we're waiting */
  285. if ((get_timer(last)) > CFG_HZ) { /* every second */
  286. putc ('.');
  287. last = get_timer(0);
  288. }
  289. }
  290. flash_reset(info); /* reset to read mode */
  291. }
  292. printf (" done\n");
  293. return rcode;
  294. }
  295. /*-----------------------------------------------------------------------
  296. * Copy memory to flash, returns:
  297. * 0 - OK
  298. * 1 - write timeout
  299. * 2 - Flash not erased
  300. */
  301. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  302. {
  303. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  304. int bytes; /* number of bytes to program in current word */
  305. int left; /* number of bytes left to program */
  306. int i, res;
  307. for (left = cnt, res = 0;
  308. left > 0 && res == 0;
  309. addr += sizeof(data), left -= sizeof(data) - bytes) {
  310. bytes = addr & (sizeof(data) - 1);
  311. addr &= ~(sizeof(data) - 1);
  312. /* combine source and destination data so can program
  313. * an entire word of 16 or 32 bits */
  314. for (i = 0; i < sizeof(data); i++) {
  315. data <<= 8;
  316. if (i < bytes || i - bytes >= left )
  317. data += *((uchar *)addr + i);
  318. else
  319. data += *src++;
  320. }
  321. /* write one word to the flash */
  322. switch (info->flash_id & FLASH_VENDMASK) {
  323. case FLASH_MAN_INTEL:
  324. res = write_data(info, (FPWV *)addr, data);
  325. break;
  326. default:
  327. /* unknown flash type, error! */
  328. printf ("missing or unknown FLASH type\n");
  329. res = 1; /* not really a timeout, but gives error */
  330. break;
  331. }
  332. }
  333. return (res);
  334. }
  335. /*-----------------------------------------------------------------------
  336. * Write a word or halfword to Flash, returns:
  337. * 0 - OK
  338. * 1 - write timeout
  339. * 2 - Flash not erased
  340. */
  341. static int write_data (flash_info_t *info, FPWV *dest, FPW data)
  342. {
  343. FPWV *addr = dest;
  344. ulong status;
  345. ulong start;
  346. int flag;
  347. /* Check if Flash is (sufficiently) erased */
  348. if ((*addr & data) != data) {
  349. printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
  350. return (2);
  351. }
  352. /* Disable interrupts which might cause a timeout here */
  353. flag = disable_interrupts ();
  354. *addr = (FPW) INTEL_PROGRAM; /* write setup */
  355. *addr = data;
  356. /* arm simple, non interrupt dependent timer */
  357. start = get_timer(0);
  358. /* wait while polling the status register */
  359. while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
  360. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  361. *addr = (FPW) INTEL_RESET; /* restore read mode */
  362. return (1);
  363. }
  364. }
  365. *addr = (FPW) INTEL_RESET; /* restore read mode */
  366. if (flag)
  367. enable_interrupts();
  368. return (0);
  369. }
  370. /*-----------------------------------------------------------------------
  371. * Set/Clear sector's lock bit, returns:
  372. * 0 - OK
  373. * 1 - Error (timeout, voltage problems, etc.)
  374. */
  375. int flash_real_protect (flash_info_t * info, long sector, int prot)
  376. {
  377. ulong start;
  378. int i;
  379. int rc = 0;
  380. FPWV *addr = (FPWV *) (info->start[sector]);
  381. int flag = disable_interrupts ();
  382. *addr = INTEL_CLEAR; /* Clear status register */
  383. if (prot) { /* Set sector lock bit */
  384. *addr = INTEL_LOCKBIT; /* Sector lock bit */
  385. *addr = INTEL_PROTECT; /* set */
  386. } else { /* Clear sector lock bit */
  387. *addr = INTEL_LOCKBIT; /* All sectors lock bits */
  388. *addr = INTEL_CONFIRM; /* clear */
  389. }
  390. start = get_timer (0);
  391. while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
  392. if (get_timer (start) > CFG_FLASH_UNLOCK_TOUT) {
  393. printf ("Flash lock bit operation timed out\n");
  394. rc = 1;
  395. break;
  396. }
  397. }
  398. if (*addr != INTEL_OK) {
  399. printf ("Flash lock bit operation failed at %08X, CSR=%08X\n",
  400. (uint) addr, (uint) * addr);
  401. rc = 1;
  402. }
  403. if (!rc)
  404. info->protect[sector] = prot;
  405. /*
  406. * Clear lock bit command clears all sectors lock bits, so
  407. * we have to restore lock bits of protected sectors.
  408. */
  409. if (!prot) {
  410. for (i = 0; i < info->sector_count; i++) {
  411. if (info->protect[i]) {
  412. start = get_timer (0);
  413. addr = (FPWV *) (info->start[i]);
  414. *addr = INTEL_LOCKBIT; /* Sector lock bit */
  415. *addr = INTEL_PROTECT; /* set */
  416. while ((*addr & INTEL_FINISHED) !=
  417. INTEL_FINISHED) {
  418. if (get_timer (start) >
  419. CFG_FLASH_UNLOCK_TOUT) {
  420. printf ("Flash lock bit operation timed out\n");
  421. rc = 1;
  422. break;
  423. }
  424. }
  425. }
  426. }
  427. }
  428. if (flag)
  429. enable_interrupts ();
  430. *addr = INTEL_RESET; /* Reset to read array mode */
  431. return rc;
  432. }
  433. /*
  434. * This function gets the u-boot flash sector protection status
  435. * (flash_info_t.protect[]) in sync with the sector protection
  436. * status stored in hardware.
  437. */
  438. static void flash_sync_real_protect (flash_info_t * info)
  439. {
  440. int i;
  441. switch (info->flash_id & FLASH_TYPEMASK) {
  442. case FLASH_28F128J3A:
  443. for (i = 0; i < info->sector_count; ++i) {
  444. info->protect[i] = intel_sector_protected(info, i);
  445. }
  446. break;
  447. default:
  448. /* no h/w protect support */
  449. break;
  450. }
  451. }
  452. /*
  453. * checks if "sector" in bank "info" is protected. Should work on intel
  454. * strata flash chips 28FxxxJ3x in 8-bit mode.
  455. * Returns 1 if sector is protected (or timed-out while trying to read
  456. * protection status), 0 if it is not.
  457. */
  458. static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
  459. {
  460. FPWV *addr;
  461. FPWV *lock_conf_addr;
  462. ulong start;
  463. unsigned char ret;
  464. /*
  465. * first, wait for the WSM to be finished. The rationale for
  466. * waiting for the WSM to become idle for at most
  467. * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
  468. * because of: (1) erase, (2) program or (3) lock bit
  469. * configuration. So we just wait for the longest timeout of
  470. * the (1)-(3), i.e. the erase timeout.
  471. */
  472. /* wait at least 35ns (W12) before issuing Read Status Register */
  473. udelay(1);
  474. addr = (FPWV *) info->start[sector];
  475. *addr = (FPW) INTEL_STATUS;
  476. start = get_timer (0);
  477. while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
  478. if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
  479. *addr = (FPW) INTEL_RESET; /* restore read mode */
  480. printf("WSM busy too long, can't get prot status\n");
  481. return 1;
  482. }
  483. }
  484. /* issue the Read Identifier Codes command */
  485. *addr = (FPW) INTEL_READID;
  486. /* wait at least 35ns (W12) before reading */
  487. udelay(1);
  488. /* Intel example code uses offset of 4 for 8-bit flash */
  489. lock_conf_addr = (FPWV *) info->start[sector] + 4;
  490. ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
  491. /* put flash back in read mode */
  492. *addr = (FPW) INTEL_RESET;
  493. return ret;
  494. }