flash.c 24 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * Modified 4/5/2001
  25. * Wait for completion of each sector erase command issued
  26. * 4/5/2001
  27. * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
  28. */
  29. /*
  30. * Modified 3/7/2001
  31. * - adapted for pip405, Denis Peter, MPL AG Switzerland
  32. * TODO:
  33. * clean-up
  34. */
  35. #include <common.h>
  36. #if !defined(CONFIG_PATI)
  37. #include <ppc4xx.h>
  38. #include <asm/processor.h>
  39. #include "common_util.h"
  40. #if defined(CONFIG_MIP405)
  41. #include "../mip405/mip405.h"
  42. #endif
  43. #if defined(CONFIG_PIP405)
  44. #include "../pip405/pip405.h"
  45. #endif
  46. #include <asm/4xx_pci.h>
  47. #else /* defined(CONFIG_PATI) */
  48. #include <mpc5xx.h>
  49. #endif
  50. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  51. /*-----------------------------------------------------------------------
  52. * Functions
  53. */
  54. static ulong flash_get_size (vu_long *addr, flash_info_t *info);
  55. static int write_word (flash_info_t *info, ulong dest, ulong data);
  56. void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
  57. #define ADDR0 0x5555
  58. #define ADDR1 0x2aaa
  59. #define FLASH_WORD_SIZE unsigned short
  60. #define FALSE 0
  61. #define TRUE 1
  62. #if !defined(CONFIG_PATI)
  63. /*-----------------------------------------------------------------------
  64. * Some CS switching routines:
  65. *
  66. * On PIP/MIP405 we have 3 (4) possible boot mode
  67. *
  68. * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
  69. * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
  70. * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
  71. * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
  72. * The flash init is the first board specific routine which is called
  73. * after code relocation (running from SDRAM)
  74. * The first thing we do is to map the Flash CS to the Flash area and
  75. * the MPS CS to the MPS area. Since the flash size is unknown at this
  76. * point, we use the max flash size and the lowest flash address as base.
  77. *
  78. * After flash detection we adjust the size of the CS area accordingly.
  79. * The board_init_r will fill in wrong values in the board init structure,
  80. * but this will be fixed in the misc_init_r routine:
  81. * bd->bi_flashstart=0-flash_info[0].size
  82. * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
  83. * bd->bi_flashoffset=0
  84. *
  85. */
  86. int get_boot_mode(void)
  87. {
  88. unsigned long pbcr;
  89. int res = 0;
  90. pbcr = mfdcr (strap);
  91. if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
  92. /* boot via MPS or MPS mapping */
  93. res = BOOT_MPS;
  94. if(pbcr & PSR_ROM_LOC)
  95. /* boot via PCI.. */
  96. res |= BOOT_PCI;
  97. return res;
  98. }
  99. /* Map the flash high (in boot area)
  100. This code can only be executed from SDRAM (after relocation).
  101. */
  102. void setup_cs_reloc(void)
  103. {
  104. int mode;
  105. /* Since we are relocated, we can set-up the CS finaly
  106. * but first of all, switch off PCI mapping (in case it was a PCI boot) */
  107. out32r(PMM0MA,0L);
  108. icache_enable (); /* we are relocated */
  109. /* get boot mode */
  110. mode=get_boot_mode();
  111. /* we map the flash high in every case */
  112. /* first findout on which cs the flash is */
  113. if(mode & BOOT_MPS) {
  114. /* map flash high on CS1 and MPS on CS0 */
  115. mtdcr (ebccfga, pb0ap);
  116. mtdcr (ebccfgd, MPS_AP);
  117. mtdcr (ebccfga, pb0cr);
  118. mtdcr (ebccfgd, MPS_CR);
  119. /* we use the default values (max values) for the flash
  120. * because its real size is not yet known */
  121. mtdcr (ebccfga, pb1ap);
  122. mtdcr (ebccfgd, FLASH_AP);
  123. mtdcr (ebccfga, pb1cr);
  124. mtdcr (ebccfgd, FLASH_CR_B);
  125. }
  126. else {
  127. /* map flash high on CS0 and MPS on CS1 */
  128. mtdcr (ebccfga, pb1ap);
  129. mtdcr (ebccfgd, MPS_AP);
  130. mtdcr (ebccfga, pb1cr);
  131. mtdcr (ebccfgd, MPS_CR);
  132. /* we use the default values (max values) for the flash
  133. * because its real size is not yet known */
  134. mtdcr (ebccfga, pb0ap);
  135. mtdcr (ebccfgd, FLASH_AP);
  136. mtdcr (ebccfga, pb0cr);
  137. mtdcr (ebccfgd, FLASH_CR_B);
  138. }
  139. }
  140. #endif /* #if !defined(CONFIG_PATI) */
  141. unsigned long flash_init (void)
  142. {
  143. unsigned long size_b0;
  144. int i;
  145. #if !defined(CONFIG_PATI)
  146. unsigned long size_b1,flashcr,size_reg;
  147. int mode;
  148. extern char version_string;
  149. char *p = &version_string;
  150. /* Since we are relocated, we can set-up the CS finally */
  151. setup_cs_reloc();
  152. /* get and display boot mode */
  153. mode=get_boot_mode();
  154. if(mode & BOOT_PCI)
  155. printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
  156. "MPS" : "Flash");
  157. else
  158. printf("(%s Boot) ",(mode & BOOT_MPS) ?
  159. "MPS" : "Flash");
  160. #endif /* #if !defined(CONFIG_PATI) */
  161. /* Init: no FLASHes known */
  162. for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
  163. flash_info[i].flash_id = FLASH_UNKNOWN;
  164. }
  165. /* Static FLASH Bank configuration here - FIXME XXX */
  166. size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
  167. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  168. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
  169. size_b0, size_b0<<20);
  170. }
  171. /* protect the bootloader */
  172. /* Monitor protection ON by default */
  173. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  174. flash_protect(FLAG_PROTECT_SET,
  175. CFG_MONITOR_BASE,
  176. CFG_MONITOR_BASE+monitor_flash_len-1,
  177. &flash_info[0]);
  178. #endif
  179. #if !defined(CONFIG_PATI)
  180. /* protect reset vector */
  181. flash_info[0].protect[flash_info[0].sector_count-1] = 1;
  182. size_b1 = 0 ;
  183. flash_info[0].size = size_b0;
  184. /* set up flash cs according to the size */
  185. size_reg=(flash_info[0].size >>20);
  186. switch (size_reg) {
  187. case 0:
  188. case 1: i=0; break; /* <= 1MB */
  189. case 2: i=1; break; /* = 2MB */
  190. case 4: i=2; break; /* = 4MB */
  191. case 8: i=3; break; /* = 8MB */
  192. case 16: i=4; break; /* = 16MB */
  193. case 32: i=5; break; /* = 32MB */
  194. case 64: i=6; break; /* = 64MB */
  195. case 128: i=7; break; /*= 128MB */
  196. default:
  197. printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
  198. while(1);
  199. }
  200. if(mode & BOOT_MPS) {
  201. /* flash is on CS1 */
  202. mtdcr(ebccfga, pb1cr);
  203. flashcr = mfdcr (ebccfgd);
  204. /* we map the flash high in every case */
  205. flashcr&=0x0001FFFF; /* mask out address bits */
  206. flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
  207. flashcr|= (i << 17); /* size addr */
  208. mtdcr(ebccfga, pb1cr);
  209. mtdcr(ebccfgd, flashcr);
  210. }
  211. else {
  212. /* flash is on CS0 */
  213. mtdcr(ebccfga, pb0cr);
  214. flashcr = mfdcr (ebccfgd);
  215. /* we map the flash high in every case */
  216. flashcr&=0x0001FFFF; /* mask out address bits */
  217. flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
  218. flashcr|= (i << 17); /* size addr */
  219. mtdcr(ebccfga, pb0cr);
  220. mtdcr(ebccfgd, flashcr);
  221. }
  222. #if 0
  223. /* enable this (PIP405/MIP405 only) if you want to test if
  224. the relocation has be done ok.
  225. This will disable both Chipselects */
  226. mtdcr (ebccfga, pb0cr);
  227. mtdcr (ebccfgd, 0L);
  228. mtdcr (ebccfga, pb1cr);
  229. mtdcr (ebccfgd, 0L);
  230. printf("CS0 & CS1 switched off for test\n");
  231. #endif
  232. /* patch version_string */
  233. for(i=0;i<0x100;i++) {
  234. if(*p=='\n') {
  235. *p=0;
  236. break;
  237. }
  238. p++;
  239. }
  240. #else /* #if !defined(CONFIG_PATI) */
  241. #ifdef CONFIG_ENV_IS_IN_FLASH
  242. /* ENV protection ON by default */
  243. flash_protect(FLAG_PROTECT_SET,
  244. CFG_ENV_ADDR,
  245. CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
  246. &flash_info[0]);
  247. #endif
  248. #endif /* #if !defined(CONFIG_PATI) */
  249. return (size_b0);
  250. }
  251. /*-----------------------------------------------------------------------
  252. */
  253. void flash_print_info (flash_info_t *info)
  254. {
  255. int i;
  256. int k;
  257. int size;
  258. int erased;
  259. volatile unsigned long *flash;
  260. if (info->flash_id == FLASH_UNKNOWN) {
  261. printf ("missing or unknown FLASH type\n");
  262. return;
  263. }
  264. switch (info->flash_id & FLASH_VENDMASK) {
  265. case FLASH_MAN_AMD: printf ("AMD "); break;
  266. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  267. case FLASH_MAN_SST: printf ("SST "); break;
  268. case FLASH_MAN_INTEL: printf ("Intel "); break;
  269. default: printf ("Unknown Vendor "); break;
  270. }
  271. switch (info->flash_id & FLASH_TYPEMASK) {
  272. case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
  273. break;
  274. case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
  275. break;
  276. case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
  277. break;
  278. case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
  279. break;
  280. case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
  281. break;
  282. case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
  283. break;
  284. case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
  285. break;
  286. case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
  287. break;
  288. case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
  289. break;
  290. case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
  291. break;
  292. case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
  293. break;
  294. case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
  295. break;
  296. case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
  297. break;
  298. default: printf ("Unknown Chip Type\n");
  299. break;
  300. }
  301. printf (" Size: %ld KB in %d Sectors\n",
  302. info->size >> 10, info->sector_count);
  303. printf (" Sector Start Addresses:");
  304. for (i=0; i<info->sector_count; ++i) {
  305. /*
  306. * Check if whole sector is erased
  307. */
  308. if (i != (info->sector_count-1))
  309. size = info->start[i+1] - info->start[i];
  310. else
  311. size = info->start[0] + info->size - info->start[i];
  312. erased = 1;
  313. flash = (volatile unsigned long *)info->start[i];
  314. size = size >> 2; /* divide by 4 for longword access */
  315. for (k=0; k<size; k++) {
  316. if (*flash++ != 0xffffffff) {
  317. erased = 0;
  318. break;
  319. }
  320. }
  321. if ((i % 5) == 0)
  322. printf ("\n ");
  323. printf (" %08lX%s%s",
  324. info->start[i],
  325. erased ? " E" : " ",
  326. info->protect[i] ? "RO " : " ");
  327. }
  328. printf ("\n");
  329. }
  330. /*-----------------------------------------------------------------------
  331. */
  332. /*-----------------------------------------------------------------------
  333. */
  334. /*
  335. * The following code cannot be run from FLASH!
  336. */
  337. static ulong flash_get_size (vu_long *addr, flash_info_t *info)
  338. {
  339. short i;
  340. FLASH_WORD_SIZE value;
  341. ulong base;
  342. volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
  343. /* Write auto select command: read Manufacturer ID */
  344. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  345. addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  346. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
  347. value = addr2[0];
  348. /* printf("flash_get_size value: %x\n",value); */
  349. switch (value) {
  350. case (FLASH_WORD_SIZE)AMD_MANUFACT:
  351. info->flash_id = FLASH_MAN_AMD;
  352. break;
  353. case (FLASH_WORD_SIZE)FUJ_MANUFACT:
  354. info->flash_id = FLASH_MAN_FUJ;
  355. break;
  356. case (FLASH_WORD_SIZE)INTEL_MANUFACT:
  357. info->flash_id = FLASH_MAN_INTEL;
  358. break;
  359. case (FLASH_WORD_SIZE)SST_MANUFACT:
  360. info->flash_id = FLASH_MAN_SST;
  361. break;
  362. default:
  363. info->flash_id = FLASH_UNKNOWN;
  364. info->sector_count = 0;
  365. info->size = 0;
  366. return (0); /* no or unknown flash */
  367. }
  368. value = addr2[1]; /* device ID */
  369. /* printf("Device value %x\n",value); */
  370. switch (value) {
  371. case (FLASH_WORD_SIZE)AMD_ID_F040B:
  372. info->flash_id += FLASH_AM040;
  373. info->sector_count = 8;
  374. info->size = 0x0080000; /* => 512 ko */
  375. break;
  376. case (FLASH_WORD_SIZE)AMD_ID_LV400T:
  377. info->flash_id += FLASH_AM400T;
  378. info->sector_count = 11;
  379. info->size = 0x00080000;
  380. break; /* => 0.5 MB */
  381. case (FLASH_WORD_SIZE)AMD_ID_LV400B:
  382. info->flash_id += FLASH_AM400B;
  383. info->sector_count = 11;
  384. info->size = 0x00080000;
  385. break; /* => 0.5 MB */
  386. case (FLASH_WORD_SIZE)AMD_ID_LV800T:
  387. info->flash_id += FLASH_AM800T;
  388. info->sector_count = 19;
  389. info->size = 0x00100000;
  390. break; /* => 1 MB */
  391. case (FLASH_WORD_SIZE)AMD_ID_LV800B:
  392. info->flash_id += FLASH_AM800B;
  393. info->sector_count = 19;
  394. info->size = 0x00100000;
  395. break; /* => 1 MB */
  396. case (FLASH_WORD_SIZE)AMD_ID_LV160T:
  397. info->flash_id += FLASH_AM160T;
  398. info->sector_count = 35;
  399. info->size = 0x00200000;
  400. break; /* => 2 MB */
  401. case (FLASH_WORD_SIZE)AMD_ID_LV160B:
  402. info->flash_id += FLASH_AM160B;
  403. info->sector_count = 35;
  404. info->size = 0x00200000;
  405. break; /* => 2 MB */
  406. case (FLASH_WORD_SIZE)AMD_ID_LV320T:
  407. info->flash_id += FLASH_AM320T;
  408. info->sector_count = 67;
  409. info->size = 0x00400000;
  410. break; /* => 4 MB */
  411. case (FLASH_WORD_SIZE)AMD_ID_LV640U:
  412. info->flash_id += FLASH_AM640U;
  413. info->sector_count = 128;
  414. info->size = 0x00800000;
  415. break; /* => 8 MB */
  416. #if 0 /* enable when device IDs are available */
  417. case (FLASH_WORD_SIZE)AMD_ID_LV320B:
  418. info->flash_id += FLASH_AM320B;
  419. info->sector_count = 67;
  420. info->size = 0x00400000;
  421. break; /* => 4 MB */
  422. #endif
  423. case (FLASH_WORD_SIZE)SST_ID_xF800A:
  424. info->flash_id += FLASH_SST800A;
  425. info->sector_count = 16;
  426. info->size = 0x00100000;
  427. break; /* => 1 MB */
  428. case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
  429. info->flash_id += FLASH_INTEL320T;
  430. info->sector_count = 71;
  431. info->size = 0x00400000;
  432. break; /* => 4 MB */
  433. case (FLASH_WORD_SIZE)SST_ID_xF160A:
  434. info->flash_id += FLASH_SST160A;
  435. info->sector_count = 32;
  436. info->size = 0x00200000;
  437. break; /* => 2 MB */
  438. default:
  439. info->flash_id = FLASH_UNKNOWN;
  440. return (0); /* => no or unknown flash */
  441. }
  442. /* base address calculation */
  443. base=0-info->size;
  444. /* set up sector start address table */
  445. if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
  446. (info->flash_id == FLASH_AM040) ||
  447. (info->flash_id == FLASH_AM640U)){
  448. for (i = 0; i < info->sector_count; i++)
  449. info->start[i] = base + (i * 0x00010000);
  450. }
  451. else {
  452. if (info->flash_id & FLASH_BTYPE) {
  453. /* set sector offsets for bottom boot block type */
  454. info->start[0] = base + 0x00000000;
  455. info->start[1] = base + 0x00004000;
  456. info->start[2] = base + 0x00006000;
  457. info->start[3] = base + 0x00008000;
  458. for (i = 4; i < info->sector_count; i++)
  459. info->start[i] = base + (i * 0x00010000) - 0x00030000;
  460. }
  461. else {
  462. /* set sector offsets for top boot block type */
  463. i = info->sector_count - 1;
  464. if(info->sector_count==71) {
  465. info->start[i--] = base + info->size - 0x00002000;
  466. info->start[i--] = base + info->size - 0x00004000;
  467. info->start[i--] = base + info->size - 0x00006000;
  468. info->start[i--] = base + info->size - 0x00008000;
  469. info->start[i--] = base + info->size - 0x0000A000;
  470. info->start[i--] = base + info->size - 0x0000C000;
  471. info->start[i--] = base + info->size - 0x0000E000;
  472. for (; i >= 0; i--)
  473. info->start[i] = base + i * 0x000010000;
  474. }
  475. else {
  476. info->start[i--] = base + info->size - 0x00004000;
  477. info->start[i--] = base + info->size - 0x00006000;
  478. info->start[i--] = base + info->size - 0x00008000;
  479. for (; i >= 0; i--)
  480. info->start[i] = base + i * 0x00010000;
  481. }
  482. }
  483. }
  484. /* check for protected sectors */
  485. for (i = 0; i < info->sector_count; i++) {
  486. /* read sector protection at sector address, (A7 .. A0) = 0x02 */
  487. /* D0 = 1 if protected */
  488. addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
  489. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  490. info->protect[i] = 0;
  491. else
  492. info->protect[i] = addr2[2] & 1;
  493. }
  494. /*
  495. * Prevent writes to uninitialized FLASH.
  496. */
  497. if (info->flash_id != FLASH_UNKNOWN) {
  498. addr2 = (FLASH_WORD_SIZE *)info->start[0];
  499. *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
  500. }
  501. return (info->size);
  502. }
  503. int wait_for_DQ7(flash_info_t *info, int sect)
  504. {
  505. ulong start, now, last;
  506. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
  507. start = get_timer (0);
  508. last = start;
  509. while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
  510. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  511. printf ("Timeout\n");
  512. return ERR_TIMOUT;
  513. }
  514. /* show that we're waiting */
  515. if ((now - last) > 1000) { /* every second */
  516. putc ('.');
  517. last = now;
  518. }
  519. }
  520. return ERR_OK;
  521. }
  522. int intel_wait_for_DQ7(flash_info_t *info, int sect)
  523. {
  524. ulong start, now, last, status;
  525. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
  526. start = get_timer (0);
  527. last = start;
  528. while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
  529. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  530. printf ("Timeout\n");
  531. return ERR_TIMOUT;
  532. }
  533. /* show that we're waiting */
  534. if ((now - last) > 1000) { /* every second */
  535. putc ('.');
  536. last = now;
  537. }
  538. }
  539. status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
  540. /* clear status register */
  541. addr[0] = (FLASH_WORD_SIZE)0x00500050;
  542. /* check status for block erase fail and VPP low */
  543. return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
  544. }
  545. /*-----------------------------------------------------------------------
  546. */
  547. int flash_erase (flash_info_t *info, int s_first, int s_last)
  548. {
  549. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
  550. volatile FLASH_WORD_SIZE *addr2;
  551. int flag, prot, sect, l_sect;
  552. int i, rcode = 0;
  553. if ((s_first < 0) || (s_first > s_last)) {
  554. if (info->flash_id == FLASH_UNKNOWN) {
  555. printf ("- missing\n");
  556. } else {
  557. printf ("- no sectors to erase\n");
  558. }
  559. return 1;
  560. }
  561. if (info->flash_id == FLASH_UNKNOWN) {
  562. printf ("Can't erase unknown flash type - aborted\n");
  563. return 1;
  564. }
  565. prot = 0;
  566. for (sect=s_first; sect<=s_last; ++sect) {
  567. if (info->protect[sect]) {
  568. prot++;
  569. }
  570. }
  571. if (prot) {
  572. printf ("- Warning: %d protected sectors will not be erased!\n",
  573. prot);
  574. } else {
  575. printf ("\n");
  576. }
  577. l_sect = -1;
  578. /* Disable interrupts which might cause a timeout here */
  579. flag = disable_interrupts();
  580. /* Start erase on unprotected sectors */
  581. for (sect = s_first; sect<=s_last; sect++) {
  582. if (info->protect[sect] == 0) { /* not protected */
  583. addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
  584. /* printf("Erasing sector %p\n", addr2); */ /* CLH */
  585. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
  586. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  587. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  588. addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
  589. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  590. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  591. addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
  592. for (i=0; i<50; i++)
  593. udelay(1000); /* wait 1 ms */
  594. rcode |= wait_for_DQ7(info, sect);
  595. }
  596. else {
  597. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  598. addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
  599. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
  600. intel_wait_for_DQ7(info, sect);
  601. addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
  602. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
  603. rcode |= intel_wait_for_DQ7(info, sect);
  604. }
  605. else {
  606. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  607. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  608. addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
  609. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  610. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  611. addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
  612. rcode |= wait_for_DQ7(info, sect);
  613. }
  614. }
  615. l_sect = sect;
  616. /*
  617. * Wait for each sector to complete, it's more
  618. * reliable. According to AMD Spec, you must
  619. * issue all erase commands within a specified
  620. * timeout. This has been seen to fail, especially
  621. * if printf()s are included (for debug)!!
  622. */
  623. /* wait_for_DQ7(info, sect); */
  624. }
  625. }
  626. /* re-enable interrupts if necessary */
  627. if (flag)
  628. enable_interrupts();
  629. /* wait at least 80us - let's wait 1 ms */
  630. udelay (1000);
  631. #if 0
  632. /*
  633. * We wait for the last triggered sector
  634. */
  635. if (l_sect < 0)
  636. goto DONE;
  637. wait_for_DQ7(info, l_sect);
  638. DONE:
  639. #endif
  640. /* reset to read mode */
  641. addr = (FLASH_WORD_SIZE *)info->start[0];
  642. addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
  643. if (!rcode)
  644. printf (" done\n");
  645. return rcode;
  646. }
  647. void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
  648. {
  649. int i;
  650. volatile FLASH_WORD_SIZE *addr2;
  651. long c;
  652. c= (long)cnt;
  653. for(i=info->sector_count-1;i>0;i--)
  654. {
  655. if(addr>=info->start[i])
  656. break;
  657. }
  658. do {
  659. addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
  660. addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
  661. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
  662. intel_wait_for_DQ7(info, i);
  663. i++;
  664. c-=(info->start[i]-info->start[i-1]);
  665. }while(c>0);
  666. }
  667. /*-----------------------------------------------------------------------
  668. * Copy memory to flash, returns:
  669. * 0 - OK
  670. * 1 - write timeout
  671. * 2 - Flash not erased
  672. */
  673. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  674. {
  675. ulong cp, wp, data;
  676. int i, l, rc;
  677. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  678. unlock_intel_sectors(info,addr,cnt);
  679. }
  680. wp = (addr & ~3); /* get lower word aligned address */
  681. /*
  682. * handle unaligned start bytes
  683. */
  684. if ((l = addr - wp) != 0) {
  685. data = 0;
  686. for (i=0, cp=wp; i<l; ++i, ++cp) {
  687. data = (data << 8) | (*(uchar *)cp);
  688. }
  689. for (; i<4 && cnt>0; ++i) {
  690. data = (data << 8) | *src++;
  691. --cnt;
  692. ++cp;
  693. }
  694. for (; cnt==0 && i<4; ++i, ++cp) {
  695. data = (data << 8) | (*(uchar *)cp);
  696. }
  697. if ((rc = write_word(info, wp, data)) != 0) {
  698. return (rc);
  699. }
  700. wp += 4;
  701. }
  702. /*
  703. * handle word aligned part
  704. */
  705. while (cnt >= 4) {
  706. data = 0;
  707. for (i=0; i<4; ++i) {
  708. data = (data << 8) | *src++;
  709. }
  710. if ((rc = write_word(info, wp, data)) != 0) {
  711. return (rc);
  712. }
  713. wp += 4;
  714. if((wp % 0x10000)==0)
  715. printf("."); /* show Progress */
  716. cnt -= 4;
  717. }
  718. if (cnt == 0) {
  719. return (0);
  720. }
  721. /*
  722. * handle unaligned tail bytes
  723. */
  724. data = 0;
  725. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  726. data = (data << 8) | *src++;
  727. --cnt;
  728. }
  729. for (; i<4; ++i, ++cp) {
  730. data = (data << 8) | (*(uchar *)cp);
  731. }
  732. rc=write_word(info, wp, data);
  733. return rc;
  734. }
  735. /*-----------------------------------------------------------------------
  736. * Write a word to Flash, returns:
  737. * 0 - OK
  738. * 1 - write timeout
  739. * 2 - Flash not erased
  740. */
  741. static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
  742. static int write_word (flash_info_t *info, ulong dest, ulong data)
  743. {
  744. volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
  745. volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
  746. volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
  747. ulong start;
  748. int flag;
  749. int i;
  750. /* Check if Flash is (sufficiently) erased */
  751. if ((*((volatile FLASH_WORD_SIZE *)dest) &
  752. (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
  753. return (2);
  754. }
  755. /* Disable interrupts which might cause a timeout here */
  756. flag = disable_interrupts();
  757. for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
  758. {
  759. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  760. /* intel style writting */
  761. dest2[i] = (FLASH_WORD_SIZE)0x00500050;
  762. dest2[i] = (FLASH_WORD_SIZE)0x00400040;
  763. *read_val++ = data2[i];
  764. dest2[i] = data2[i];
  765. if (flag)
  766. enable_interrupts();
  767. /* data polling for D7 */
  768. start = get_timer (0);
  769. udelay(10);
  770. while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
  771. {
  772. if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
  773. return (1);
  774. }
  775. dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
  776. udelay(10);
  777. dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
  778. if(dest2[i]!=data2[i])
  779. printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
  780. }
  781. else {
  782. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  783. addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  784. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
  785. dest2[i] = data2[i];
  786. /* re-enable interrupts if necessary */
  787. if (flag)
  788. enable_interrupts();
  789. /* data polling for D7 */
  790. start = get_timer (0);
  791. while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
  792. (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
  793. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  794. return (1);
  795. }
  796. }
  797. }
  798. }
  799. return (0);
  800. }
  801. /*-----------------------------------------------------------------------
  802. */