flash.c 21 KB

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  1. /*
  2. * (C) Copyright 2003 Motorola Inc.
  3. * Xianghua Xiao,(X.Xiao@motorola.com)
  4. *
  5. * (C) Copyright 2000, 2001
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. *
  8. * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
  9. * Add support the Sharp chips on the mpc8260ads.
  10. * I started with board/ip860/flash.c and made changes I found in
  11. * the MTD project by David Schleef.
  12. *
  13. * See file CREDITS for list of people who contributed to this
  14. * project.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2 of
  19. * the License, or (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29. * MA 02111-1307 USA
  30. */
  31. #include <common.h>
  32. #if !defined(CFG_NO_FLASH)
  33. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  34. #if defined(CONFIG_ENV_IS_IN_FLASH)
  35. # ifndef CFG_ENV_ADDR
  36. # define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
  37. # endif
  38. # ifndef CFG_ENV_SIZE
  39. # define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
  40. # endif
  41. # ifndef CFG_ENV_SECT_SIZE
  42. # define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
  43. # endif
  44. #endif
  45. /*
  46. * The variable should be in the flash info structure. Since it
  47. * is only used in this board specific file it is declared here.
  48. * In the future I think an endian flag should be part of the
  49. * flash_info_t structure. (Ron Alder)
  50. */
  51. static ulong big_endian = 0;
  52. /*-----------------------------------------------------------------------
  53. * Functions
  54. */
  55. static ulong flash_get_size (vu_long *addr, flash_info_t *info);
  56. static int write_block (flash_info_t *info, uchar * src, ulong dest, ulong cnt);
  57. static int write_short (flash_info_t *info, ulong dest, ushort data);
  58. static int write_word (flash_info_t *info, ulong dest, ulong data);
  59. static int clear_block_lock_bit(flash_info_t *info, vu_long * addr);
  60. /*-----------------------------------------------------------------------
  61. */
  62. unsigned long flash_init (void)
  63. {
  64. unsigned long size;
  65. int i;
  66. /* Init: enable write,
  67. * or we cannot even write flash commands
  68. */
  69. for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
  70. flash_info[i].flash_id = FLASH_UNKNOWN;
  71. /* set the default sector offset */
  72. }
  73. /* Static FLASH Bank configuration here - FIXME XXX */
  74. size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
  75. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  76. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
  77. size, size<<20);
  78. }
  79. /* Re-do sizing to get full correct info */
  80. size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
  81. flash_info[0].size = size;
  82. #if !defined(CONFIG_RAM_AS_FLASH)
  83. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  84. /* monitor protection ON by default */
  85. flash_protect(FLAG_PROTECT_SET,
  86. CFG_MONITOR_BASE,
  87. CFG_MONITOR_BASE+monitor_flash_len-1,
  88. &flash_info[0]);
  89. #endif
  90. #ifdef CONFIG_ENV_IS_IN_FLASH
  91. /* ENV protection ON by default */
  92. flash_protect(FLAG_PROTECT_SET,
  93. CFG_ENV_ADDR,
  94. CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
  95. &flash_info[0]);
  96. #endif
  97. #endif
  98. return (size);
  99. }
  100. /*-----------------------------------------------------------------------
  101. */
  102. void flash_print_info (flash_info_t *info)
  103. {
  104. int i;
  105. if (info->flash_id == FLASH_UNKNOWN) {
  106. printf ("missing or unknown FLASH type\n");
  107. return;
  108. }
  109. switch (info->flash_id & FLASH_VENDMASK) {
  110. case FLASH_MAN_INTEL: printf ("Intel "); break;
  111. case FLASH_MAN_SHARP: printf ("Sharp "); break;
  112. default: printf ("Unknown Vendor "); break;
  113. }
  114. switch (info->flash_id & FLASH_TYPEMASK) {
  115. case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
  116. break;
  117. case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
  118. break;
  119. case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
  120. break;
  121. case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n");
  122. break;
  123. case FLASH_28F640J3A: printf ("28F640J3A (64 Mbit, 64 x 128K)\n");
  124. break;
  125. default: printf ("Unknown Chip Type\n");
  126. break;
  127. }
  128. printf (" Size: %ld MB in %d Sectors\n",
  129. info->size >> 20, info->sector_count);
  130. printf (" Sector Start Addresses:");
  131. for (i=0; i<info->sector_count; ++i) {
  132. if ((i % 5) == 0)
  133. printf ("\n ");
  134. printf (" %08lX%s",
  135. info->start[i],
  136. info->protect[i] ? " (RO)" : " "
  137. );
  138. }
  139. printf ("\n");
  140. }
  141. /* only deal with 16 bit and 32 bit port width, 16bit chip */
  142. static ulong flash_get_size (vu_long *addr, flash_info_t *info)
  143. {
  144. short i;
  145. ulong value,va,vb,vc,vd;
  146. ulong base = (ulong)addr;
  147. ulong sector_offset;
  148. #ifdef DEBUG
  149. printf("Check flash at 0x%08x\n",(uint)addr);
  150. #endif
  151. /* Write "Intelligent Identifier" command: read Manufacturer ID */
  152. *addr = 0x90909090;
  153. udelay(20);
  154. asm("sync");
  155. #ifndef CFG_FLASH_CFI
  156. printf("Not define CFG_FLASH_CFI\n");
  157. return (0);
  158. #else
  159. value = addr[0];
  160. va=(value & 0xFF000000)>>24;
  161. vb=(value & 0x00FF0000)>>16;
  162. vc=(value & 0x0000FF00)>>8;
  163. vd=(value & 0x000000FF);
  164. if ((va==0) && (vb==0)) {
  165. printf("cannot identify Flash\n");
  166. info->flash_id = FLASH_UNKNOWN;
  167. info->sector_count = 0;
  168. info->size = 0;
  169. return (0); /* no or unknown flash */
  170. }
  171. else if ((va==0) && (vb!=0)) {
  172. big_endian = 1;
  173. info->chipwidth = FLASH_CFI_BY16;
  174. if(vb == vd) info->portwidth = FLASH_CFI_32BIT;
  175. else info->portwidth = FLASH_CFI_16BIT;
  176. }
  177. else if ((va!=0) && (vb==0)) {
  178. big_endian = 0;
  179. info->chipwidth = FLASH_CFI_BY16;
  180. if(va == vc) info->portwidth = FLASH_CFI_32BIT;
  181. else info->portwidth = FLASH_CFI_16BIT;
  182. }
  183. else if ((va!=0) && (vb!=0)) {
  184. big_endian = 1; /* no meaning for 8bit chip */
  185. info->chipwidth = FLASH_CFI_BY8;
  186. if(va == vb) info->portwidth = FLASH_CFI_16BIT;
  187. else info->portwidth = FLASH_CFI_8BIT;
  188. }
  189. #ifdef DEBUG
  190. switch (info->portwidth) {
  191. case FLASH_CFI_8BIT:
  192. printf("port width is 8 bit.\n");
  193. break;
  194. case FLASH_CFI_16BIT:
  195. printf("port width is 16 bit, ");
  196. break;
  197. case FLASH_CFI_32BIT:
  198. printf("port width is 32 bit, ");
  199. break;
  200. }
  201. switch (info->chipwidth) {
  202. case FLASH_CFI_BY16:
  203. printf("chip width is 16 bit, ");
  204. switch (big_endian) {
  205. case 0:
  206. printf("Little Endian.\n");
  207. break;
  208. case 1:
  209. printf("Big Endian.\n");
  210. break;
  211. }
  212. break;
  213. }
  214. #endif
  215. #endif /*#ifdef CFG_FLASH_CFI*/
  216. if (big_endian==0) value = (addr[0] & 0xFF000000) >>8;
  217. else value = (addr[0] & 0x00FF0000);
  218. #ifdef DEBUG
  219. printf("manufacturer=0x%x\n",(uint)(value>>16));
  220. #endif
  221. switch (value) {
  222. case MT_MANUFACT & 0xFFFF0000: /* SHARP, MT or => Intel */
  223. case INTEL_ALT_MANU & 0xFFFF0000:
  224. info->flash_id = FLASH_MAN_INTEL;
  225. break;
  226. default:
  227. printf("unknown manufacturer: %x\n", (unsigned int)value);
  228. info->flash_id = FLASH_UNKNOWN;
  229. info->sector_count = 0;
  230. info->size = 0;
  231. return (0); /* no or unknown flash */
  232. }
  233. if (info->portwidth==FLASH_CFI_16BIT) {
  234. switch (big_endian) {
  235. case 0:
  236. value = (addr[0] & 0x0000FF00)>>8;
  237. break;
  238. case 1:
  239. value = (addr[0] & 0x000000FF);
  240. break;
  241. }
  242. }
  243. else if (info->portwidth == FLASH_CFI_32BIT) {
  244. switch (big_endian) {
  245. case 0:
  246. value = (addr[1] & 0x0000FF00)>>8;
  247. break;
  248. case 1:
  249. value = (addr[1] & 0x000000FF);
  250. break;
  251. }
  252. }
  253. #ifdef DEBUG
  254. printf("deviceID=0x%x\n",(uint)value);
  255. #endif
  256. switch (value) {
  257. case (INTEL_ID_28F016S & 0x0000FFFF):
  258. info->flash_id += FLASH_28F016SV;
  259. info->sector_count = 32;
  260. sector_offset = 0x10000;
  261. break; /* => 2 MB */
  262. case (INTEL_ID_28F160S3 & 0x0000FFFF):
  263. info->flash_id += FLASH_28F160S3;
  264. info->sector_count = 32;
  265. sector_offset = 0x10000;
  266. break; /* => 2 MB */
  267. case (INTEL_ID_28F320S3 & 0x0000FFFF):
  268. info->flash_id += FLASH_28F320S3;
  269. info->sector_count = 64;
  270. sector_offset = 0x10000;
  271. break; /* => 4 MB */
  272. case (INTEL_ID_28F640J3A & 0x0000FFFF):
  273. info->flash_id += FLASH_28F640J3A;
  274. info->sector_count = 64;
  275. sector_offset = 0x20000;
  276. break; /* => 8 MB */
  277. case SHARP_ID_28F016SCL & 0x0000FFFF:
  278. case SHARP_ID_28F016SCZ & 0x0000FFFF:
  279. info->flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT;
  280. info->sector_count = 32;
  281. sector_offset = 0x10000;
  282. break; /* => 2 MB */
  283. default:
  284. info->flash_id = FLASH_UNKNOWN;
  285. return (0); /* => no or unknown flash */
  286. }
  287. sector_offset = sector_offset * (info->portwidth / info->chipwidth);
  288. info->size = info->sector_count * sector_offset;
  289. /* set up sector start address table */
  290. for (i = 0; i < info->sector_count; i++) {
  291. info->start[i] = base;
  292. base += sector_offset;
  293. /* don't know how to check sector protection */
  294. info->protect[i] = 0;
  295. }
  296. /*
  297. * Prevent writes to uninitialized FLASH.
  298. */
  299. if (info->flash_id != FLASH_UNKNOWN) {
  300. addr = (vu_long *)info->start[0];
  301. *addr = 0xFFFFFF; /* reset bank to read array mode */
  302. asm("sync");
  303. }
  304. return (info->size);
  305. }
  306. /*-----------------------------------------------------------------------
  307. */
  308. int flash_erase (flash_info_t *info, int s_first, int s_last)
  309. {
  310. int flag, prot, sect;
  311. ulong start, now, last, ready, erase_err_status;
  312. if (big_endian == 1) {
  313. ready = 0x0080;
  314. erase_err_status = 0x00a0;
  315. }
  316. else {
  317. ready = 0x8000;
  318. erase_err_status = 0xa000;
  319. }
  320. if ((info->portwidth / info->chipwidth)==2) {
  321. ready += (ready <<16);
  322. erase_err_status += (erase_err_status <<16);
  323. }
  324. #ifdef DEBUG
  325. printf ("\nReady flag is 0x%lx\nErase error flag is 0x%lx", ready, erase_err_status);
  326. #endif
  327. if ((s_first < 0) || (s_first > s_last)) {
  328. if (info->flash_id == FLASH_UNKNOWN) {
  329. printf ("- missing\n");
  330. } else {
  331. printf ("- no sectors to erase\n");
  332. }
  333. return 1;
  334. }
  335. if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
  336. && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
  337. printf ("Can't erase unknown flash type %08lx - aborted\n",
  338. info->flash_id);
  339. return 1;
  340. }
  341. prot = 0;
  342. for (sect=s_first; sect<=s_last; ++sect) {
  343. if (info->protect[sect]) {
  344. prot++;
  345. }
  346. }
  347. if (prot) {
  348. printf ("- Warning: %d protected sectors will not be erased!\n",
  349. prot);
  350. } else {
  351. printf ("\n");
  352. }
  353. #ifdef DEBUG
  354. printf("\nFlash Erase:\n");
  355. #endif
  356. /* Make Sure Block Lock Bit is not set. */
  357. if(clear_block_lock_bit(info, (vu_long *)(info->start[s_first]))){
  358. return 1;
  359. }
  360. /* Start erase on unprotected sectors */
  361. #if defined(DEBUG)
  362. printf("Begin to erase now,s_first=0x%x s_last=0x%x...\n",s_first,s_last);
  363. #endif
  364. for (sect = s_first; sect<=s_last; sect++) {
  365. if (info->protect[sect] == 0) { /* not protected */
  366. vu_short *addr16 = (vu_short *)(info->start[sect]);
  367. vu_long *addr = (vu_long *)(info->start[sect]);
  368. printf(".");
  369. switch (info->portwidth) {
  370. case FLASH_CFI_16BIT:
  371. asm("sync");
  372. last = start = get_timer (0);
  373. /* Disable interrupts which might cause a timeout here */
  374. flag = disable_interrupts();
  375. /* Reset Array */
  376. *addr16 = 0xffff;
  377. asm("sync");
  378. /* Clear Status Register */
  379. *addr16 = 0x5050;
  380. asm("sync");
  381. /* Single Block Erase Command */
  382. *addr16 = 0x2020;
  383. asm("sync");
  384. /* Confirm */
  385. *addr16 = 0xD0D0;
  386. asm("sync");
  387. if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
  388. /* Resume Command, as per errata update */
  389. *addr16 = 0xD0D0;
  390. asm("sync");
  391. }
  392. /* re-enable interrupts if necessary */
  393. if (flag)
  394. enable_interrupts();
  395. /* wait at least 80us - let's wait 1 ms */
  396. *addr16 = 0x7070;
  397. udelay (1000);
  398. while ((*addr16 & ready) != ready) {
  399. if((*addr16 & erase_err_status)== erase_err_status){
  400. printf("Error in Block Erase - Lock Bit may be set!\n");
  401. printf("Status Register = 0x%X\n", (uint)*addr16);
  402. *addr16 = 0xFFFF; /* reset bank */
  403. asm("sync");
  404. return 1;
  405. }
  406. if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  407. printf ("Timeout\n");
  408. *addr16 = 0xFFFF; /* reset bank */
  409. asm("sync");
  410. return 1;
  411. }
  412. /* show that we're waiting */
  413. if ((now - last) > 1000) { /* every second */
  414. putc ('.');
  415. last = now;
  416. }
  417. }
  418. /* reset to read mode */
  419. *addr16 = 0xFFFF;
  420. asm("sync");
  421. break;
  422. case FLASH_CFI_32BIT:
  423. asm("sync");
  424. last = start = get_timer (0);
  425. /* Disable interrupts which might cause a timeout here */
  426. flag = disable_interrupts();
  427. /* Reset Array */
  428. *addr = 0xffffffff;
  429. asm("sync");
  430. /* Clear Status Register */
  431. *addr = 0x50505050;
  432. asm("sync");
  433. /* Single Block Erase Command */
  434. *addr = 0x20202020;
  435. asm("sync");
  436. /* Confirm */
  437. *addr = 0xD0D0D0D0;
  438. asm("sync");
  439. if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
  440. /* Resume Command, as per errata update */
  441. *addr = 0xD0D0D0D0;
  442. asm("sync");
  443. }
  444. /* re-enable interrupts if necessary */
  445. if (flag)
  446. enable_interrupts();
  447. /* wait at least 80us - let's wait 1 ms */
  448. *addr = 0x70707070;
  449. udelay (1000);
  450. while ((*addr & ready) != ready) {
  451. if((*addr & erase_err_status)==erase_err_status){
  452. printf("Error in Block Erase - Lock Bit may be set!\n");
  453. printf("Status Register = 0x%X\n", (uint)*addr);
  454. *addr = 0xFFFFFFFF; /* reset bank */
  455. asm("sync");
  456. return 1;
  457. }
  458. if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  459. printf ("Timeout\n");
  460. *addr = 0xFFFFFFFF; /* reset bank */
  461. asm("sync");
  462. return 1;
  463. }
  464. /* show that we're waiting */
  465. if ((now - last) > 1000) { /* every second */
  466. putc ('.');
  467. last = now;
  468. }
  469. }
  470. /* reset to read mode */
  471. *addr = 0xFFFFFFFF;
  472. asm("sync");
  473. break;
  474. } /* end switch */
  475. } /* end if */
  476. } /* end for */
  477. printf ("flash erase done\n");
  478. return 0;
  479. }
  480. /*-----------------------------------------------------------------------
  481. * Copy memory to flash, returns:
  482. * 0 - OK
  483. * 1 - write timeout
  484. * 2 - Flash not erased
  485. */
  486. #define FLASH_BLOCK_SIZE 32
  487. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  488. {
  489. ulong cp, wp, data, count, temp;
  490. /* ulong temp[FLASH_BLOCK_SIZE/4];*/
  491. int i, l, rc;
  492. count = cnt;
  493. wp = (addr & ~3); /* get lower word aligned address */
  494. /*
  495. * handle unaligned start bytes
  496. */
  497. if ((l = addr - wp) != 0) {
  498. data = 0;
  499. for (i=0, cp=wp; i<l; ++i, ++cp) {
  500. data = (data << 8) | (*(uchar *)cp);
  501. }
  502. for (; i<4 && cnt>0; ++i) {
  503. data = (data << 8) | *src++;
  504. --cnt;
  505. ++cp;
  506. }
  507. for (; cnt==0 && i<4; ++i, ++cp) {
  508. data = (data << 8) | (*(uchar *)cp);
  509. }
  510. if ((rc = write_word(info, wp, data)) != 0) {
  511. return (rc);
  512. }
  513. wp += 4;
  514. }
  515. cp = wp;
  516. /* handle unaligned block bytes , flash block size = 16bytes */
  517. wp = (cp+FLASH_BLOCK_SIZE-1) & ~(FLASH_BLOCK_SIZE-1);
  518. if ((wp-cp)>=cnt) {
  519. if ((rc = write_block(info,src,cp,wp-cp)) !=0)
  520. return (rc);
  521. src += wp-cp;
  522. cnt -= wp-cp;
  523. }
  524. /* handle aligned block bytes */
  525. temp = 0;
  526. printf("\n");
  527. while ( cnt >= FLASH_BLOCK_SIZE) {
  528. if ((rc = write_block(info,src,cp,FLASH_BLOCK_SIZE)) !=0) {
  529. return (rc);
  530. }
  531. src += FLASH_BLOCK_SIZE;
  532. cp += FLASH_BLOCK_SIZE;
  533. cnt -= FLASH_BLOCK_SIZE;
  534. if (((count-cnt)>>10)>temp) {
  535. temp=(count-cnt)>>10;
  536. printf("\r%lu KB",temp);
  537. }
  538. }
  539. printf("\n");
  540. wp = cp;
  541. /*
  542. * handle word aligned part
  543. */
  544. while (cnt >= 4) {
  545. data = 0;
  546. for (i=0; i<4; ++i) {
  547. data = (data << 8) | *src++;
  548. }
  549. if ((rc = write_word(info, wp, data)) != 0) {
  550. return (rc);
  551. }
  552. wp += 4;
  553. cnt -= 4;
  554. }
  555. if (cnt == 0) {
  556. return (0);
  557. }
  558. /*
  559. * handle unaligned tail bytes
  560. */
  561. data = 0;
  562. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  563. data = (data << 8) | *src++;
  564. --cnt;
  565. }
  566. for (; i<4; ++i, ++cp) {
  567. data = (data << 8) | (*(uchar *)cp);
  568. }
  569. return (write_word(info, wp, data));
  570. }
  571. #undef FLASH_BLOCK_SIZE
  572. /*-----------------------------------------------------------------------
  573. * Write block to Flash, returns:
  574. * 0 - OK
  575. * 1 - write timeout
  576. * 2 - Flash not erased
  577. * -1 Error
  578. */
  579. static int write_block(flash_info_t *info, uchar * src, ulong dest, ulong cnt)
  580. {
  581. vu_short *baddr, *addr = (vu_short *)dest;
  582. ushort data;
  583. ulong start, now, xsr,csr, ready;
  584. int flag;
  585. if (cnt==0) return 0;
  586. else if(cnt != (cnt& ~1)) return -1;
  587. /* Check if Flash is (sufficiently) erased */
  588. data = * src;
  589. data = (data<<8) | *(src+1);
  590. if ((*addr & data) != data) {
  591. return (2);
  592. }
  593. if (big_endian == 1) {
  594. ready = 0x0080;
  595. }
  596. else {
  597. ready = 0x8000;
  598. }
  599. /* Disable interrupts which might cause a timeout here */
  600. flag = disable_interrupts();
  601. do {
  602. /* Write Command */
  603. *addr = 0xe8e8;
  604. asm("sync");
  605. xsr = *addr;
  606. asm("sync");
  607. } while (!(xsr & ready)); /*wait until read */
  608. /*write count=BLOCK SIZE -1 */
  609. data=(cnt>>1)-1;
  610. data=(data<<8)|data;
  611. *addr = data; /* word mode, cnt/2 */
  612. asm("sync");
  613. baddr = addr;
  614. while(cnt) {
  615. data = * src++;
  616. data = (data<<8) | *src++;
  617. asm("sync");
  618. *baddr = data;
  619. asm("sync");
  620. ++baddr;
  621. cnt = cnt -2;
  622. }
  623. *addr = 0xd0d0; /* confirm write */
  624. start = get_timer(0);
  625. asm("sync");
  626. if (flag)
  627. enable_interrupts();
  628. /* data polling for D7 */
  629. flag = 0;
  630. while (((csr = *addr) & ready) != ready) {
  631. if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
  632. flag = 1;
  633. break;
  634. }
  635. }
  636. if (csr & 0x4040) {
  637. printf ("CSR indicates write error (%04lx) at %08lx\n",
  638. csr, (ulong)addr);
  639. flag = 1;
  640. }
  641. /* Clear Status Registers Command */
  642. *addr = 0x5050;
  643. asm("sync");
  644. /* Reset to read array mode */
  645. *addr = 0xFFFF;
  646. asm("sync");
  647. return (flag);
  648. }
  649. /*-----------------------------------------------------------------------
  650. * Write a short word to Flash, returns:
  651. * 0 - OK
  652. * 1 - write timeout
  653. * 2 - Flash not erased
  654. */
  655. static int write_short (flash_info_t *info, ulong dest, ushort data)
  656. {
  657. vu_short *addr = (vu_short *)dest;
  658. ulong start, now, csr, ready;
  659. int flag;
  660. /* Check if Flash is (sufficiently) erased */
  661. if ((*addr & data) != data) {
  662. return (2);
  663. }
  664. /* Disable interrupts which might cause a timeout here */
  665. flag = disable_interrupts();
  666. /* Write Command */
  667. *addr = 0x1010;
  668. start = get_timer (0);
  669. asm("sync");
  670. /* Write Data */
  671. *addr = data;
  672. asm("sync");
  673. /* re-enable interrupts if necessary */
  674. if (flag)
  675. enable_interrupts();
  676. if (big_endian == 1) {
  677. ready = 0x0080;
  678. }
  679. else {
  680. ready = 0x8000;
  681. }
  682. /* data polling for D7 */
  683. flag = 0;
  684. while (((csr = *addr) & ready) != ready) {
  685. if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
  686. flag = 1;
  687. break;
  688. }
  689. }
  690. if (csr & 0x4040) {
  691. printf ("CSR indicates write error (%04lx) at %08lx\n",
  692. csr, (ulong)addr);
  693. flag = 1;
  694. }
  695. /* Clear Status Registers Command */
  696. *addr = 0x5050;
  697. asm("sync");
  698. /* Reset to read array mode */
  699. *addr = 0xFFFF;
  700. asm("sync");
  701. return (flag);
  702. }
  703. /*-----------------------------------------------------------------------
  704. * Write a word to Flash, returns:
  705. * 0 - OK
  706. * 1 - write timeout
  707. * 2 - Flash not erased
  708. */
  709. static int write_word (flash_info_t *info, ulong dest, ulong data)
  710. {
  711. vu_long *addr = (vu_long *)dest;
  712. ulong start, csr, ready;
  713. int flag=0;
  714. switch (info->portwidth) {
  715. case FLASH_CFI_32BIT:
  716. /* Check if Flash is (sufficiently) erased */
  717. if ((*addr & data) != data) {
  718. return (2);
  719. }
  720. /* Disable interrupts which might cause a timeout here */
  721. flag = disable_interrupts();
  722. if (big_endian == 1) {
  723. ready = 0x0080;
  724. }
  725. else {
  726. ready = 0x8000;
  727. }
  728. if ((info->portwidth / info->chipwidth)==2) {
  729. ready += (ready <<16);
  730. }
  731. else {
  732. ready = ready << 16;
  733. }
  734. /* Write Command */
  735. *addr = 0x10101010;
  736. asm("sync");
  737. /* Write Data */
  738. *addr = data;
  739. /* re-enable interrupts if necessary */
  740. if (flag)
  741. enable_interrupts();
  742. /* data polling for D7 */
  743. start = get_timer (0);
  744. flag = 0;
  745. while (((csr = *addr) & ready) != ready) {
  746. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  747. flag = 1;
  748. break;
  749. }
  750. }
  751. if (csr & 0x40404040) {
  752. printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
  753. flag = 1;
  754. }
  755. /* Clear Status Registers Command */
  756. *addr = 0x50505050;
  757. asm("sync");
  758. /* Reset to read array mode */
  759. *addr = 0xFFFFFFFF;
  760. asm("sync");
  761. break;
  762. case FLASH_CFI_16BIT:
  763. flag = write_short (info, dest, (unsigned short) (data>>16));
  764. if (flag == 0)
  765. flag = write_short (info, dest+2, (unsigned short) (data));
  766. break;
  767. }
  768. return (flag);
  769. }
  770. /*-----------------------------------------------------------------------
  771. * Clear Block Lock Bit, returns:
  772. * 0 - OK
  773. * 1 - Timeout
  774. */
  775. static int clear_block_lock_bit(flash_info_t * info, vu_long * addr)
  776. {
  777. ulong start, now, ready;
  778. /* Reset Array */
  779. *addr = 0xffffffff;
  780. asm("sync");
  781. /* Clear Status Register */
  782. *addr = 0x50505050;
  783. asm("sync");
  784. *addr = 0x60606060;
  785. asm("sync");
  786. *addr = 0xd0d0d0d0;
  787. asm("sync");
  788. if (big_endian == 1) {
  789. ready = 0x0080;
  790. }
  791. else {
  792. ready = 0x8000;
  793. }
  794. if ((info->portwidth / info->chipwidth)==2) {
  795. ready += (ready <<16);
  796. }
  797. else {
  798. ready = ready << 16;
  799. }
  800. #ifdef DEBUG
  801. printf ("%s: Ready flag is 0x%8lx\n", __FUNCTION__, ready);
  802. #endif
  803. *addr = 0x70707070; /* read status */
  804. start = get_timer (0);
  805. while((*addr & ready) != ready){
  806. if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  807. printf ("Timeout on clearing Block Lock Bit\n");
  808. *addr = 0xFFFFFFFF; /* reset bank */
  809. asm("sync");
  810. return 1;
  811. }
  812. }
  813. return 0;
  814. }
  815. #endif /* !CFG_NO_FLASH */