flash.c 13 KB

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  1. /*
  2. * (C) Copyright 2004
  3. * Xiaogeng (Shawn) Jin, Agilent Technologies, xiaogeng_jin@agilent.com
  4. *
  5. * (C) Copyright 2001
  6. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  7. *
  8. * (C) Copyright 2001-2004
  9. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  10. *
  11. * (C) Copyright 2003
  12. * Texas Instruments, <www.ti.com>
  13. * Kshitij Gupta <Kshitij@ti.com>
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <common.h>
  34. #include <linux/byteorder/swab.h>
  35. #define DEBUG
  36. #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
  37. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  38. /* Board support for 1 or 2 flash devices */
  39. #define FLASH_PORT_WIDTH32
  40. #undef FLASH_PORT_WIDTH16
  41. #ifdef FLASH_PORT_WIDTH16
  42. #define FLASH_PORT_WIDTH ushort
  43. #define FLASH_PORT_WIDTHV vu_short
  44. #define SWAP(x) __swab16(x)
  45. #else
  46. #define FLASH_PORT_WIDTH ulong
  47. #define FLASH_PORT_WIDTHV vu_long
  48. #define SWAP(x) __swab32(x)
  49. #endif
  50. #define FPW FLASH_PORT_WIDTH
  51. #define FPWV FLASH_PORT_WIDTHV
  52. #define mb() __asm__ __volatile__ ("" : : : "memory")
  53. /* Flash Organization Structure */
  54. typedef struct OrgDef {
  55. unsigned int sector_number;
  56. unsigned int sector_size;
  57. } OrgDef;
  58. /* Flash Organizations */
  59. OrgDef OrgIntel_28F256L18T[] = {
  60. {4, 32 * 1024}, /* 4 * 32kBytes sectors */
  61. {255, 128 * 1024}, /* 255 * 128kBytes sectors */
  62. };
  63. /* CP control register base address */
  64. #define CPCR_BASE 0xCB000000
  65. #define CPCR_EXTRABANK 0x8
  66. #define CPCR_FLASHSIZE 0x4
  67. #define CPCR_FLWREN 0x2
  68. #define CPCR_FLVPPEN 0x1
  69. /*-----------------------------------------------------------------------
  70. * Functions
  71. */
  72. unsigned long flash_init (void);
  73. static ulong flash_get_size (FPW * addr, flash_info_t * info);
  74. static int write_data (flash_info_t * info, ulong dest, FPW data);
  75. static void flash_get_offsets (ulong base, flash_info_t * info);
  76. void inline spin_wheel (void);
  77. void flash_print_info (flash_info_t * info);
  78. void flash_unprotect_sectors (FPWV * addr);
  79. int flash_erase (flash_info_t * info, int s_first, int s_last);
  80. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
  81. /*-----------------------------------------------------------------------
  82. */
  83. unsigned long flash_init (void)
  84. {
  85. int i, nbanks;
  86. ulong size = 0;
  87. vu_long *cpcr = (vu_long *)CPCR_BASE;
  88. /* Check if there is an extra bank of flash */
  89. if (cpcr[1] & CPCR_EXTRABANK)
  90. nbanks = 2;
  91. else
  92. nbanks = 1;
  93. if (nbanks > CFG_MAX_FLASH_BANKS)
  94. nbanks = CFG_MAX_FLASH_BANKS;
  95. /* Enable flash write */
  96. cpcr[1] |= 3;
  97. for (i = 0; i < nbanks; i++) {
  98. flash_get_size ((FPW *)(CFG_FLASH_BASE + size), &flash_info[i]);
  99. flash_get_offsets (CFG_FLASH_BASE + size, &flash_info[i]);
  100. size += flash_info[i].size;
  101. }
  102. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  103. /* monitor protection */
  104. flash_protect (FLAG_PROTECT_SET,
  105. CFG_MONITOR_BASE,
  106. CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
  107. #endif
  108. #ifdef CONFIG_ENV_IS_IN_FLASH
  109. /* ENV protection ON */
  110. flash_protect(FLAG_PROTECT_SET,
  111. CFG_ENV_ADDR,
  112. CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
  113. &flash_info[0]);
  114. #endif
  115. /* Protect SIB (0x24800000) and bootMonitor (0x24c00000) */
  116. flash_protect (FLAG_PROTECT_SET,
  117. flash_info[0].start[62],
  118. flash_info[0].start[63] + PHYS_FLASH_SECT_SIZE - 1,
  119. &flash_info[0]);
  120. return size;
  121. }
  122. /*-----------------------------------------------------------------------
  123. */
  124. static void flash_get_offsets (ulong base, flash_info_t * info)
  125. {
  126. int i;
  127. if (info->flash_id == FLASH_UNKNOWN) {
  128. return;
  129. }
  130. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
  131. for (i = 0; i < info->sector_count; i++) {
  132. info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
  133. info->protect[i] = 0;
  134. }
  135. }
  136. }
  137. /*-----------------------------------------------------------------------
  138. */
  139. void flash_print_info (flash_info_t * info)
  140. {
  141. int i;
  142. if (info->flash_id == FLASH_UNKNOWN) {
  143. printf ("missing or unknown FLASH type\n");
  144. return;
  145. }
  146. switch (info->flash_id & FLASH_VENDMASK) {
  147. case FLASH_MAN_INTEL:
  148. printf ("INTEL ");
  149. break;
  150. default:
  151. printf ("Unknown Vendor ");
  152. break;
  153. }
  154. /* Integrator CP board uses 28F640J3C or 28F128J3C parts,
  155. * which have the same device id numbers as 28F640J3A or
  156. * 28F128J3A
  157. */
  158. switch (info->flash_id & FLASH_TYPEMASK) {
  159. case FLASH_28F256L18T:
  160. printf ("FLASH 28F256L18T\n");
  161. break;
  162. case FLASH_28F640J3A:
  163. printf ("FLASH 28F640J3C\n");
  164. break;
  165. case FLASH_28F128J3A:
  166. printf ("FLASH 28F128J3C\n");
  167. break;
  168. default:
  169. printf ("Unknown Chip Type\n");
  170. break;
  171. }
  172. printf (" Size: %ld MB in %d Sectors\n",
  173. info->size >> 20, info->sector_count);
  174. printf (" Sector Start Addresses:");
  175. for (i = 0; i < info->sector_count; ++i) {
  176. if ((i % 5) == 0)
  177. printf ("\n ");
  178. printf (" %08lX%s",
  179. info->start[i], info->protect[i] ? " (RO)" : " ");
  180. }
  181. printf ("\n");
  182. return;
  183. }
  184. /*
  185. * The following code cannot be run from FLASH!
  186. */
  187. static ulong flash_get_size (FPW * addr, flash_info_t * info)
  188. {
  189. volatile FPW value;
  190. vu_long *cpcr = (vu_long *)CPCR_BASE;
  191. int nsects;
  192. /* Check the flash size */
  193. if (cpcr[1] & CPCR_FLASHSIZE)
  194. nsects = 128;
  195. else
  196. nsects = 64;
  197. if (nsects > CFG_MAX_FLASH_SECT)
  198. nsects = CFG_MAX_FLASH_SECT;
  199. /* Write auto select command: read Manufacturer ID */
  200. addr[0x5555] = (FPW) 0x00AA00AA;
  201. addr[0x2AAA] = (FPW) 0x00550055;
  202. addr[0x5555] = (FPW) 0x00900090;
  203. mb ();
  204. value = addr[0];
  205. switch (value) {
  206. case (FPW) INTEL_MANUFACT:
  207. info->flash_id = FLASH_MAN_INTEL;
  208. break;
  209. default:
  210. info->flash_id = FLASH_UNKNOWN;
  211. info->sector_count = 0;
  212. info->size = 0;
  213. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  214. return (0); /* no or unknown flash */
  215. }
  216. mb ();
  217. value = addr[1]; /* device ID */
  218. switch (value) {
  219. case (FPW) (INTEL_ID_28F256L18T):
  220. info->flash_id += FLASH_28F256L18T;
  221. info->sector_count = 259;
  222. info->size = 0x02000000;
  223. break; /* => 32 MB */
  224. case (FPW) (INTEL_ID_28F640J3A):
  225. info->flash_id += FLASH_28F640J3A;
  226. info->sector_count = nsects;
  227. info->size = nsects * PHYS_FLASH_SECT_SIZE;
  228. break;
  229. case (FPW) (INTEL_ID_28F128J3A):
  230. info->flash_id += FLASH_28F128J3A;
  231. info->sector_count = nsects;
  232. info->size = nsects * PHYS_FLASH_SECT_SIZE;
  233. break;
  234. default:
  235. info->flash_id = FLASH_UNKNOWN;
  236. break;
  237. }
  238. if (info->sector_count > CFG_MAX_FLASH_SECT) {
  239. printf ("** ERROR: sector count %d > max (%d) **\n",
  240. info->sector_count, CFG_MAX_FLASH_SECT);
  241. info->sector_count = CFG_MAX_FLASH_SECT;
  242. }
  243. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  244. return (info->size);
  245. }
  246. /* unprotects a sector for write and erase
  247. * on some intel parts, this unprotects the entire chip, but it
  248. * wont hurt to call this additional times per sector...
  249. */
  250. void flash_unprotect_sectors (FPWV * addr)
  251. {
  252. FPW status;
  253. *addr = (FPW) 0x00500050; /* clear status register */
  254. /* this sends the clear lock bit command */
  255. *addr = (FPW) 0x00600060;
  256. *addr = (FPW) 0x00D000D0;
  257. reset_timer_masked();
  258. while (((status = *addr) & (FPW)0x00800080) != 0x00800080) {
  259. if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
  260. printf("Timeout");
  261. break;
  262. }
  263. }
  264. *addr = (FPW) 0x00FF00FF;
  265. }
  266. /*-----------------------------------------------------------------------
  267. */
  268. int flash_erase (flash_info_t * info, int s_first, int s_last)
  269. {
  270. int flag, prot, sect;
  271. ulong type;
  272. int rcode = 0;
  273. if ((s_first < 0) || (s_first > s_last)) {
  274. if (info->flash_id == FLASH_UNKNOWN) {
  275. printf ("- missing\n");
  276. } else {
  277. printf ("- no sectors to erase\n");
  278. }
  279. return 1;
  280. }
  281. type = (info->flash_id & FLASH_VENDMASK);
  282. if ((type != FLASH_MAN_INTEL)) {
  283. printf ("Can't erase unknown flash type %08lx - aborted\n",
  284. info->flash_id);
  285. return 1;
  286. }
  287. prot = 0;
  288. for (sect = s_first; sect <= s_last; ++sect) {
  289. if (info->protect[sect]) {
  290. prot++;
  291. }
  292. }
  293. if (prot) {
  294. printf ("- Warning: %d protected sectors will not be erased!\n",
  295. prot);
  296. } else {
  297. printf ("\n");
  298. }
  299. /* Start erase on unprotected sectors */
  300. for (sect = s_first; sect <= s_last; sect++) {
  301. if (info->protect[sect] == 0) { /* not protected */
  302. FPWV *addr = (FPWV *) (info->start[sect]);
  303. FPW status;
  304. printf ("Erasing sector %2d ... ", sect);
  305. /* Disable interrupts which might cause a timeout here */
  306. flag = disable_interrupts ();
  307. /* flash_unprotect_sectors (addr); */
  308. /* arm simple, non interrupt dependent timer */
  309. reset_timer_masked ();
  310. *addr = (FPW) 0x00500050; /* clear status register */
  311. *addr = (FPW) 0x00200020; /* erase setup */
  312. *addr = (FPW) 0x00D000D0; /* erase confirm */
  313. mb();
  314. udelay(1000); /* Let's wait 1 ms */
  315. /* re-enable interrupts if necessary */
  316. if (flag)
  317. enable_interrupts();
  318. while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
  319. if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
  320. *addr = (FPW)0x00700070;
  321. status = *addr;
  322. if ((status & (FPW) 0x00400040) == (FPW) 0x00400040) {
  323. /* erase suspended? Resume it */
  324. reset_timer_masked();
  325. *addr = (FPW) 0x00D000D0;
  326. } else {
  327. #ifdef DEBUG
  328. printf ("Timeout,0x%08lx\n", status);
  329. #else
  330. printf("Timeout\n");
  331. #endif
  332. *addr = (FPW) 0x00500050;
  333. *addr = (FPW) 0x00FF00FF; /* reset to read mode */
  334. rcode = 1;
  335. break;
  336. }
  337. }
  338. }
  339. *addr = (FPW) 0x00FF00FF; /* resest to read mode */
  340. printf (" done\n");
  341. }
  342. }
  343. return rcode;
  344. }
  345. /*-----------------------------------------------------------------------
  346. * Copy memory to flash, returns:
  347. * 0 - OK
  348. * 1 - write timeout
  349. * 2 - Flash not erased
  350. * 4 - Flash not identified
  351. */
  352. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  353. {
  354. ulong cp, wp;
  355. FPW data;
  356. int count, i, l, rc, port_width;
  357. if (info->flash_id == FLASH_UNKNOWN) {
  358. return 4;
  359. }
  360. /* get lower word aligned address */
  361. #ifdef FLASH_PORT_WIDTH16
  362. wp = (addr & ~1);
  363. port_width = 2;
  364. #else
  365. wp = (addr & ~3);
  366. port_width = 4;
  367. #endif
  368. /*
  369. * handle unaligned start bytes
  370. */
  371. if ((l = addr - wp) != 0) {
  372. data = 0;
  373. for (i = 0, cp = wp; i < l; ++i, ++cp) {
  374. data = (data << 8) | (*(uchar *) cp);
  375. }
  376. for (; i < port_width && cnt > 0; ++i) {
  377. data = (data << 8) | *src++;
  378. --cnt;
  379. ++cp;
  380. }
  381. for (; cnt == 0 && i < port_width; ++i, ++cp) {
  382. data = (data << 8) | (*(uchar *) cp);
  383. }
  384. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  385. return (rc);
  386. }
  387. wp += port_width;
  388. }
  389. /*
  390. * handle word aligned part
  391. */
  392. count = 0;
  393. while (cnt >= port_width) {
  394. data = 0;
  395. for (i = 0; i < port_width; ++i) {
  396. data = (data << 8) | *src++;
  397. }
  398. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  399. return (rc);
  400. }
  401. wp += port_width;
  402. cnt -= port_width;
  403. if (count++ > 0x800) {
  404. spin_wheel ();
  405. count = 0;
  406. }
  407. }
  408. if (cnt == 0) {
  409. return (0);
  410. }
  411. /*
  412. * handle unaligned tail bytes
  413. */
  414. data = 0;
  415. for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
  416. data = (data << 8) | *src++;
  417. --cnt;
  418. }
  419. for (; i < port_width; ++i, ++cp) {
  420. data = (data << 8) | (*(uchar *) cp);
  421. }
  422. return (write_data (info, wp, SWAP (data)));
  423. }
  424. /*-----------------------------------------------------------------------
  425. * Write a word or halfword to Flash, returns:
  426. * 0 - OK
  427. * 1 - write timeout
  428. * 2 - Flash not erased
  429. */
  430. static int write_data (flash_info_t * info, ulong dest, FPW data)
  431. {
  432. FPWV *addr = (FPWV *) dest;
  433. ulong status;
  434. int flag;
  435. /* Check if Flash is (sufficiently) erased */
  436. if ((*addr & data) != data) {
  437. printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
  438. return (2);
  439. }
  440. /* Disable interrupts which might cause a timeout here */
  441. flag = disable_interrupts ();
  442. /* flash_unprotect_sectors (addr); */
  443. *addr = (FPW) 0x00400040; /* write setup */
  444. *addr = data;
  445. mb();
  446. /* re-enable interrupts if necessary */
  447. if (flag)
  448. enable_interrupts();
  449. /* arm simple, non interrupt dependent timer */
  450. reset_timer_masked ();
  451. /* wait while polling the status register */
  452. while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
  453. if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
  454. #ifdef DEBUG
  455. *addr = (FPW) 0x00700070;
  456. status = *addr;
  457. printf("## status=0x%08lx, addr=0x%p\n", status, addr);
  458. #endif
  459. *addr = (FPW) 0x00500050; /* clear status register cmd */
  460. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  461. return (1);
  462. }
  463. }
  464. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  465. return (0);
  466. }
  467. void inline spin_wheel (void)
  468. {
  469. static int p = 0;
  470. static char w[] = "\\/-";
  471. printf ("\010%c", w[p]);
  472. (++p == 3) ? (p = 0) : 0;
  473. }