flash.c 12 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
  6. * Add support the Sharp chips on the mpc8260ads.
  7. * I started with board/ip860/flash.c and made changes I found in
  8. * the MTD project by David Schleef.
  9. *
  10. * (C) Copyright 2003 Arabella Software Ltd.
  11. * Yuli Barcohen <yuli@arabellasw.com>
  12. * Re-written to support multi-bank flash SIMMs.
  13. * Added support for real protection and JFFS2.
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <common.h>
  34. /* Intel-compatible flash ID */
  35. #define INTEL_COMPAT 0x89898989
  36. #define INTEL_ALT 0xB0B0B0B0
  37. /* Intel-compatible flash commands */
  38. #define INTEL_PROGRAM 0x10101010
  39. #define INTEL_ERASE 0x20202020
  40. #define INTEL_CLEAR 0x50505050
  41. #define INTEL_LOCKBIT 0x60606060
  42. #define INTEL_PROTECT 0x01010101
  43. #define INTEL_STATUS 0x70707070
  44. #define INTEL_READID 0x90909090
  45. #define INTEL_CONFIRM 0xD0D0D0D0
  46. #define INTEL_RESET 0xFFFFFFFF
  47. /* Intel-compatible flash status bits */
  48. #define INTEL_FINISHED 0x80808080
  49. #define INTEL_OK 0x80808080
  50. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  51. /*-----------------------------------------------------------------------
  52. * This board supports 32-bit wide flash SIMMs (4x8-bit configuration.)
  53. * Up to 32MB of flash supported (up to 4 banks.)
  54. * BCSR is used for flash presence detect (page 4-65 of the User's Manual)
  55. *
  56. * The following code can not run from flash!
  57. */
  58. unsigned long flash_init (void)
  59. {
  60. ulong size = 0, sect_start, sect_size = 0, bank_size;
  61. ushort sect_count = 0;
  62. int i, j, nbanks;
  63. vu_long *addr = (vu_long *)CFG_FLASH_BASE;
  64. vu_long *bcsr = (vu_long *)CFG_BCSR;
  65. switch (bcsr[2] & 0xF) {
  66. case 0:
  67. nbanks = 4;
  68. break;
  69. case 1:
  70. nbanks = 2;
  71. break;
  72. case 2:
  73. nbanks = 1;
  74. break;
  75. default: /* Unsupported configurations */
  76. nbanks = CFG_MAX_FLASH_BANKS;
  77. }
  78. if (nbanks > CFG_MAX_FLASH_BANKS)
  79. nbanks = CFG_MAX_FLASH_BANKS;
  80. for (i = 0; i < nbanks; i++) {
  81. *addr = INTEL_READID; /* Read Intelligent Identifier */
  82. if ((addr[0] == INTEL_COMPAT) || (addr[0] == INTEL_ALT)) {
  83. switch (addr[1]) {
  84. case SHARP_ID_28F016SCL:
  85. case SHARP_ID_28F016SCZ:
  86. flash_info[i].flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT;
  87. sect_count = 32;
  88. sect_size = 0x40000;
  89. break;
  90. default:
  91. flash_info[i].flash_id = FLASH_UNKNOWN;
  92. sect_count = CFG_MAX_FLASH_SECT;
  93. sect_size =
  94. CFG_FLASH_SIZE / CFG_MAX_FLASH_BANKS / CFG_MAX_FLASH_SECT;
  95. }
  96. }
  97. else
  98. flash_info[i].flash_id = FLASH_UNKNOWN;
  99. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  100. printf("### Unknown flash ID %08lX %08lX at address %08lX ###\n",
  101. addr[0], addr[1], (ulong)addr);
  102. size = 0;
  103. *addr = INTEL_RESET; /* Reset bank to Read Array mode */
  104. break;
  105. }
  106. flash_info[i].sector_count = sect_count;
  107. flash_info[i].size = bank_size = sect_size * sect_count;
  108. size += bank_size;
  109. sect_start = (ulong)addr;
  110. for (j = 0; j < sect_count; j++) {
  111. addr = (vu_long *)sect_start;
  112. flash_info[i].start[j] = sect_start;
  113. flash_info[i].protect[j] = (addr[2] == 0x01010101);
  114. sect_start += sect_size;
  115. }
  116. *addr = INTEL_RESET; /* Reset bank to Read Array mode */
  117. addr = (vu_long *)sect_start;
  118. }
  119. if (size == 0) { /* Unknown flash, fill with hard-coded values */
  120. sect_start = CFG_FLASH_BASE;
  121. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  122. flash_info[i].flash_id = FLASH_UNKNOWN;
  123. flash_info[i].size = CFG_FLASH_SIZE / CFG_MAX_FLASH_BANKS;
  124. flash_info[i].sector_count = sect_count;
  125. for (j = 0; j < sect_count; j++) {
  126. flash_info[i].start[j] = sect_start;
  127. flash_info[i].protect[j] = 0;
  128. sect_start += sect_size;
  129. }
  130. }
  131. size = CFG_FLASH_SIZE;
  132. }
  133. else
  134. for (i = nbanks; i < CFG_MAX_FLASH_BANKS; i++) {
  135. flash_info[i].flash_id = FLASH_UNKNOWN;
  136. flash_info[i].size = 0;
  137. flash_info[i].sector_count = 0;
  138. }
  139. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  140. /* monitor protection ON by default */
  141. flash_protect(FLAG_PROTECT_SET,
  142. CFG_MONITOR_BASE,
  143. CFG_MONITOR_BASE+monitor_flash_len-1,
  144. &flash_info[0]);
  145. #endif
  146. #ifdef CONFIG_ENV_IS_IN_FLASH
  147. /* ENV protection ON by default */
  148. flash_protect(FLAG_PROTECT_SET,
  149. CFG_ENV_ADDR,
  150. CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
  151. &flash_info[0]);
  152. #endif
  153. return (size);
  154. }
  155. /*-----------------------------------------------------------------------
  156. */
  157. void flash_print_info (flash_info_t *info)
  158. {
  159. int i;
  160. if (info->flash_id == FLASH_UNKNOWN) {
  161. printf ("missing or unknown FLASH type\n");
  162. return;
  163. }
  164. switch (info->flash_id & FLASH_VENDMASK) {
  165. case FLASH_MAN_INTEL: printf ("Intel "); break;
  166. case FLASH_MAN_SHARP: printf ("Sharp "); break;
  167. default: printf ("Unknown Vendor "); break;
  168. }
  169. switch (info->flash_id & FLASH_TYPEMASK) {
  170. case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
  171. break;
  172. case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
  173. break;
  174. case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
  175. break;
  176. case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n");
  177. break;
  178. default: printf ("Unknown Chip Type\n");
  179. break;
  180. }
  181. printf (" Size: %ld MB in %d Sectors\n",
  182. info->size >> 20, info->sector_count);
  183. printf (" Sector Start Addresses:");
  184. for (i=0; i<info->sector_count; ++i) {
  185. if ((i % 5) == 0)
  186. printf ("\n ");
  187. printf (" %08lX%s",
  188. info->start[i],
  189. info->protect[i] ? " (RO)" : " "
  190. );
  191. }
  192. printf ("\n");
  193. }
  194. /*-----------------------------------------------------------------------
  195. */
  196. int flash_erase (flash_info_t *info, int s_first, int s_last)
  197. {
  198. int flag, prot, sect;
  199. ulong start, now, last;
  200. if ((s_first < 0) || (s_first > s_last)) {
  201. if (info->flash_id == FLASH_UNKNOWN) {
  202. printf ("- missing\n");
  203. } else {
  204. printf ("- no sectors to erase\n");
  205. }
  206. return 1;
  207. }
  208. if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
  209. && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
  210. printf ("Can't erase unknown flash type %08lx - aborted\n",
  211. info->flash_id);
  212. return 1;
  213. }
  214. prot = 0;
  215. for (sect=s_first; sect<=s_last; ++sect) {
  216. if (info->protect[sect]) {
  217. prot++;
  218. }
  219. }
  220. if (prot) {
  221. printf ("- Warning: %d protected sectors will not be erased!\n",
  222. prot);
  223. } else {
  224. printf ("\n");
  225. }
  226. /* Start erase on unprotected sectors */
  227. for (sect = s_first; sect<=s_last; sect++) {
  228. if (info->protect[sect] == 0) { /* not protected */
  229. vu_long *addr = (vu_long *)(info->start[sect]);
  230. last = start = get_timer (0);
  231. /* Disable interrupts which might cause a timeout here */
  232. flag = disable_interrupts();
  233. /* Clear Status Register */
  234. *addr = INTEL_CLEAR;
  235. /* Single Block Erase Command */
  236. *addr = INTEL_ERASE;
  237. /* Confirm */
  238. *addr = INTEL_CONFIRM;
  239. if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
  240. /* Resume Command, as per errata update */
  241. *addr = INTEL_CONFIRM;
  242. }
  243. /* re-enable interrupts if necessary */
  244. if (flag)
  245. enable_interrupts();
  246. while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
  247. if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  248. printf ("Timeout\n");
  249. *addr = INTEL_RESET; /* reset bank */
  250. return 1;
  251. }
  252. /* show that we're waiting */
  253. if ((now - last) > 1000) { /* every second */
  254. putc ('.');
  255. last = now;
  256. }
  257. }
  258. if (*addr != INTEL_OK) {
  259. printf("Block erase failed at %08X, CSR=%08X\n",
  260. (uint)addr, (uint)*addr);
  261. *addr = INTEL_RESET; /* reset bank */
  262. return 1;
  263. }
  264. /* reset to read mode */
  265. *addr = INTEL_RESET;
  266. }
  267. }
  268. printf (" done\n");
  269. return 0;
  270. }
  271. /*-----------------------------------------------------------------------
  272. * Write a word to Flash, returns:
  273. * 0 - OK
  274. * 1 - write timeout
  275. * 2 - Flash not erased
  276. */
  277. static int write_word (flash_info_t *info, ulong dest, ulong data)
  278. {
  279. ulong start;
  280. int rc = 0;
  281. int flag;
  282. vu_long *addr = (vu_long *)dest;
  283. /* Check if Flash is (sufficiently) erased */
  284. if ((*addr & data) != data) {
  285. return (2);
  286. }
  287. *addr = INTEL_CLEAR; /* Clear status register */
  288. /* Disable interrupts which might cause a timeout here */
  289. flag = disable_interrupts();
  290. /* Write Command */
  291. *addr = INTEL_PROGRAM;
  292. /* Write Data */
  293. *addr = data;
  294. /* re-enable interrupts if necessary */
  295. if (flag)
  296. enable_interrupts();
  297. /* data polling for D7 */
  298. start = get_timer (0);
  299. while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
  300. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  301. printf("Write timed out\n");
  302. rc = 1;
  303. break;
  304. }
  305. }
  306. if (*addr != INTEL_OK) {
  307. printf ("Write failed at %08X, CSR=%08X\n", (uint)addr, (uint)*addr);
  308. rc = 1;
  309. }
  310. *addr = INTEL_RESET; /* Reset to read array mode */
  311. return rc;
  312. }
  313. /*-----------------------------------------------------------------------
  314. * Copy memory to flash, returns:
  315. * 0 - OK
  316. * 1 - write timeout
  317. * 2 - Flash not erased
  318. */
  319. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  320. {
  321. ulong cp, wp, data;
  322. int i, l, rc;
  323. wp = (addr & ~3); /* get lower word aligned address */
  324. *(vu_long *)wp = INTEL_RESET; /* Reset to read array mode */
  325. /*
  326. * handle unaligned start bytes
  327. */
  328. if ((l = addr - wp) != 0) {
  329. data = 0;
  330. for (i=0, cp=wp; i<l; ++i, ++cp) {
  331. data = (data << 8) | (*(uchar *)cp);
  332. }
  333. for (; i<4 && cnt>0; ++i) {
  334. data = (data << 8) | *src++;
  335. --cnt;
  336. ++cp;
  337. }
  338. for (; cnt==0 && i<4; ++i, ++cp) {
  339. data = (data << 8) | (*(uchar *)cp);
  340. }
  341. if ((rc = write_word(info, wp, data)) != 0) {
  342. return (rc);
  343. }
  344. wp += 4;
  345. }
  346. /*
  347. * handle word aligned part
  348. */
  349. while (cnt >= 4) {
  350. data = 0;
  351. for (i=0; i<4; ++i) {
  352. data = (data << 8) | *src++;
  353. }
  354. if ((rc = write_word(info, wp, data)) != 0) {
  355. return (rc);
  356. }
  357. wp += 4;
  358. cnt -= 4;
  359. }
  360. if (cnt == 0) {
  361. return (0);
  362. }
  363. /*
  364. * handle unaligned tail bytes
  365. */
  366. data = 0;
  367. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  368. data = (data << 8) | *src++;
  369. --cnt;
  370. }
  371. for (; i<4; ++i, ++cp) {
  372. data = (data << 8) | (*(uchar *)cp);
  373. }
  374. rc = write_word(info, wp, data);
  375. return rc;
  376. }
  377. /*-----------------------------------------------------------------------
  378. * Set/Clear sector's lock bit, returns:
  379. * 0 - OK
  380. * 1 - Error (timeout, voltage problems, etc.)
  381. */
  382. int flash_real_protect(flash_info_t *info, long sector, int prot)
  383. {
  384. ulong start;
  385. int i;
  386. int rc = 0;
  387. vu_long *addr = (vu_long *)(info->start[sector]);
  388. int flag = disable_interrupts();
  389. *addr = INTEL_CLEAR; /* Clear status register */
  390. if (prot) { /* Set sector lock bit */
  391. *addr = INTEL_LOCKBIT; /* Sector lock bit */
  392. *addr = INTEL_PROTECT; /* set */
  393. }
  394. else { /* Clear sector lock bit */
  395. *addr = INTEL_LOCKBIT; /* All sectors lock bits */
  396. *addr = INTEL_CONFIRM; /* clear */
  397. }
  398. start = get_timer(0);
  399. while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
  400. if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT) {
  401. printf("Flash lock bit operation timed out\n");
  402. rc = 1;
  403. break;
  404. }
  405. }
  406. if (*addr != INTEL_OK) {
  407. printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
  408. (uint)addr, (uint)*addr);
  409. rc = 1;
  410. }
  411. if (!rc)
  412. info->protect[sector] = prot;
  413. /*
  414. * Clear lock bit command clears all sectors lock bits, so
  415. * we have to restore lock bits of protected sectors.
  416. */
  417. if (!prot)
  418. for (i = 0; i < info->sector_count; i++)
  419. if (info->protect[i]) {
  420. addr = (vu_long *)(info->start[i]);
  421. *addr = INTEL_LOCKBIT; /* Sector lock bit */
  422. *addr = INTEL_PROTECT; /* set */
  423. udelay(CFG_FLASH_LOCK_TOUT * 1000);
  424. }
  425. if (flag)
  426. enable_interrupts();
  427. *addr = INTEL_RESET; /* Reset to read array mode */
  428. return rc;
  429. }