flash.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461
  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  25. typedef unsigned short FLASH_PORT_WIDTH;
  26. typedef volatile unsigned short FLASH_PORT_WIDTHV;
  27. #define FLASH_ID_MASK 0x00FF
  28. #define FPW FLASH_PORT_WIDTH
  29. #define FPWV FLASH_PORT_WIDTHV
  30. #define FLASH_CYCLE1 0x0555
  31. #define FLASH_CYCLE2 0x0aaa
  32. #define FLASH_ID1 0x00
  33. #define FLASH_ID2 0x01
  34. #define FLASH_ID3 0x0E
  35. #define FLASH_ID4 0x0F
  36. /*-----------------------------------------------------------------------
  37. * Functions
  38. */
  39. static ulong flash_get_size(FPWV * addr, flash_info_t * info);
  40. static void flash_reset(flash_info_t * info);
  41. static int write_word_amd(flash_info_t * info, FPWV * dest, FPW data);
  42. static flash_info_t *flash_get_info(ulong base);
  43. /*-----------------------------------------------------------------------
  44. * flash_init()
  45. *
  46. * sets up flash_info and returns size of FLASH (bytes)
  47. */
  48. unsigned long flash_init(void)
  49. {
  50. unsigned long size = 0;
  51. int i = 0;
  52. extern void flash_preinit(void);
  53. extern void flash_afterinit(uint, ulong, ulong);
  54. ulong flashbase = CFG_FLASH_BASE;
  55. flash_preinit();
  56. /* There is only ONE FLASH device */
  57. memset(&flash_info[i], 0, sizeof(flash_info_t));
  58. flash_info[i].size = flash_get_size((FPW *) flashbase, &flash_info[i]);
  59. size += flash_info[i].size;
  60. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  61. /* monitor protection ON by default */
  62. flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
  63. CFG_MONITOR_BASE + monitor_flash_len - 1,
  64. flash_get_info(CFG_MONITOR_BASE));
  65. #endif
  66. #ifdef CONFIG_ENV_IS_IN_FLASH
  67. /* ENV protection ON by default */
  68. flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
  69. CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
  70. flash_get_info(CFG_ENV_ADDR));
  71. #endif
  72. flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
  73. return size ? size : 1;
  74. }
  75. /*-----------------------------------------------------------------------
  76. */
  77. static void flash_reset(flash_info_t * info) {
  78. FPWV *base = (FPWV *) (info->start[0]);
  79. /* Put FLASH back in read mode */
  80. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
  81. *base = (FPW) 0x00FF00FF; /* Intel Read Mode */
  82. } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) {
  83. *base = (FPW) 0x00F000F0; /* AMD Read Mode */
  84. }
  85. }
  86. /*-----------------------------------------------------------------------
  87. */
  88. static flash_info_t *flash_get_info(ulong base) {
  89. int i;
  90. flash_info_t *info;
  91. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  92. info = &flash_info[i];
  93. if ((info->size) && (info->start[0] <= base)
  94. && (base <= info->start[0] + info->size - 1)) {
  95. break;
  96. }
  97. }
  98. return (i == CFG_MAX_FLASH_BANKS ? 0 : info);
  99. }
  100. /*-----------------------------------------------------------------------
  101. */
  102. void flash_print_info(flash_info_t * info) {
  103. int i;
  104. char *fmt;
  105. if (info->flash_id == FLASH_UNKNOWN) {
  106. printf("missing or unknown FLASH type\n");
  107. return;
  108. }
  109. switch (info->flash_id & FLASH_VENDMASK) {
  110. case FLASH_MAN_AMD:
  111. printf("AMD ");
  112. break;
  113. default:
  114. printf("Unknown Vendor ");
  115. break;
  116. }
  117. switch (info->flash_id & FLASH_TYPEMASK) {
  118. case FLASH_AMLV256U:
  119. fmt = "29LV256M (256 Mbit)\n";
  120. break;
  121. default:
  122. fmt = "Unknown Chip Type\n";
  123. break;
  124. }
  125. printf(fmt);
  126. printf(" Size: %ld MB in %d Sectors\n", info->size >> 20,
  127. info->sector_count);
  128. printf(" Sector Start Addresses:");
  129. for (i = 0; i < info->sector_count; ++i) {
  130. ulong size;
  131. int erased;
  132. ulong *flash = (unsigned long *)info->start[i];
  133. if ((i % 5) == 0) {
  134. printf("\n ");
  135. }
  136. /*
  137. * Check if whole sector is erased
  138. */
  139. size =
  140. (i !=
  141. (info->sector_count - 1)) ? (info->start[i + 1] -
  142. info->start[i]) >> 2 : (info->
  143. start
  144. [0] +
  145. info->
  146. size -
  147. info->
  148. start
  149. [i])
  150. >> 2;
  151. for (flash = (unsigned long *)info->start[i], erased = 1;
  152. (flash != (unsigned long *)info->start[i] + size)
  153. && erased; flash++) {
  154. erased = *flash == ~0x0UL;
  155. }
  156. printf(" %08lX %s %s", info->start[i], erased ? "E" : " ",
  157. info->protect[i] ? "(RO)" : " ");
  158. }
  159. printf("\n");
  160. }
  161. /*-----------------------------------------------------------------------
  162. */
  163. /*
  164. * The following code cannot be run from FLASH!
  165. */
  166. ulong flash_get_size(FPWV * addr, flash_info_t * info) {
  167. int i;
  168. /* Write auto select command: read Manufacturer ID */
  169. /* Write auto select command sequence and test FLASH answer */
  170. addr[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */
  171. addr[FLASH_CYCLE2] = (FPW) 0x00550055; /* for AMD, Intel ignores this */
  172. addr[FLASH_CYCLE1] = (FPW) 0x00900090; /* selects Intel or AMD */
  173. /* The manufacturer codes are only 1 byte, so just use 1 byte. */
  174. /* This works for any bus width and any FLASH device width. */
  175. udelay(100);
  176. switch (addr[FLASH_ID1] & 0x00ff) {
  177. case (uchar) AMD_MANUFACT:
  178. info->flash_id = FLASH_MAN_AMD;
  179. break;
  180. default:
  181. printf("unknown vendor=%x ", addr[FLASH_ID1] & 0xff);
  182. info->flash_id = FLASH_UNKNOWN;
  183. info->sector_count = 0;
  184. info->size = 0;
  185. break;
  186. }
  187. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  188. if (info->flash_id != FLASH_UNKNOWN) {
  189. switch ((FPW) addr[FLASH_ID2]) {
  190. case (FPW) AMD_ID_MIRROR:
  191. /* MIRROR BIT FLASH, read more ID bytes */
  192. if ((FPW) addr[FLASH_ID3] == (FPW) AMD_ID_LV256U_2
  193. && (FPW) addr[FLASH_ID4] == (FPW) AMD_ID_LV256U_3) {
  194. /* attention: only the first 16 MB will be used in u-boot */
  195. info->flash_id += FLASH_AMLV256U;
  196. info->sector_count = 512;
  197. info->size = 0x02000000;
  198. for (i = 0; i < info->sector_count; i++) {
  199. info->start[i] =
  200. (ulong) addr + 0x10000 * i;
  201. }
  202. break;
  203. }
  204. /* fall thru to here ! */
  205. default:
  206. printf("unknown AMD device=%x %x %x",
  207. (FPW) addr[FLASH_ID2], (FPW) addr[FLASH_ID3],
  208. (FPW) addr[FLASH_ID4]);
  209. info->flash_id = FLASH_UNKNOWN;
  210. info->sector_count = 0;
  211. info->size = 0x800000;
  212. break;
  213. }
  214. /* Put FLASH back in read mode */
  215. flash_reset(info);
  216. }
  217. return (info->size);
  218. }
  219. /*-----------------------------------------------------------------------
  220. */
  221. int flash_erase(flash_info_t * info, int s_first, int s_last) {
  222. FPWV *addr;
  223. int flag, prot, sect;
  224. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  225. ulong start, now, last;
  226. int rcode = 0;
  227. if ((s_first < 0) || (s_first > s_last)) {
  228. if (info->flash_id == FLASH_UNKNOWN) {
  229. printf("- missing\n");
  230. } else {
  231. printf("- no sectors to erase\n");
  232. }
  233. return 1;
  234. }
  235. switch (info->flash_id & FLASH_TYPEMASK) {
  236. case FLASH_AMLV256U:
  237. break;
  238. case FLASH_UNKNOWN:
  239. default:
  240. printf("Can't erase unknown flash type %08lx - aborted\n",
  241. info->flash_id);
  242. return 1;
  243. }
  244. prot = 0;
  245. for (sect = s_first; sect <= s_last; ++sect) {
  246. if (info->protect[sect]) {
  247. prot++;
  248. }
  249. }
  250. if (prot) {
  251. printf("- Warning: %d protected sectors will not be erased!\n",
  252. prot);
  253. } else {
  254. printf("\n");
  255. }
  256. last = get_timer(0);
  257. /* Start erase on unprotected sectors */
  258. for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
  259. if (info->protect[sect] != 0) { /* protected, skip it */
  260. continue;
  261. }
  262. /* Disable interrupts which might cause a timeout here */
  263. flag = disable_interrupts();
  264. addr = (FPWV *) (info->start[sect]);
  265. if (intel) {
  266. *addr = (FPW) 0x00500050; /* clear status register */
  267. *addr = (FPW) 0x00200020; /* erase setup */
  268. *addr = (FPW) 0x00D000D0; /* erase confirm */
  269. } else {
  270. /* must be AMD style if not Intel */
  271. FPWV *base; /* first address in bank */
  272. base = (FPWV *) (info->start[0]);
  273. base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
  274. base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
  275. base[FLASH_CYCLE1] = (FPW) 0x00800080; /* erase mode */
  276. base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
  277. base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
  278. *addr = (FPW) 0x00300030; /* erase sector */
  279. }
  280. /* re-enable interrupts if necessary */
  281. if (flag) {
  282. enable_interrupts();
  283. }
  284. start = get_timer(0);
  285. /* wait at least 50us for AMD, 80us for Intel. */
  286. /* Let's wait 1 ms. */
  287. udelay(1000);
  288. while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
  289. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  290. printf("Timeout\n");
  291. if (intel) {
  292. /* suspend erase */
  293. *addr = (FPW) 0x00B000B0;
  294. }
  295. flash_reset(info); /* reset to read mode */
  296. rcode = 1; /* failed */
  297. break;
  298. }
  299. /* show that we're waiting */
  300. if ((get_timer(last)) > CFG_HZ) {
  301. /* every second */
  302. putc('.');
  303. last = get_timer(0);
  304. }
  305. }
  306. /* show that we're waiting */
  307. if ((get_timer(last)) > CFG_HZ) {
  308. /* every second */
  309. putc('.');
  310. last = get_timer(0);
  311. }
  312. flash_reset(info); /* reset to read mode */
  313. }
  314. printf(" done\n");
  315. return (rcode);
  316. }
  317. /*-----------------------------------------------------------------------
  318. * Copy memory to flash, returns:
  319. * 0 - OK
  320. * 1 - write timeout
  321. * 2 - Flash not erased
  322. */
  323. int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  324. {
  325. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  326. int bytes; /* number of bytes to program in current word */
  327. int left; /* number of bytes left to program */
  328. int i, res;
  329. for (left = cnt, res = 0;
  330. left > 0 && res == 0;
  331. addr += sizeof(data), left -= sizeof(data) - bytes) {
  332. bytes = addr & (sizeof(data) - 1);
  333. addr &= ~(sizeof(data) - 1);
  334. /* combine source and destination data so can program
  335. * an entire word of 16 or 32 bits
  336. */
  337. for (i = 0; i < sizeof(data); i++) {
  338. data <<= 8;
  339. if (i < bytes || i - bytes >= left)
  340. data += *((uchar *) addr + i);
  341. else
  342. data += *src++;
  343. }
  344. /* write one word to the flash */
  345. switch (info->flash_id & FLASH_VENDMASK) {
  346. case FLASH_MAN_AMD:
  347. res = write_word_amd(info, (FPWV *) addr, data);
  348. break;
  349. default:
  350. /* unknown flash type, error! */
  351. printf("missing or unknown FLASH type\n");
  352. res = 1; /* not really a timeout, but gives error */
  353. break;
  354. }
  355. }
  356. return (res);
  357. }
  358. /*-----------------------------------------------------------------------
  359. * Write a word to Flash for AMD FLASH
  360. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  361. * (not an individual chip) is.
  362. *
  363. * returns:
  364. * 0 - OK
  365. * 1 - write timeout
  366. * 2 - Flash not erased
  367. */
  368. static int write_word_amd(flash_info_t * info, FPWV * dest, FPW data) {
  369. ulong start;
  370. int flag;
  371. int res = 0; /* result, assume success */
  372. FPWV *base; /* first address in flash bank */
  373. /* Check if Flash is (sufficiently) erased */
  374. if ((*dest & data) != data) {
  375. return (2);
  376. }
  377. base = (FPWV *) (info->start[0]);
  378. /* Disable interrupts which might cause a timeout here */
  379. flag = disable_interrupts();
  380. base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
  381. base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
  382. base[FLASH_CYCLE1] = (FPW) 0x00A000A0; /* selects program mode */
  383. *dest = data; /* start programming the data */
  384. /* re-enable interrupts if necessary */
  385. if (flag) {
  386. enable_interrupts();
  387. }
  388. start = get_timer(0);
  389. /* data polling for D7 */
  390. while (res == 0
  391. && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
  392. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  393. *dest = (FPW) 0x00F000F0; /* reset bank */
  394. res = 1;
  395. }
  396. }
  397. return (res);
  398. }