flash.c 15 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2003
  6. * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  28. #if defined (CONFIG_TOP860)
  29. typedef unsigned short FLASH_PORT_WIDTH;
  30. typedef volatile unsigned short FLASH_PORT_WIDTHV;
  31. #define FLASH_ID_MASK 0xFF
  32. #define FPW FLASH_PORT_WIDTH
  33. #define FPWV FLASH_PORT_WIDTHV
  34. #define FLASH_CYCLE1 0x0555
  35. #define FLASH_CYCLE2 0x02aa
  36. #define FLASH_ID1 0
  37. #define FLASH_ID2 1
  38. #define FLASH_ID3 0x0e
  39. #define FLASH_ID4 0x0F
  40. #endif
  41. #if defined (CONFIG_TOP5200) && !defined (CONFIG_LITE5200)
  42. typedef unsigned char FLASH_PORT_WIDTH;
  43. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  44. #define FLASH_ID_MASK 0xFF
  45. #define FPW FLASH_PORT_WIDTH
  46. #define FPWV FLASH_PORT_WIDTHV
  47. #define FLASH_CYCLE1 0x0aaa
  48. #define FLASH_CYCLE2 0x0555
  49. #define FLASH_ID1 0
  50. #define FLASH_ID2 2
  51. #define FLASH_ID3 0x1c
  52. #define FLASH_ID4 0x1E
  53. #endif
  54. #if defined (CONFIG_TOP5200) && defined (CONFIG_LITE5200)
  55. typedef unsigned char FLASH_PORT_WIDTH;
  56. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  57. #define FLASH_ID_MASK 0xFF
  58. #define FPW FLASH_PORT_WIDTH
  59. #define FPWV FLASH_PORT_WIDTHV
  60. #define FLASH_CYCLE1 0x0555
  61. #define FLASH_CYCLE2 0x02aa
  62. #define FLASH_ID1 0
  63. #define FLASH_ID2 1
  64. #define FLASH_ID3 0x0E
  65. #define FLASH_ID4 0x0F
  66. #endif
  67. /*-----------------------------------------------------------------------
  68. * Functions
  69. */
  70. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  71. static void flash_reset(flash_info_t *info);
  72. static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
  73. static flash_info_t *flash_get_info(ulong base);
  74. /*-----------------------------------------------------------------------
  75. * flash_init()
  76. *
  77. * sets up flash_info and returns size of FLASH (bytes)
  78. */
  79. unsigned long flash_init (void)
  80. {
  81. unsigned long size = 0;
  82. int i = 0;
  83. extern void flash_preinit(void);
  84. extern void flash_afterinit(uint, ulong, ulong);
  85. ulong flashbase = CFG_FLASH_BASE;
  86. flash_preinit();
  87. /* There is only ONE FLASH device */
  88. memset(&flash_info[i], 0, sizeof(flash_info_t));
  89. flash_info[i].size =
  90. flash_get_size((FPW *)flashbase, &flash_info[i]);
  91. size += flash_info[i].size;
  92. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  93. /* monitor protection ON by default */
  94. flash_protect(FLAG_PROTECT_SET,
  95. CFG_MONITOR_BASE,
  96. CFG_MONITOR_BASE+monitor_flash_len-1,
  97. flash_get_info(CFG_MONITOR_BASE));
  98. #endif
  99. #ifdef CONFIG_ENV_IS_IN_FLASH
  100. /* ENV protection ON by default */
  101. flash_protect(FLAG_PROTECT_SET,
  102. CFG_ENV_ADDR,
  103. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  104. flash_get_info(CFG_ENV_ADDR));
  105. #endif
  106. flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
  107. return size ? size : 1;
  108. }
  109. /*-----------------------------------------------------------------------
  110. */
  111. static void flash_reset(flash_info_t *info)
  112. {
  113. FPWV *base = (FPWV *)(info->start[0]);
  114. /* Put FLASH back in read mode */
  115. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  116. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  117. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  118. *base = (FPW)0x00F000F0; /* AMD Read Mode */
  119. }
  120. /*-----------------------------------------------------------------------
  121. */
  122. static flash_info_t *flash_get_info(ulong base)
  123. {
  124. int i;
  125. flash_info_t * info;
  126. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  127. info = & flash_info[i];
  128. if (info->size &&
  129. info->start[0] <= base && base <= info->start[0] + info->size - 1)
  130. break;
  131. }
  132. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  133. }
  134. /*-----------------------------------------------------------------------
  135. */
  136. void flash_print_info (flash_info_t *info)
  137. {
  138. int i;
  139. uchar *boottype;
  140. uchar *bootletter;
  141. char *fmt;
  142. uchar botbootletter[] = "B";
  143. uchar topbootletter[] = "T";
  144. uchar botboottype[] = "bottom boot sector";
  145. uchar topboottype[] = "top boot sector";
  146. if (info->flash_id == FLASH_UNKNOWN) {
  147. printf ("missing or unknown FLASH type\n");
  148. return;
  149. }
  150. switch (info->flash_id & FLASH_VENDMASK) {
  151. case FLASH_MAN_AMD: printf ("AMD "); break;
  152. #if 0
  153. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  154. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  155. case FLASH_MAN_SST: printf ("SST "); break;
  156. case FLASH_MAN_STM: printf ("STM "); break;
  157. case FLASH_MAN_INTEL: printf ("INTEL "); break;
  158. #endif
  159. default: printf ("Unknown Vendor "); break;
  160. }
  161. /* check for top or bottom boot, if it applies */
  162. if (info->flash_id & FLASH_BTYPE) {
  163. boottype = botboottype;
  164. bootletter = botbootletter;
  165. }
  166. else {
  167. boottype = topboottype;
  168. bootletter = topbootletter;
  169. }
  170. switch (info->flash_id & FLASH_TYPEMASK) {
  171. case FLASH_AM160T:
  172. case FLASH_AM160B:
  173. fmt = "29LV160%s (16 Mbit, %s)\n";
  174. break;
  175. case FLASH_AMLV640U:
  176. fmt = "29LV640M (64 Mbit)\n";
  177. break;
  178. case FLASH_AMDLV065D:
  179. fmt = "29LV065D (64 Mbit)\n";
  180. break;
  181. case FLASH_AMLV256U:
  182. fmt = "29LV256M (256 Mbit)\n";
  183. break;
  184. default:
  185. fmt = "Unknown Chip Type\n";
  186. break;
  187. }
  188. printf (fmt, bootletter, boottype);
  189. printf (" Size: %ld MB in %d Sectors\n",
  190. info->size >> 20,
  191. info->sector_count);
  192. printf (" Sector Start Addresses:");
  193. for (i=0; i<info->sector_count; ++i) {
  194. ulong size;
  195. int erased;
  196. ulong *flash = (unsigned long *) info->start[i];
  197. if ((i % 5) == 0) {
  198. printf ("\n ");
  199. }
  200. /*
  201. * Check if whole sector is erased
  202. */
  203. size =
  204. (i != (info->sector_count - 1)) ?
  205. (info->start[i + 1] - info->start[i]) >> 2 :
  206. (info->start[0] + info->size - info->start[i]) >> 2;
  207. for (
  208. flash = (unsigned long *) info->start[i], erased = 1;
  209. (flash != (unsigned long *) info->start[i] + size) && erased;
  210. flash++
  211. )
  212. erased = *flash == ~0x0UL;
  213. printf (" %08lX %s %s",
  214. info->start[i],
  215. erased ? "E": " ",
  216. info->protect[i] ? "(RO)" : " ");
  217. }
  218. printf ("\n");
  219. }
  220. /*-----------------------------------------------------------------------
  221. */
  222. /*
  223. * The following code cannot be run from FLASH!
  224. */
  225. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  226. {
  227. int i;
  228. /* Write auto select command: read Manufacturer ID */
  229. /* Write auto select command sequence and test FLASH answer */
  230. addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
  231. addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
  232. addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
  233. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  234. * This works for any bus width and any FLASH device width.
  235. */
  236. udelay(100);
  237. switch (addr[FLASH_ID1] & 0xff) {
  238. case (uchar)AMD_MANUFACT:
  239. info->flash_id = FLASH_MAN_AMD;
  240. break;
  241. #if 0
  242. case (uchar)INTEL_MANUFACT:
  243. info->flash_id = FLASH_MAN_INTEL;
  244. break;
  245. #endif
  246. default:
  247. printf ("unknown vendor=%x ", addr[FLASH_ID1] & 0xff);
  248. info->flash_id = FLASH_UNKNOWN;
  249. info->sector_count = 0;
  250. info->size = 0;
  251. break;
  252. }
  253. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  254. if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[FLASH_ID2]) {
  255. case (FPW)AMD_ID_LV160B:
  256. info->flash_id += FLASH_AM160B;
  257. info->sector_count = 35;
  258. info->size = 0x00200000;
  259. info->start[0] = (ulong)addr;
  260. info->start[1] = (ulong)addr + 0x4000;
  261. info->start[2] = (ulong)addr + 0x6000;
  262. info->start[3] = (ulong)addr + 0x8000;
  263. for (i = 4; i < info->sector_count; i++)
  264. {
  265. info->start[i] = (ulong)addr + 0x10000 * (i-3);
  266. }
  267. break;
  268. case (FPW)AMD_ID_LV065D:
  269. info->flash_id += FLASH_AMDLV065D;
  270. info->sector_count = 128;
  271. info->size = 0x00800000;
  272. for (i = 0; i < info->sector_count; i++)
  273. {
  274. info->start[i] = (ulong)addr + 0x10000 * i;
  275. }
  276. break;
  277. case (FPW)AMD_ID_MIRROR:
  278. /* MIRROR BIT FLASH, read more ID bytes */
  279. if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV640U_2 &&
  280. (FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV640U_3)
  281. {
  282. info->flash_id += FLASH_AMLV640U;
  283. info->sector_count = 128;
  284. info->size = 0x00800000;
  285. for (i = 0; i < info->sector_count; i++)
  286. {
  287. info->start[i] = (ulong)addr + 0x10000 * i;
  288. }
  289. break;
  290. }
  291. if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV256U_2 &&
  292. (FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV256U_3)
  293. {
  294. /* attention: only the first 16 MB will be used in u-boot */
  295. info->flash_id += FLASH_AMLV256U;
  296. info->sector_count = 256;
  297. info->size = 0x01000000;
  298. for (i = 0; i < info->sector_count; i++)
  299. {
  300. info->start[i] = (ulong)addr + 0x10000 * i;
  301. }
  302. break;
  303. }
  304. /* fall thru to here ! */
  305. default:
  306. printf ("unknown AMD device=%x %x %x",
  307. (FPW)addr[FLASH_ID2],
  308. (FPW)addr[FLASH_ID3],
  309. (FPW)addr[FLASH_ID4]);
  310. info->flash_id = FLASH_UNKNOWN;
  311. info->sector_count = 0;
  312. info->size = 0x800000;
  313. break;
  314. }
  315. /* Put FLASH back in read mode */
  316. flash_reset(info);
  317. return (info->size);
  318. }
  319. /*-----------------------------------------------------------------------
  320. */
  321. int flash_erase (flash_info_t *info, int s_first, int s_last)
  322. {
  323. FPWV *addr;
  324. int flag, prot, sect;
  325. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  326. ulong start, now, last;
  327. int rcode = 0;
  328. if ((s_first < 0) || (s_first > s_last)) {
  329. if (info->flash_id == FLASH_UNKNOWN) {
  330. printf ("- missing\n");
  331. } else {
  332. printf ("- no sectors to erase\n");
  333. }
  334. return 1;
  335. }
  336. switch (info->flash_id & FLASH_TYPEMASK) {
  337. case FLASH_AM160B:
  338. case FLASH_AMLV640U:
  339. break;
  340. case FLASH_UNKNOWN:
  341. default:
  342. printf ("Can't erase unknown flash type %08lx - aborted\n",
  343. info->flash_id);
  344. return 1;
  345. }
  346. prot = 0;
  347. for (sect=s_first; sect<=s_last; ++sect) {
  348. if (info->protect[sect]) {
  349. prot++;
  350. }
  351. }
  352. if (prot) {
  353. printf ("- Warning: %d protected sectors will not be erased!\n",
  354. prot);
  355. } else {
  356. printf ("\n");
  357. }
  358. last = get_timer(0);
  359. /* Start erase on unprotected sectors */
  360. for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
  361. if (info->protect[sect] != 0) /* protected, skip it */
  362. continue;
  363. /* Disable interrupts which might cause a timeout here */
  364. flag = disable_interrupts();
  365. addr = (FPWV *)(info->start[sect]);
  366. if (intel) {
  367. *addr = (FPW)0x00500050; /* clear status register */
  368. *addr = (FPW)0x00200020; /* erase setup */
  369. *addr = (FPW)0x00D000D0; /* erase confirm */
  370. }
  371. else {
  372. /* must be AMD style if not Intel */
  373. FPWV *base; /* first address in bank */
  374. base = (FPWV *)(info->start[0]);
  375. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  376. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  377. base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
  378. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  379. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  380. *addr = (FPW)0x00300030; /* erase sector */
  381. }
  382. /* re-enable interrupts if necessary */
  383. if (flag)
  384. enable_interrupts();
  385. start = get_timer(0);
  386. /* wait at least 50us for AMD, 80us for Intel.
  387. * Let's wait 1 ms.
  388. */
  389. udelay (1000);
  390. while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
  391. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  392. printf ("Timeout\n");
  393. if (intel) {
  394. /* suspend erase */
  395. *addr = (FPW)0x00B000B0;
  396. }
  397. flash_reset(info); /* reset to read mode */
  398. rcode = 1; /* failed */
  399. break;
  400. }
  401. /* show that we're waiting */
  402. if ((get_timer(last)) > CFG_HZ) {/* every second */
  403. putc ('.');
  404. last = get_timer(0);
  405. }
  406. }
  407. /* show that we're waiting */
  408. if ((get_timer(last)) > CFG_HZ) { /* every second */
  409. putc ('.');
  410. last = get_timer(0);
  411. }
  412. flash_reset(info); /* reset to read mode */
  413. }
  414. printf (" done\n");
  415. return rcode;
  416. }
  417. /*-----------------------------------------------------------------------
  418. * Copy memory to flash, returns:
  419. * 0 - OK
  420. * 1 - write timeout
  421. * 2 - Flash not erased
  422. */
  423. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  424. {
  425. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  426. int bytes; /* number of bytes to program in current word */
  427. int left; /* number of bytes left to program */
  428. int i, res;
  429. for (left = cnt, res = 0;
  430. left > 0 && res == 0;
  431. addr += sizeof(data), left -= sizeof(data) - bytes) {
  432. bytes = addr & (sizeof(data) - 1);
  433. addr &= ~(sizeof(data) - 1);
  434. /* combine source and destination data so can program
  435. * an entire word of 16 or 32 bits
  436. */
  437. for (i = 0; i < sizeof(data); i++) {
  438. data <<= 8;
  439. if (i < bytes || i - bytes >= left )
  440. data += *((uchar *)addr + i);
  441. else
  442. data += *src++;
  443. }
  444. /* write one word to the flash */
  445. switch (info->flash_id & FLASH_VENDMASK) {
  446. case FLASH_MAN_AMD:
  447. res = write_word_amd(info, (FPWV *)addr, data);
  448. break;
  449. default:
  450. /* unknown flash type, error! */
  451. printf ("missing or unknown FLASH type\n");
  452. res = 1; /* not really a timeout, but gives error */
  453. break;
  454. }
  455. }
  456. return (res);
  457. }
  458. /*-----------------------------------------------------------------------
  459. * Write a word to Flash for AMD FLASH
  460. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  461. * (not an individual chip) is.
  462. *
  463. * returns:
  464. * 0 - OK
  465. * 1 - write timeout
  466. * 2 - Flash not erased
  467. */
  468. static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
  469. {
  470. ulong start;
  471. int flag;
  472. int res = 0; /* result, assume success */
  473. FPWV *base; /* first address in flash bank */
  474. /* Check if Flash is (sufficiently) erased */
  475. if ((*dest & data) != data) {
  476. return (2);
  477. }
  478. base = (FPWV *)(info->start[0]);
  479. /* Disable interrupts which might cause a timeout here */
  480. flag = disable_interrupts();
  481. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  482. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  483. base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
  484. *dest = data; /* start programming the data */
  485. /* re-enable interrupts if necessary */
  486. if (flag)
  487. enable_interrupts();
  488. start = get_timer (0);
  489. /* data polling for D7 */
  490. while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
  491. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  492. *dest = (FPW)0x00F000F0; /* reset bank */
  493. res = 1;
  494. }
  495. }
  496. return (res);
  497. }