flash.c 11 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <mpc824x.h>
  25. #include <asm/processor.h>
  26. #if defined(CONFIG_ENV_IS_IN_FLASH)
  27. # ifndef CFG_ENV_ADDR
  28. # define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
  29. # endif
  30. # ifndef CFG_ENV_SIZE
  31. # define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
  32. # endif
  33. # ifndef CFG_ENV_SECT_SIZE
  34. # define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
  35. # endif
  36. #endif
  37. #define FLASH_BANK_SIZE 0x800000
  38. #define MAIN_SECT_SIZE 0x40000
  39. #define PARAM_SECT_SIZE 0x8000
  40. #define BOARD_CTRL_REG 0xFE800013
  41. flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
  42. static int write_data (flash_info_t *info, ulong dest, ulong *data);
  43. static void write_via_fpu(vu_long *addr, ulong *data);
  44. static __inline__ unsigned long get_msr(void);
  45. static __inline__ void set_msr(unsigned long msr);
  46. /*---------------------------------------------------------------------*/
  47. #undef DEBUG_FLASH
  48. /*---------------------------------------------------------------------*/
  49. #ifdef DEBUG_FLASH
  50. #define DEBUGF(fmt,args...) printf(fmt ,##args)
  51. #else
  52. #define DEBUGF(fmt,args...)
  53. #endif
  54. /*---------------------------------------------------------------------*/
  55. /*-----------------------------------------------------------------------
  56. */
  57. unsigned long flash_init(void)
  58. {
  59. int i, j;
  60. ulong size = 0;
  61. volatile unsigned char *bcr = (volatile unsigned char *)(BOARD_CTRL_REG);
  62. DEBUGF("Write protect was: 0x%02X\n", *bcr);
  63. *bcr &= 0x1; /* FWPT must be 0 */
  64. *bcr |= 0x6; /* FWP0 = FWP1 = 1 */
  65. DEBUGF("Write protect is: 0x%02X\n", *bcr);
  66. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  67. vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
  68. addr[0] = 0x00900090;
  69. DEBUGF ("Flash bank # %d:\n"
  70. "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
  71. "\tDevice ID @ 0x%08lX: 0x%08lX\n",
  72. i,
  73. (ulong)(&addr[0]), addr[0],
  74. (ulong)(&addr[2]), addr[2]);
  75. if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT) &&
  76. (addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3B))
  77. {
  78. flash_info[i].flash_id = (FLASH_MAN_INTEL & FLASH_VENDMASK) |
  79. (INTEL_ID_28F160F3B & FLASH_TYPEMASK);
  80. } else {
  81. flash_info[i].flash_id = FLASH_UNKNOWN;
  82. addr[0] = 0xFFFFFFFF;
  83. goto Done;
  84. }
  85. DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
  86. addr[0] = 0xFFFFFFFF;
  87. flash_info[i].size = FLASH_BANK_SIZE;
  88. flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
  89. memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
  90. for (j = 0; j < flash_info[i].sector_count; j++) {
  91. if (j <= 7) {
  92. flash_info[i].start[j] = CFG_FLASH_BASE +
  93. i * FLASH_BANK_SIZE +
  94. j * PARAM_SECT_SIZE;
  95. } else {
  96. flash_info[i].start[j] = CFG_FLASH_BASE +
  97. i * FLASH_BANK_SIZE +
  98. (j - 7)*MAIN_SECT_SIZE;
  99. }
  100. }
  101. size += flash_info[i].size;
  102. }
  103. /* Protect monitor and environment sectors
  104. */
  105. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  106. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
  107. flash_protect(FLAG_PROTECT_SET,
  108. CFG_MONITOR_BASE,
  109. CFG_MONITOR_BASE + monitor_flash_len - 1,
  110. &flash_info[1]);
  111. #else
  112. flash_protect(FLAG_PROTECT_SET,
  113. CFG_MONITOR_BASE,
  114. CFG_MONITOR_BASE + monitor_flash_len - 1,
  115. &flash_info[0]);
  116. #endif
  117. #endif
  118. #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CFG_ENV_ADDR)
  119. #if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE
  120. flash_protect(FLAG_PROTECT_SET,
  121. CFG_ENV_ADDR,
  122. CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
  123. &flash_info[1]);
  124. #else
  125. flash_protect(FLAG_PROTECT_SET,
  126. CFG_ENV_ADDR,
  127. CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
  128. &flash_info[0]);
  129. #endif
  130. #endif
  131. Done:
  132. return size;
  133. }
  134. /*-----------------------------------------------------------------------
  135. */
  136. void flash_print_info (flash_info_t * info)
  137. {
  138. int i;
  139. switch ((i = info->flash_id & FLASH_VENDMASK)) {
  140. case (FLASH_MAN_INTEL & FLASH_VENDMASK):
  141. printf ("Intel: ");
  142. break;
  143. default:
  144. printf ("Unknown Vendor 0x%04x ", i);
  145. break;
  146. }
  147. switch ((i = info->flash_id & FLASH_TYPEMASK)) {
  148. case (INTEL_ID_28F160F3B & FLASH_TYPEMASK):
  149. printf ("28F160F3B (16Mbit)\n");
  150. break;
  151. default:
  152. printf ("Unknown Chip Type 0x%04x\n", i);
  153. goto Done;
  154. break;
  155. }
  156. printf (" Size: %ld MB in %d Sectors\n",
  157. info->size >> 20, info->sector_count);
  158. printf (" Sector Start Addresses:");
  159. for (i = 0; i < info->sector_count; i++) {
  160. if ((i % 5) == 0) {
  161. printf ("\n ");
  162. }
  163. printf (" %08lX%s", info->start[i],
  164. info->protect[i] ? " (RO)" : " ");
  165. }
  166. printf ("\n");
  167. Done:
  168. return;
  169. }
  170. /*-----------------------------------------------------------------------
  171. */
  172. int flash_erase (flash_info_t *info, int s_first, int s_last)
  173. {
  174. int flag, prot, sect;
  175. ulong start, now, last;
  176. DEBUGF ("Erase flash bank %d sect %d ... %d\n",
  177. info - &flash_info[0], s_first, s_last);
  178. if ((s_first < 0) || (s_first > s_last)) {
  179. if (info->flash_id == FLASH_UNKNOWN) {
  180. printf ("- missing\n");
  181. } else {
  182. printf ("- no sectors to erase\n");
  183. }
  184. return 1;
  185. }
  186. if ((info->flash_id & FLASH_VENDMASK) !=
  187. (FLASH_MAN_INTEL & FLASH_VENDMASK)) {
  188. printf ("Can erase only Intel flash types - aborted\n");
  189. return 1;
  190. }
  191. prot = 0;
  192. for (sect=s_first; sect<=s_last; ++sect) {
  193. if (info->protect[sect]) {
  194. prot++;
  195. }
  196. }
  197. if (prot) {
  198. printf ("- Warning: %d protected sectors will not be erased!\n",
  199. prot);
  200. } else {
  201. printf ("\n");
  202. }
  203. start = get_timer (0);
  204. last = start;
  205. /* Start erase on unprotected sectors */
  206. for (sect = s_first; sect<=s_last; sect++) {
  207. if (info->protect[sect] == 0) { /* not protected */
  208. vu_long *addr = (vu_long *)(info->start[sect]);
  209. DEBUGF ("Erase sect %d @ 0x%08lX\n",
  210. sect, (ulong)addr);
  211. /* Disable interrupts which might cause a timeout
  212. * here.
  213. */
  214. flag = disable_interrupts();
  215. addr[0] = 0x00500050; /* clear status register */
  216. addr[0] = 0x00200020; /* erase setup */
  217. addr[0] = 0x00D000D0; /* erase confirm */
  218. addr[1] = 0x00500050; /* clear status register */
  219. addr[1] = 0x00200020; /* erase setup */
  220. addr[1] = 0x00D000D0; /* erase confirm */
  221. /* re-enable interrupts if necessary */
  222. if (flag)
  223. enable_interrupts();
  224. /* wait at least 80us - let's wait 1 ms */
  225. udelay (1000);
  226. while (((addr[0] & 0x00800080) != 0x00800080) ||
  227. ((addr[1] & 0x00800080) != 0x00800080) ) {
  228. if ((now=get_timer(start)) >
  229. CFG_FLASH_ERASE_TOUT) {
  230. printf ("Timeout\n");
  231. addr[0] = 0x00B000B0; /* suspend erase */
  232. addr[0] = 0x00FF00FF; /* to read mode */
  233. return 1;
  234. }
  235. /* show that we're waiting */
  236. if ((now - last) > 1000) { /* every second */
  237. putc ('.');
  238. last = now;
  239. }
  240. }
  241. addr[0] = 0x00FF00FF;
  242. }
  243. }
  244. printf (" done\n");
  245. return 0;
  246. }
  247. /*-----------------------------------------------------------------------
  248. * Copy memory to flash, returns:
  249. * 0 - OK
  250. * 1 - write timeout
  251. * 2 - Flash not erased
  252. * 4 - Flash not identified
  253. */
  254. #define FLASH_WIDTH 8 /* flash bus width in bytes */
  255. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  256. {
  257. ulong wp, cp, msr;
  258. int l, rc, i;
  259. ulong data[2];
  260. ulong *datah = &data[0];
  261. ulong *datal = &data[1];
  262. DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
  263. addr, (ulong)src, cnt);
  264. if (info->flash_id == FLASH_UNKNOWN) {
  265. return 4;
  266. }
  267. msr = get_msr();
  268. set_msr(msr | MSR_FP);
  269. wp = (addr & ~(FLASH_WIDTH-1)); /* get lower aligned address */
  270. /*
  271. * handle unaligned start bytes
  272. */
  273. if ((l = addr - wp) != 0) {
  274. *datah = *datal = 0;
  275. for (i = 0, cp = wp; i < l; i++, cp++) {
  276. if (i >= 4) {
  277. *datah = (*datah << 8) |
  278. ((*datal & 0xFF000000) >> 24);
  279. }
  280. *datal = (*datal << 8) | (*(uchar *)cp);
  281. }
  282. for (; i < FLASH_WIDTH && cnt > 0; ++i) {
  283. char tmp;
  284. tmp = *src;
  285. src++;
  286. if (i >= 4) {
  287. *datah = (*datah << 8) |
  288. ((*datal & 0xFF000000) >> 24);
  289. }
  290. *datal = (*datal << 8) | tmp;
  291. --cnt; ++cp;
  292. }
  293. for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
  294. if (i >= 4) {
  295. *datah = (*datah << 8) |
  296. ((*datal & 0xFF000000) >> 24);
  297. }
  298. *datal = (*datah << 8) | (*(uchar *)cp);
  299. }
  300. if ((rc = write_data(info, wp, data)) != 0) {
  301. set_msr(msr);
  302. return (rc);
  303. }
  304. wp += FLASH_WIDTH;
  305. }
  306. /*
  307. * handle FLASH_WIDTH aligned part
  308. */
  309. while (cnt >= FLASH_WIDTH) {
  310. *datah = *(ulong *)src;
  311. *datal = *(ulong *)(src + 4);
  312. if ((rc = write_data(info, wp, data)) != 0) {
  313. set_msr(msr);
  314. return (rc);
  315. }
  316. wp += FLASH_WIDTH;
  317. cnt -= FLASH_WIDTH;
  318. src += FLASH_WIDTH;
  319. }
  320. if (cnt == 0) {
  321. set_msr(msr);
  322. return (0);
  323. }
  324. /*
  325. * handle unaligned tail bytes
  326. */
  327. *datah = *datal = 0;
  328. for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
  329. char tmp;
  330. tmp = *src;
  331. src++;
  332. if (i >= 4) {
  333. *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
  334. }
  335. *datal = (*datal << 8) | tmp;
  336. --cnt;
  337. }
  338. for (; i < FLASH_WIDTH; ++i, ++cp) {
  339. if (i >= 4) {
  340. *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
  341. }
  342. *datal = (*datal << 8) | (*(uchar *)cp);
  343. }
  344. rc = write_data(info, wp, data);
  345. set_msr(msr);
  346. return (rc);
  347. }
  348. /*-----------------------------------------------------------------------
  349. * Write a word to Flash, returns:
  350. * 0 - OK
  351. * 1 - write timeout
  352. * 2 - Flash not erased
  353. */
  354. static int write_data (flash_info_t *info, ulong dest, ulong *data)
  355. {
  356. vu_long *addr = (vu_long *)dest;
  357. ulong start;
  358. int flag;
  359. /* Check if Flash is (sufficiently) erased */
  360. if (((addr[0] & data[0]) != data[0]) ||
  361. ((addr[1] & data[1]) != data[1]) ) {
  362. return (2);
  363. }
  364. /* Disable interrupts which might cause a timeout here */
  365. flag = disable_interrupts();
  366. addr[0] = 0x00400040; /* write setup */
  367. write_via_fpu(addr, data);
  368. /* re-enable interrupts if necessary */
  369. if (flag)
  370. enable_interrupts();
  371. start = get_timer (0);
  372. while (((addr[0] & 0x00800080) != 0x00800080) ||
  373. ((addr[1] & 0x00800080) != 0x00800080) ) {
  374. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  375. addr[0] = 0x00FF00FF; /* restore read mode */
  376. return (1);
  377. }
  378. }
  379. addr[0] = 0x00FF00FF; /* restore read mode */
  380. return (0);
  381. }
  382. /*-----------------------------------------------------------------------
  383. */
  384. static void write_via_fpu(vu_long *addr, ulong *data)
  385. {
  386. __asm__ __volatile__ ("lfd 1, 0(%0)" : : "r" (data));
  387. __asm__ __volatile__ ("stfd 1, 0(%0)" : : "r" (addr));
  388. }
  389. /*-----------------------------------------------------------------------
  390. */
  391. static __inline__ unsigned long get_msr(void)
  392. {
  393. unsigned long msr;
  394. __asm__ __volatile__ ("mfmsr %0" : "=r" (msr) :);
  395. return msr;
  396. }
  397. static __inline__ void set_msr(unsigned long msr)
  398. {
  399. __asm__ __volatile__ ("mtmsr %0" : : "r" (msr));
  400. }