Makefile.build 14 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. # ==========================================================================
  3. # Building
  4. # ==========================================================================
  5. # Modified for U-Boot
  6. prefix := tpl
  7. src := $(patsubst $(prefix)/%,%,$(obj))
  8. ifeq ($(obj),$(src))
  9. prefix := spl
  10. src := $(patsubst $(prefix)/%,%,$(obj))
  11. ifeq ($(obj),$(src))
  12. prefix := .
  13. endif
  14. endif
  15. PHONY := __build
  16. __build:
  17. # Init all relevant variables used in kbuild files so
  18. # 1) they have correct type
  19. # 2) they do not inherit any value from the environment
  20. obj-y :=
  21. obj-m :=
  22. lib-y :=
  23. lib-m :=
  24. always :=
  25. targets :=
  26. subdir-y :=
  27. subdir-m :=
  28. EXTRA_AFLAGS :=
  29. EXTRA_CFLAGS :=
  30. EXTRA_CPPFLAGS :=
  31. EXTRA_LDFLAGS :=
  32. asflags-y :=
  33. ccflags-y :=
  34. cppflags-y :=
  35. ldflags-y :=
  36. subdir-asflags-y :=
  37. subdir-ccflags-y :=
  38. # Read auto.conf if it exists, otherwise ignore
  39. # Modified for U-Boot
  40. -include include/config/auto.conf
  41. -include $(prefix)/include/autoconf.mk
  42. include scripts/Makefile.uncmd_spl
  43. include scripts/Kbuild.include
  44. # For backward compatibility check that these variables do not change
  45. save-cflags := $(CFLAGS)
  46. # The filename Kbuild has precedence over Makefile
  47. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  48. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  49. include $(kbuild-file)
  50. # Added for U-Boot
  51. asflags-y += $(PLATFORM_CPPFLAGS)
  52. ccflags-y += $(PLATFORM_CPPFLAGS)
  53. cppflags-y += $(PLATFORM_CPPFLAGS)
  54. # If the save-* variables changed error out
  55. ifeq ($(KBUILD_NOPEDANTIC),)
  56. ifneq ("$(save-cflags)","$(CFLAGS)")
  57. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  58. endif
  59. endif
  60. include scripts/Makefile.lib
  61. ifdef host-progs
  62. ifneq ($(hostprogs-y),$(host-progs))
  63. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  64. hostprogs-y += $(host-progs)
  65. endif
  66. endif
  67. # Do not include host rules unless needed
  68. ifneq ($(hostprogs-y)$(hostprogs-m),)
  69. include scripts/Makefile.host
  70. endif
  71. # Uncommented for U-Boot
  72. # We need to create output dicrectory for SPL and TPL even for in-tree build
  73. #ifneq ($(KBUILD_SRC),)
  74. # Create output directory if not already present
  75. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  76. # Create directories for object files if directory does not exist
  77. # Needed when obj-y := dir/file.o syntax is used
  78. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  79. #endif
  80. ifndef obj
  81. $(warning kbuild: Makefile.build is included improperly)
  82. endif
  83. # ===========================================================================
  84. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  85. lib-target := $(obj)/lib.a
  86. endif
  87. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  88. builtin-target := $(obj)/built-in.o
  89. endif
  90. modorder-target := $(obj)/modules.order
  91. # We keep a list of all modules in $(MODVERDIR)
  92. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  93. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  94. $(subdir-ym) $(always)
  95. @:
  96. # Linus' kernel sanity checking tool
  97. ifneq ($(KBUILD_CHECKSRC),0)
  98. ifeq ($(KBUILD_CHECKSRC),2)
  99. quiet_cmd_force_checksrc = CHECK $<
  100. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  101. else
  102. quiet_cmd_checksrc = CHECK $<
  103. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  104. endif
  105. endif
  106. # Do section mismatch analysis for each module/built-in.o
  107. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  108. cmd_secanalysis = ; scripts/mod/modpost $@
  109. endif
  110. # Compile C sources (.c)
  111. # ---------------------------------------------------------------------------
  112. # Default is built-in, unless we know otherwise
  113. modkern_cflags = \
  114. $(if $(part-of-module), \
  115. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  116. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  117. quiet_modtag := $(empty) $(empty)
  118. $(real-objs-m) : part-of-module := y
  119. $(real-objs-m:.o=.i) : part-of-module := y
  120. $(real-objs-m:.o=.s) : part-of-module := y
  121. $(real-objs-m:.o=.lst): part-of-module := y
  122. $(real-objs-m) : quiet_modtag := [M]
  123. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  124. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  125. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  126. $(obj-m) : quiet_modtag := [M]
  127. # Default for not multi-part modules
  128. modname = $(basetarget)
  129. $(multi-objs-m) : modname = $(modname-multi)
  130. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  131. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  132. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  133. $(multi-objs-y) : modname = $(modname-multi)
  134. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  135. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  136. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  137. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  138. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  139. $(obj)/%.s: $(src)/%.c FORCE
  140. $(call if_changed_dep,cc_s_c)
  141. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  142. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  143. $(obj)/%.i: $(src)/%.c FORCE
  144. $(call if_changed_dep,cc_i_c)
  145. cmd_gensymtypes = \
  146. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  147. $(GENKSYMS) $(if $(1), -T $(2)) \
  148. $(if $(KBUILD_PRESERVE),-p) \
  149. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  150. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  151. cmd_cc_symtypes_c = \
  152. set -e; \
  153. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  154. test -s $@ || rm -f $@
  155. $(obj)/%.symtypes : $(src)/%.c FORCE
  156. $(call cmd,cc_symtypes_c)
  157. # C (.c) files
  158. # The C file is compiled and updated dependency information is generated.
  159. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  160. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  161. ifndef CONFIG_MODVERSIONS
  162. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  163. else
  164. # When module versioning is enabled the following steps are executed:
  165. # o compile a .tmp_<file>.o from <file>.c
  166. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  167. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  168. # are done.
  169. # o otherwise, we calculate symbol versions using the good old
  170. # genksyms on the preprocessed source and postprocess them in a way
  171. # that they are usable as a linker script
  172. # o generate <file>.o from .tmp_<file>.o using the linker to
  173. # replace the unresolved symbols __crc_exported_symbol with
  174. # the actual value of the checksum generated by genksyms
  175. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  176. cmd_modversions = \
  177. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  178. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  179. > $(@D)/.tmp_$(@F:.o=.ver); \
  180. \
  181. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  182. -T $(@D)/.tmp_$(@F:.o=.ver); \
  183. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  184. else \
  185. mv -f $(@D)/.tmp_$(@F) $@; \
  186. fi;
  187. endif
  188. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  189. # gcc 5 supports generating the mcount tables directly
  190. ifneq ($(call cc-option,-mrecord-mcount,y),y)
  191. KBUILD_CFLAGS += -mrecord-mcount
  192. else
  193. # else do it all manually
  194. ifdef BUILD_C_RECORDMCOUNT
  195. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  196. RECORDMCOUNT_FLAGS = -w
  197. endif
  198. # Due to recursion, we must skip empty.o.
  199. # The empty.o file is created in the make process in order to determine
  200. # the target endianness and word size. It is made before all other C
  201. # files, including recordmcount.
  202. sub_cmd_record_mcount = \
  203. if [ $(@) != "scripts/mod/empty.o" ]; then \
  204. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  205. fi;
  206. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  207. $(srctree)/scripts/recordmcount.h
  208. else
  209. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  210. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  211. "$(if $(CONFIG_64BIT),64,32)" \
  212. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
  213. "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
  214. "$(if $(part-of-module),1,0)" "$(@)";
  215. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  216. endif
  217. cmd_record_mcount = \
  218. if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
  219. "$(CC_FLAGS_FTRACE)" ]; then \
  220. $(sub_cmd_record_mcount) \
  221. fi;
  222. endif # -record-mcount
  223. endif
  224. define rule_cc_o_c
  225. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  226. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  227. $(cmd_modversions) \
  228. $(call echo-cmd,record_mcount) \
  229. $(cmd_record_mcount) \
  230. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  231. $(dot-target).tmp; \
  232. rm -f $(depfile); \
  233. mv -f $(dot-target).tmp $(dot-target).cmd
  234. endef
  235. # Built-in and composite module parts
  236. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  237. $(call cmd,force_checksrc)
  238. $(call if_changed_rule,cc_o_c)
  239. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  240. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  241. $(call cmd,force_checksrc)
  242. $(call if_changed_rule,cc_o_c)
  243. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  244. quiet_cmd_cc_lst_c = MKLST $@
  245. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  246. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  247. System.map $(OBJDUMP) > $@
  248. $(obj)/%.lst: $(src)/%.c FORCE
  249. $(call if_changed_dep,cc_lst_c)
  250. # Compile assembler sources (.S)
  251. # ---------------------------------------------------------------------------
  252. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  253. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  254. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  255. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  256. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  257. $(obj)/%.s: $(src)/%.S FORCE
  258. $(call if_changed_dep,as_s_S)
  259. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  260. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  261. $(obj)/%.o: $(src)/%.S FORCE
  262. $(call if_changed_dep,as_o_S)
  263. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  264. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  265. # Linker scripts preprocessor (.lds.S -> .lds)
  266. # ---------------------------------------------------------------------------
  267. quiet_cmd_cpp_lds_S = LDS $@
  268. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  269. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  270. $(obj)/%.lds: $(src)/%.lds.S FORCE
  271. $(call if_changed_dep,cpp_lds_S)
  272. # ASN.1 grammar
  273. # ---------------------------------------------------------------------------
  274. quiet_cmd_asn1_compiler = ASN.1 $@
  275. cmd_asn1_compiler = $(objtree)/tools/asn1_compiler $< \
  276. $(subst .h,.c,$@) $(subst .c,.h,$@)
  277. $(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/tools/asn1_compiler
  278. $(call cmd,asn1_compiler)
  279. # Build the compiled-in targets
  280. # ---------------------------------------------------------------------------
  281. # To build objects in subdirs, we need to descend into the directories
  282. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  283. #
  284. # Rule to compile a set of .o files into one .o file
  285. #
  286. ifdef builtin-target
  287. quiet_cmd_link_o_target = LD $@
  288. # If the list of objects to link is empty, just create an empty built-in.o
  289. cmd_link_o_target = $(if $(strip $(obj-y)),\
  290. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  291. $(cmd_secanalysis),\
  292. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  293. $(builtin-target): $(obj-y) FORCE
  294. $(call if_changed,link_o_target)
  295. targets += $(builtin-target)
  296. endif # builtin-target
  297. #
  298. # Rule to create modules.order file
  299. #
  300. # Create commands to either record .ko file or cat modules.order from
  301. # a subdirectory
  302. modorder-cmds = \
  303. $(foreach m, $(modorder), \
  304. $(if $(filter %/modules.order, $m), \
  305. cat $m;, echo kernel/$m;))
  306. $(modorder-target): $(subdir-ym) FORCE
  307. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  308. #
  309. # Rule to compile a set of .o files into one .a file
  310. #
  311. ifdef lib-target
  312. quiet_cmd_link_l_target = AR $@
  313. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  314. $(lib-target): $(lib-y) FORCE
  315. $(call if_changed,link_l_target)
  316. targets += $(lib-target)
  317. endif
  318. #
  319. # Rule to link composite objects
  320. #
  321. # Composite objects are specified in kbuild makefile as follows:
  322. # <composite-object>-objs := <list of .o files>
  323. # or
  324. # <composite-object>-y := <list of .o files>
  325. link_multi_deps = \
  326. $(filter $(addprefix $(obj)/, \
  327. $($(subst $(obj)/,,$(@:.o=-objs))) \
  328. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  329. quiet_cmd_link_multi-y = LD $@
  330. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  331. quiet_cmd_link_multi-m = LD [M] $@
  332. cmd_link_multi-m = $(cmd_link_multi-y)
  333. $(multi-used-y): FORCE
  334. $(call if_changed,link_multi-y)
  335. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  336. $(multi-used-m): FORCE
  337. $(call if_changed,link_multi-m)
  338. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  339. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  340. targets += $(multi-used-y) $(multi-used-m)
  341. # Add intermediate targets:
  342. # When building objects with specific suffix patterns, add intermediate
  343. # targets that the final targets are derived from.
  344. intermediate_targets = $(foreach sfx, $(2), \
  345. $(patsubst %$(strip $(1)),%$(sfx), \
  346. $(filter %$(strip $(1)), $(targets))))
  347. # %.lex.o <- %.lex.c <- %.l
  348. # %.tab.o <- %.tab.[ch] <- %.y
  349. targets += $(call intermediate_targets, .lex.o, .lex.c) \
  350. $(call intermediate_targets, .tab.o, .tab.c .tab.h)
  351. # Descending
  352. # ---------------------------------------------------------------------------
  353. PHONY += $(subdir-ym)
  354. $(subdir-ym):
  355. $(Q)$(MAKE) $(build)=$@
  356. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  357. # ---------------------------------------------------------------------------
  358. PHONY += FORCE
  359. FORCE:
  360. # Read all saved command lines and dependencies for the $(targets) we
  361. # may be building above, using $(if_changed{,_dep}). As an
  362. # optimization, we don't need to read them if the target does not
  363. # exist, we will rebuild anyway in that case.
  364. targets := $(wildcard $(sort $(targets)))
  365. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  366. ifneq ($(cmd_files),)
  367. include $(cmd_files)
  368. endif
  369. .PHONY: $(PHONY)