zmx25.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (c) 2011 Graf-Syteco, Matthias Weisser
  4. * <weisserm@arcor.de>
  5. *
  6. * Configuation settings for the zmx25 board
  7. */
  8. #ifndef __CONFIG_H
  9. #define __CONFIG_H
  10. #include <asm/arch/imx-regs.h>
  11. #define CONFIG_SYS_TIMER_RATE 32768
  12. #define CONFIG_SYS_TIMER_COUNTER \
  13. (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
  14. #define CONFIG_MACH_TYPE MACH_TYPE_ZMX25
  15. /*
  16. * Environment settings
  17. */
  18. #define CONFIG_EXTRA_ENV_SETTINGS \
  19. "gs_fast_boot=setenv bootdelay 5\0" \
  20. "gs_slow_boot=setenv bootdelay 10\0" \
  21. "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
  22. "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
  23. "bootm 0x81000000; bootelf 0x81000000\0"
  24. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  25. #define CONFIG_SETUP_MEMORY_TAGS
  26. #define CONFIG_INITRD_TAG
  27. /*
  28. * Hardware drivers
  29. */
  30. /*
  31. * Serial
  32. */
  33. #define CONFIG_MXC_UART
  34. #define CONFIG_MXC_UART_BASE UART2_BASE
  35. /*
  36. * Ethernet
  37. */
  38. #define CONFIG_FEC_MXC
  39. #define CONFIG_FEC_MXC_PHYADDR 0x00
  40. #define CONFIG_MII
  41. /*
  42. * BOOTP options
  43. */
  44. #define CONFIG_BOOTP_BOOTFILESIZE
  45. /*
  46. * Command line configuration.
  47. */
  48. /*
  49. * Additional command
  50. */
  51. /*
  52. * USB
  53. */
  54. #ifdef CONFIG_CMD_USB
  55. #define CONFIG_USB_EHCI_MXC
  56. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  57. #define CONFIG_MXC_USB_PORT 1
  58. #define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL
  59. #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
  60. #define CONFIG_EHCI_IS_TDI
  61. #endif /* CONFIG_CMD_USB */
  62. /* SDRAM */
  63. #define CONFIG_NR_DRAM_BANKS 1
  64. #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */
  65. #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
  66. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  67. #define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */
  68. /*
  69. * FLASH and environment organization
  70. */
  71. #define CONFIG_SYS_FLASH_BASE 0xA0000000
  72. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  73. #define CONFIG_SYS_MAX_FLASH_SECT 256
  74. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
  75. #define CONFIG_ENV_SECT_SIZE (128 * 1024)
  76. #define CONFIG_ENV_SIZE (128 * 1024)
  77. /*
  78. * CFI FLASH driver setup
  79. */
  80. #define CONFIG_SYS_FLASH_CFI
  81. #define CONFIG_FLASH_CFI_DRIVER
  82. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */
  83. #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
  84. #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024))
  85. #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE)
  86. #define CONFIG_PREBOOT ""
  87. /*
  88. * Size of malloc() pool
  89. */
  90. #define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000)
  91. #endif /* __CONFIG_H */