pcm058.h 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) Stefano Babic <sbabic@denx.de>
  4. */
  5. #ifndef __PCM058_CONFIG_H
  6. #define __PCM058_CONFIG_H
  7. #ifdef CONFIG_SPL
  8. #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
  9. #include "imx6_spl.h"
  10. #endif
  11. #include "mx6_common.h"
  12. /* Thermal */
  13. #define CONFIG_IMX_THERMAL
  14. /* Serial */
  15. #define CONFIG_MXC_UART
  16. #define CONFIG_MXC_UART_BASE UART2_BASE
  17. #define CONSOLE_DEV "ttymxc1"
  18. #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
  19. /* Early setup */
  20. /* Size of malloc() pool */
  21. #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
  22. /* Ethernet */
  23. #define CONFIG_FEC_MXC
  24. #define CONFIG_MII
  25. #define IMX_FEC_BASE ENET_BASE_ADDR
  26. #define CONFIG_FEC_XCV_TYPE RGMII
  27. #define CONFIG_ETHPRIME "FEC"
  28. #define CONFIG_FEC_MXC_PHYADDR 3
  29. /* SPI Flash */
  30. #define CONFIG_SF_DEFAULT_BUS 0
  31. #define CONFIG_SF_DEFAULT_CS 0
  32. #define CONFIG_SF_DEFAULT_SPEED 20000000
  33. #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
  34. /* I2C Configs */
  35. #define CONFIG_SYS_I2C
  36. #define CONFIG_SYS_I2C_MXC
  37. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
  38. #define CONFIG_SYS_I2C_SPEED 100000
  39. #ifndef CONFIG_SPL_BUILD
  40. /* Enable NAND support */
  41. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  42. #define CONFIG_SYS_NAND_BASE 0x40000000
  43. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  44. #define CONFIG_SYS_NAND_ONFI_DETECTION
  45. #endif
  46. /* DMA stuff, needed for GPMI/MXS NAND support */
  47. /* Filesystem support */
  48. #define CONFIG_MTD_PARTITIONS
  49. #define CONFIG_MTD_DEVICE
  50. /* Physical Memory Map */
  51. #define CONFIG_NR_DRAM_BANKS 1
  52. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  53. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  54. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  55. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  56. #define CONFIG_SYS_INIT_SP_OFFSET \
  57. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  58. #define CONFIG_SYS_INIT_SP_ADDR \
  59. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  60. /* MMC Configs */
  61. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  62. #define CONFIG_SYS_FSL_USDHC_NUM 1
  63. /* Environment organization */
  64. #define CONFIG_ENV_SIZE (16 * 1024)
  65. #define CONFIG_ENV_OFFSET (1024 * SZ_1K)
  66. #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
  67. #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
  68. #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
  69. #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
  70. #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
  71. #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  72. #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
  73. CONFIG_ENV_SECT_SIZE)
  74. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  75. #ifdef CONFIG_ENV_IS_IN_NAND
  76. #define CONFIG_ENV_OFFSET (0x1E0000)
  77. #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
  78. #endif
  79. #endif