mx53ppd.h 6.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2011 Freescale Semiconductor, Inc.
  4. * Jason Liu <r64343@freescale.com>
  5. *
  6. * Configuration settings for Freescale MX53 low cost board.
  7. */
  8. #ifndef __CONFIG_H
  9. #define __CONFIG_H
  10. #include <asm/arch/imx-regs.h>
  11. #define CONSOLE_DEV "ttymxc0"
  12. #define CONFIG_CMDLINE_TAG
  13. #define CONFIG_SETUP_MEMORY_TAGS
  14. #define CONFIG_INITRD_TAG
  15. #define CONFIG_SYS_FSL_CLK
  16. /* Size of malloc() pool */
  17. #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
  18. #define CONFIG_HW_WATCHDOG
  19. #define CONFIG_IMX_WATCHDOG
  20. #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
  21. #define CONFIG_MISC_INIT_R
  22. #define CONFIG_BOARD_LATE_INIT
  23. #define CONFIG_REVISION_TAG
  24. #define CONFIG_MXC_UART
  25. #define CONFIG_MXC_UART_BASE UART1_BASE
  26. /* MMC Configs */
  27. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  28. #define CONFIG_SYS_FSL_ESDHC_NUM 2
  29. /* Eth Configs */
  30. #define CONFIG_MII
  31. #define CONFIG_FEC_MXC
  32. #define IMX_FEC_BASE FEC_BASE_ADDR
  33. #define CONFIG_FEC_MXC_PHYADDR 0x1F
  34. /* USB Configs */
  35. #define CONFIG_USB_EHCI_MX5
  36. #define CONFIG_USB_HOST_ETHER
  37. #define CONFIG_USB_ETHER_ASIX
  38. #define CONFIG_USB_ETHER_MCS7830
  39. #define CONFIG_USB_ETHER_SMSC95XX
  40. #define CONFIG_MXC_USB_PORT 1
  41. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  42. #define CONFIG_MXC_USB_FLAGS 0
  43. #define CONFIG_SYS_RTC_BUS_NUM 2
  44. #define CONFIG_SYS_I2C_RTC_ADDR 0x30
  45. /* I2C Configs */
  46. #define CONFIG_SYS_I2C
  47. #define CONFIG_SYS_I2C_MXC
  48. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  49. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  50. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  51. /* PMIC Controller */
  52. #define CONFIG_POWER
  53. #define CONFIG_POWER_I2C
  54. #define CONFIG_DIALOG_POWER
  55. #define CONFIG_POWER_FSL
  56. #define CONFIG_POWER_FSL_MC13892
  57. #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
  58. #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
  59. /* allow to overwrite serial and ethaddr */
  60. #define CONFIG_ENV_OVERWRITE
  61. #define CONFIG_BAUDRATE 115200
  62. /* Command definition */
  63. #define CONFIG_ETHPRIME "FEC0"
  64. #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
  65. #define PPD_CONFIG_NFS \
  66. "nfsserver=192.168.252.95\0" \
  67. "gatewayip=192.168.252.95\0" \
  68. "netmask=255.255.255.0\0" \
  69. "ipaddr=192.168.252.99\0" \
  70. "kernsize=0x2000\0" \
  71. "use_dhcp=0\0" \
  72. "nfsroot=/opt/springdale/rd\0" \
  73. "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
  74. "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
  75. "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \
  76. "set getcmd dhcp; else set kern_ipconf " \
  77. "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
  78. "set getcmd tftp; fi\0" \
  79. "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
  80. "${nfsserver}:${image}; bootm ${loadaddr}\0" \
  81. #define CONFIG_EXTRA_ENV_SETTINGS \
  82. PPD_CONFIG_NFS \
  83. "bootlimit=10\0" \
  84. "image=/boot/fitImage\0" \
  85. "fdt_high=0xffffffff\0" \
  86. "dev=mmc\0" \
  87. "devnum=0\0" \
  88. "rootdev=mmcblk0p\0" \
  89. "quiet=quiet loglevel=0\0" \
  90. "console=" CONSOLE_DEV "\0" \
  91. "lvds=ldb\0" \
  92. "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
  93. "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
  94. "console=${console} ${rtc_status}\0" \
  95. "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
  96. "rootwait ${bootargs}\0" \
  97. "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
  98. "then setenv quiet; fi\0" \
  99. "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
  100. "/boot/bootcause/firstboot\0" \
  101. "swappartitions=setexpr partnum 3 - ${partnum}\0" \
  102. "failbootcmd=" \
  103. "ppd_lcd_enable; " \
  104. "msg=\"Monitor failed to start. " \
  105. "Try again, or contact GE Service for support.\"; " \
  106. "echo $msg; " \
  107. "setenv stdout vga; " \
  108. "echo \"\n\n\n\n \" $msg; " \
  109. "setenv stdout serial; " \
  110. "mw.b 0x7000A000 0xbc; " \
  111. "mw.b 0x7000A001 0x00; " \
  112. "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
  113. "altbootcmd=" \
  114. "run doquiet; " \
  115. "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
  116. "run hasfirstboot || setenv partnum 0; " \
  117. "if test ${partnum} != 0; then " \
  118. "setenv bootcause REVERT; " \
  119. "run swappartitions loadimage doboot; " \
  120. "fi; " \
  121. "run failbootcmd\0" \
  122. "loadimage=" \
  123. "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
  124. "doboot=" \
  125. "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
  126. "run setargs; " \
  127. "run bootargs_emmc; " \
  128. "bootm ${loadaddr}\0" \
  129. "tryboot=" \
  130. "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
  131. "run loadimage || run swappartitions && run loadimage || " \
  132. "setenv partnum 0 && echo MISSING IMAGE;" \
  133. "run doboot; " \
  134. "run failbootcmd\0" \
  135. "video-mode=" \
  136. "lcd:800x480-24@60,monitor=lcd\0" \
  137. #define CONFIG_MMCBOOTCOMMAND \
  138. "if mmc dev ${devnum}; then " \
  139. "run doquiet; " \
  140. "run tryboot; " \
  141. "fi; " \
  142. #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
  143. #define CONFIG_ARP_TIMEOUT 200UL
  144. /* Miscellaneous configurable options */
  145. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  146. #define CONFIG_SYS_MAXARGS 48 /* max number of command args */
  147. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  148. #define CONFIG_SYS_MEMTEST_START 0x70000000
  149. #define CONFIG_SYS_MEMTEST_END 0x70010000
  150. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  151. /* Physical Memory Map */
  152. #define CONFIG_NR_DRAM_BANKS 2
  153. #define PHYS_SDRAM_1 CSD0_BASE_ADDR
  154. #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
  155. #define PHYS_SDRAM_2 CSD1_BASE_ADDR
  156. #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
  157. #define PHYS_SDRAM_SIZE (gd->ram_size)
  158. #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
  159. #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
  160. #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
  161. #define CONFIG_SYS_INIT_SP_OFFSET \
  162. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  163. #define CONFIG_SYS_INIT_SP_ADDR \
  164. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  165. /* FLASH and environment organization */
  166. #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
  167. #define CONFIG_ENV_SIZE (10 * 1024)
  168. #define CONFIG_ENV_IS_IN_MMC
  169. #define CONFIG_SYS_MMC_ENV_DEV 0
  170. #define CONFIG_CMD_FUSE
  171. #define CONFIG_FSL_IIM
  172. #define CONFIG_SYS_I2C_SPEED 100000
  173. /* I2C1 */
  174. #define CONFIG_SYS_NUM_I2C_BUSES 9
  175. #define CONFIG_SYS_I2C_MAX_HOPS 1
  176. #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
  177. {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
  178. {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
  179. {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
  180. {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
  181. {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
  182. {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
  183. {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
  184. {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
  185. }
  186. #define CONFIG_BCH
  187. /* Backlight Control */
  188. #define CONFIG_PWM_IMX
  189. #define CONFIG_IMX6_PWM_PER_CLK 66666000
  190. /* Framebuffer and LCD */
  191. #ifdef CONFIG_VIDEO
  192. #define CONFIG_VIDEO_IPUV3
  193. #endif
  194. #endif /* __CONFIG_H */