mx35pdk.h 6.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
  4. *
  5. * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
  6. *
  7. * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
  8. *
  9. * Configuration for the MX35pdk Freescale board.
  10. */
  11. #ifndef __CONFIG_H
  12. #define __CONFIG_H
  13. #include <asm/arch/imx-regs.h>
  14. /* High Level Configuration Options */
  15. #define CONFIG_MX35
  16. #define CONFIG_SYS_FSL_CLK
  17. /* Set TEXT at the beginning of the NOR flash */
  18. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  19. #define CONFIG_REVISION_TAG
  20. #define CONFIG_SETUP_MEMORY_TAGS
  21. #define CONFIG_INITRD_TAG
  22. /*
  23. * Size of malloc() pool
  24. */
  25. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
  26. /*
  27. * Hardware drivers
  28. */
  29. #define CONFIG_SYS_I2C
  30. #define CONFIG_SYS_I2C_MXC
  31. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  32. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  33. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  34. /*
  35. * PMIC Configs
  36. */
  37. #define CONFIG_POWER
  38. #define CONFIG_POWER_I2C
  39. #define CONFIG_POWER_FSL
  40. #define CONFIG_POWER_FSL_MC13892
  41. #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
  42. #define CONFIG_RTC_MC13XXX
  43. /*
  44. * MFD MC9SDZ60
  45. */
  46. #define CONFIG_FSL_MC9SDZ60
  47. #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
  48. /*
  49. * UART (console)
  50. */
  51. #define CONFIG_MXC_UART
  52. #define CONFIG_MXC_UART_BASE UART1_BASE
  53. /* allow to overwrite serial and ethaddr */
  54. #define CONFIG_ENV_OVERWRITE
  55. /*
  56. * Command definition
  57. */
  58. #define CONFIG_NET_RETRY_COUNT 100
  59. #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
  60. /*
  61. * Ethernet on the debug board (SMC911)
  62. */
  63. #define CONFIG_HAS_ETH1
  64. #define CONFIG_ETHPRIME
  65. /*
  66. * Ethernet on SOC (FEC)
  67. */
  68. #define CONFIG_FEC_MXC
  69. #define IMX_FEC_BASE FEC_BASE_ADDR
  70. #define CONFIG_FEC_MXC_PHYADDR 0x1F
  71. #define CONFIG_MII
  72. #define CONFIG_ARP_TIMEOUT 200UL
  73. /*
  74. * Miscellaneous configurable options
  75. */
  76. #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
  77. #define CONFIG_SYS_MEMTEST_END 0x10000
  78. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  79. /*
  80. * Physical Memory Map
  81. */
  82. #define CONFIG_NR_DRAM_BANKS 2
  83. #define PHYS_SDRAM_1 CSD0_BASE_ADDR
  84. #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
  85. #define PHYS_SDRAM_2 CSD1_BASE_ADDR
  86. #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
  87. #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
  88. #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
  89. #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
  90. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
  91. GENERATED_GBL_DATA_SIZE)
  92. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  93. CONFIG_SYS_GBL_DATA_OFFSET)
  94. /*
  95. * MTD Command for mtdparts
  96. */
  97. #define CONFIG_MTD_DEVICE
  98. #define CONFIG_FLASH_CFI_MTD
  99. #define CONFIG_MTD_PARTITIONS
  100. /*
  101. * FLASH and environment organization
  102. */
  103. #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
  104. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  105. #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
  106. /* Monitor at beginning of flash */
  107. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  108. #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
  109. #define CONFIG_ENV_SECT_SIZE (128 * 1024)
  110. #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
  111. /* Address and size of Redundant Environment Sector */
  112. #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
  113. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  114. #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
  115. CONFIG_SYS_MONITOR_LEN)
  116. #if defined(CONFIG_FSL_ENV_IN_NAND)
  117. #define CONFIG_ENV_OFFSET (1024 * 1024)
  118. #endif
  119. /*
  120. * CFI FLASH driver setup
  121. */
  122. #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
  123. #define CONFIG_FLASH_CFI_DRIVER
  124. /* A non-standard buffered write algorithm */
  125. #define CONFIG_FLASH_SPANSION_S29WS_N
  126. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
  127. #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
  128. /*
  129. * NAND FLASH driver setup
  130. */
  131. #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
  132. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  133. #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
  134. #define CONFIG_MXC_NAND_HWECC
  135. #define CONFIG_SYS_NAND_LARGEPAGE
  136. /* EHCI driver */
  137. #define CONFIG_EHCI_IS_TDI
  138. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  139. #define CONFIG_USB_EHCI_MXC
  140. #define CONFIG_MXC_USB_PORT 0
  141. #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
  142. MXC_EHCI_POWER_PINS_ENABLED | \
  143. MXC_EHCI_OC_PIN_ACTIVE_LOW)
  144. #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
  145. /* mmc driver */
  146. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  147. #define CONFIG_SYS_FSL_ESDHC_NUM 1
  148. /*
  149. * Default environment and default scripts
  150. * to update uboot and load kernel
  151. */
  152. #define CONFIG_HOSTNAME "mx35pdk"
  153. #define CONFIG_EXTRA_ENV_SETTINGS \
  154. "netdev=eth1\0" \
  155. "ethprime=smc911x\0" \
  156. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  157. "nfsroot=${serverip}:${rootpath}\0" \
  158. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  159. "addip_sta=setenv bootargs ${bootargs} " \
  160. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  161. ":${hostname}:${netdev}:off panic=1\0" \
  162. "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
  163. "addip=if test -n ${ipdyn};then run addip_dyn;" \
  164. "else run addip_sta;fi\0" \
  165. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  166. "addtty=setenv bootargs ${bootargs}" \
  167. " console=ttymxc0,${baudrate}\0" \
  168. "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
  169. "loadaddr=80800000\0" \
  170. "kernel_addr_r=80800000\0" \
  171. "hostname=" CONFIG_HOSTNAME "\0" \
  172. "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
  173. "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
  174. "flash_self=run ramargs addip addtty addmtd addmisc;" \
  175. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  176. "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
  177. "bootm ${kernel_addr}\0" \
  178. "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
  179. "run nfsargs addip addtty addmtd addmisc;" \
  180. "bootm ${kernel_addr_r}\0" \
  181. "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
  182. "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
  183. "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
  184. "load=tftp ${loadaddr} ${u-boot}\0" \
  185. "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
  186. "update=protect off ${uboot_addr} +80000;" \
  187. "erase ${uboot_addr} +80000;" \
  188. "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
  189. "upd=if run load;then echo Updating u-boot;if run update;" \
  190. "then echo U-Boot updated;" \
  191. "else echo Error updating u-boot !;" \
  192. "echo Board without bootloader !!;" \
  193. "fi;" \
  194. "else echo U-Boot not downloaded..exiting;fi\0" \
  195. "bootcmd=run net_nfs\0"
  196. #endif /* __CONFIG_H */