test.dts 28 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/gpio/sandbox-gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/pinctrl/sandbox-pinmux.h>
  6. #include <dt-bindings/mux/mux.h>
  7. / {
  8. model = "sandbox";
  9. compatible = "sandbox";
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. aliases {
  13. console = &uart0;
  14. eth0 = "/eth@10002000";
  15. eth3 = &eth_3;
  16. eth5 = &eth_5;
  17. gpio1 = &gpio_a;
  18. gpio2 = &gpio_b;
  19. gpio3 = &gpio_c;
  20. i2c0 = "/i2c@0";
  21. mmc0 = "/mmc0";
  22. mmc1 = "/mmc1";
  23. pci0 = &pci0;
  24. pci1 = &pci1;
  25. pci2 = &pci2;
  26. remoteproc0 = &rproc_1;
  27. remoteproc1 = &rproc_2;
  28. rtc0 = &rtc_0;
  29. rtc1 = &rtc_1;
  30. spi0 = "/spi@0";
  31. testfdt6 = "/e-test";
  32. testbus3 = "/some-bus";
  33. testfdt0 = "/some-bus/c-test@0";
  34. testfdt12 = "/some-bus/c-test@1";
  35. testfdt3 = "/b-test";
  36. testfdt5 = "/some-bus/c-test@5";
  37. testfdt8 = "/a-test";
  38. testfdtm1 = &testfdtm1;
  39. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  40. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  41. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  42. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  43. fdt-dummy4 = "/translation-test@8000/xlatebus@4,400/devs/dev@19";
  44. usb0 = &usb_0;
  45. usb1 = &usb_1;
  46. usb2 = &usb_2;
  47. axi0 = &axi;
  48. osd0 = "/osd";
  49. };
  50. audio: audio-codec {
  51. compatible = "sandbox,audio-codec";
  52. #sound-dai-cells = <1>;
  53. };
  54. buttons {
  55. compatible = "gpio-keys";
  56. btn1 {
  57. gpios = <&gpio_a 3 0>;
  58. label = "button1";
  59. };
  60. btn2 {
  61. gpios = <&gpio_a 4 0>;
  62. label = "button2";
  63. };
  64. };
  65. buttons2 {
  66. compatible = "adc-keys";
  67. io-channels = <&adc 3>;
  68. keyup-threshold-microvolt = <3000000>;
  69. button-up {
  70. label = "button3";
  71. linux,code = <KEY_F3>;
  72. press-threshold-microvolt = <1500000>;
  73. };
  74. button-down {
  75. label = "button4";
  76. linux,code = <KEY_F4>;
  77. press-threshold-microvolt = <1000000>;
  78. };
  79. button-enter {
  80. label = "button5";
  81. linux,code = <KEY_F5>;
  82. press-threshold-microvolt = <500000>;
  83. };
  84. };
  85. cros_ec: cros-ec {
  86. reg = <0 0>;
  87. compatible = "google,cros-ec-sandbox";
  88. /*
  89. * This describes the flash memory within the EC. Note
  90. * that the STM32L flash erases to 0, not 0xff.
  91. */
  92. flash {
  93. image-pos = <0x08000000>;
  94. size = <0x20000>;
  95. erase-value = <0>;
  96. /* Information for sandbox */
  97. ro {
  98. image-pos = <0>;
  99. size = <0xf000>;
  100. };
  101. wp-ro {
  102. image-pos = <0xf000>;
  103. size = <0x1000>;
  104. used = <0x884>;
  105. compress = "lz4";
  106. uncomp-size = <0xcf8>;
  107. hash {
  108. algo = "sha256";
  109. value = [00 01 02 03 04 05 06 07
  110. 08 09 0a 0b 0c 0d 0e 0f
  111. 10 11 12 13 14 15 16 17
  112. 18 19 1a 1b 1c 1d 1e 1f];
  113. };
  114. };
  115. rw {
  116. image-pos = <0x10000>;
  117. size = <0x10000>;
  118. };
  119. };
  120. };
  121. dsi_host: dsi_host {
  122. compatible = "sandbox,dsi-host";
  123. };
  124. a-test {
  125. reg = <0 1>;
  126. compatible = "denx,u-boot-fdt-test";
  127. ping-expect = <0>;
  128. ping-add = <0>;
  129. u-boot,dm-pre-reloc;
  130. test-gpios = <&gpio_a 1>, <&gpio_a 4>,
  131. <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
  132. <0>, <&gpio_a 12>;
  133. test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
  134. <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
  135. <&gpio_b 7 GPIO_IN 3 2 1>,
  136. <&gpio_b 8 GPIO_OUT 3 2 1>,
  137. <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
  138. test3-gpios =
  139. <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
  140. <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
  141. <&gpio_c 2 GPIO_OUT>,
  142. <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
  143. <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
  144. <&gpio_c 5 GPIO_IN>,
  145. <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
  146. <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
  147. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  148. test5-gpios = <&gpio_a 19>;
  149. int-value = <1234>;
  150. uint-value = <(-1234)>;
  151. int64-value = /bits/ 64 <0x1111222233334444>;
  152. int-array = <5678 9123 4567>;
  153. str-value = "test string";
  154. interrupts-extended = <&irq 3 0>;
  155. acpi,name = "GHIJ";
  156. phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
  157. mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
  158. <&muxcontroller0 2>, <&muxcontroller0 3>,
  159. <&muxcontroller1>;
  160. mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
  161. mux-syscon = <&syscon3>;
  162. display-timings {
  163. timing0: 240x320 {
  164. clock-frequency = <6500000>;
  165. hactive = <240>;
  166. vactive = <320>;
  167. hfront-porch = <6>;
  168. hback-porch = <7>;
  169. hsync-len = <1>;
  170. vback-porch = <5>;
  171. vfront-porch = <8>;
  172. vsync-len = <2>;
  173. hsync-active = <1>;
  174. vsync-active = <0>;
  175. de-active = <1>;
  176. pixelclk-active = <1>;
  177. interlaced;
  178. doublescan;
  179. doubleclk;
  180. };
  181. timing1: 480x800 {
  182. clock-frequency = <9000000>;
  183. hactive = <480>;
  184. vactive = <800>;
  185. hfront-porch = <10>;
  186. hback-porch = <59>;
  187. hsync-len = <12>;
  188. vback-porch = <15>;
  189. vfront-porch = <17>;
  190. vsync-len = <16>;
  191. hsync-active = <0>;
  192. vsync-active = <1>;
  193. de-active = <0>;
  194. pixelclk-active = <0>;
  195. };
  196. timing2: 800x480 {
  197. clock-frequency = <33500000>;
  198. hactive = <800>;
  199. vactive = <480>;
  200. hback-porch = <89>;
  201. hfront-porch = <164>;
  202. vback-porch = <23>;
  203. vfront-porch = <10>;
  204. hsync-len = <11>;
  205. vsync-len = <13>;
  206. };
  207. };
  208. };
  209. junk {
  210. reg = <1 1>;
  211. compatible = "not,compatible";
  212. };
  213. no-compatible {
  214. reg = <2 1>;
  215. };
  216. backlight: backlight {
  217. compatible = "pwm-backlight";
  218. enable-gpios = <&gpio_a 1>;
  219. power-supply = <&ldo_1>;
  220. pwms = <&pwm 0 1000>;
  221. default-brightness-level = <5>;
  222. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  223. };
  224. bind-test {
  225. compatible = "simple-bus";
  226. bind-test-child1 {
  227. compatible = "sandbox,phy";
  228. #phy-cells = <1>;
  229. };
  230. bind-test-child2 {
  231. compatible = "simple-bus";
  232. };
  233. };
  234. b-test {
  235. reg = <3 1>;
  236. compatible = "denx,u-boot-fdt-test";
  237. ping-expect = <3>;
  238. ping-add = <3>;
  239. mux-controls = <&muxcontroller0 0>;
  240. mux-control-names = "mux0";
  241. };
  242. phy_provider0: gen_phy@0 {
  243. compatible = "sandbox,phy";
  244. #phy-cells = <1>;
  245. };
  246. phy_provider1: gen_phy@1 {
  247. compatible = "sandbox,phy";
  248. #phy-cells = <0>;
  249. broken;
  250. };
  251. phy_provider2: gen_phy@2 {
  252. compatible = "sandbox,phy";
  253. #phy-cells = <0>;
  254. };
  255. gen_phy_user: gen_phy_user {
  256. compatible = "simple-bus";
  257. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  258. phy-names = "phy1", "phy2", "phy3";
  259. };
  260. gen_phy_user1: gen_phy_user1 {
  261. compatible = "simple-bus";
  262. phys = <&phy_provider0 0>, <&phy_provider2>;
  263. phy-names = "phy1", "phy2";
  264. };
  265. some-bus {
  266. #address-cells = <1>;
  267. #size-cells = <0>;
  268. compatible = "denx,u-boot-test-bus";
  269. reg = <3 1>;
  270. ping-expect = <4>;
  271. ping-add = <4>;
  272. c-test@5 {
  273. compatible = "denx,u-boot-fdt-test";
  274. reg = <5>;
  275. ping-expect = <5>;
  276. ping-add = <5>;
  277. };
  278. c-test@0 {
  279. compatible = "denx,u-boot-fdt-test";
  280. reg = <0>;
  281. ping-expect = <6>;
  282. ping-add = <6>;
  283. };
  284. c-test@1 {
  285. compatible = "denx,u-boot-fdt-test";
  286. reg = <1>;
  287. ping-expect = <7>;
  288. ping-add = <7>;
  289. };
  290. };
  291. d-test {
  292. reg = <3 1>;
  293. ping-expect = <6>;
  294. ping-add = <6>;
  295. compatible = "google,another-fdt-test";
  296. };
  297. e-test {
  298. reg = <3 1>;
  299. ping-expect = <6>;
  300. ping-add = <6>;
  301. compatible = "google,another-fdt-test";
  302. };
  303. f-test {
  304. compatible = "denx,u-boot-fdt-test";
  305. };
  306. g-test {
  307. compatible = "denx,u-boot-fdt-test";
  308. };
  309. h-test {
  310. compatible = "denx,u-boot-fdt-test1";
  311. };
  312. i-test {
  313. compatible = "mediatek,u-boot-fdt-test";
  314. #address-cells = <1>;
  315. #size-cells = <0>;
  316. subnode@0 {
  317. reg = <0>;
  318. };
  319. subnode@1 {
  320. reg = <1>;
  321. };
  322. subnode@2 {
  323. reg = <2>;
  324. };
  325. };
  326. devres-test {
  327. compatible = "denx,u-boot-devres-test";
  328. };
  329. another-test {
  330. reg = <0 2>;
  331. compatible = "denx,u-boot-fdt-test";
  332. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  333. test5-gpios = <&gpio_a 19>;
  334. };
  335. mmio-bus@0 {
  336. #address-cells = <1>;
  337. #size-cells = <1>;
  338. compatible = "denx,u-boot-test-bus";
  339. dma-ranges = <0x10000000 0x00000000 0x00040000>;
  340. subnode@0 {
  341. compatible = "denx,u-boot-fdt-test";
  342. };
  343. };
  344. mmio-bus@1 {
  345. #address-cells = <1>;
  346. #size-cells = <1>;
  347. compatible = "denx,u-boot-test-bus";
  348. subnode@0 {
  349. compatible = "denx,u-boot-fdt-test";
  350. };
  351. };
  352. acpi_test1: acpi-test {
  353. compatible = "denx,u-boot-acpi-test";
  354. acpi-ssdt-test-data = "ab";
  355. acpi-dsdt-test-data = "hi";
  356. child {
  357. compatible = "denx,u-boot-acpi-test";
  358. };
  359. };
  360. acpi_test2: acpi-test2 {
  361. compatible = "denx,u-boot-acpi-test";
  362. acpi-ssdt-test-data = "cd";
  363. acpi-dsdt-test-data = "jk";
  364. };
  365. clocks {
  366. clk_fixed: clk-fixed {
  367. compatible = "fixed-clock";
  368. #clock-cells = <0>;
  369. clock-frequency = <1234>;
  370. };
  371. clk_fixed_factor: clk-fixed-factor {
  372. compatible = "fixed-factor-clock";
  373. #clock-cells = <0>;
  374. clock-div = <3>;
  375. clock-mult = <2>;
  376. clocks = <&clk_fixed>;
  377. };
  378. osc {
  379. compatible = "fixed-clock";
  380. #clock-cells = <0>;
  381. clock-frequency = <20000000>;
  382. };
  383. };
  384. clk_sandbox: clk-sbox {
  385. compatible = "sandbox,clk";
  386. #clock-cells = <1>;
  387. assigned-clocks = <&clk_sandbox 3>;
  388. assigned-clock-rates = <321>;
  389. };
  390. clk-test {
  391. compatible = "sandbox,clk-test";
  392. clocks = <&clk_fixed>,
  393. <&clk_sandbox 1>,
  394. <&clk_sandbox 0>,
  395. <&clk_sandbox 3>,
  396. <&clk_sandbox 2>;
  397. clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
  398. };
  399. ccf: clk-ccf {
  400. compatible = "sandbox,clk-ccf";
  401. };
  402. eth@10002000 {
  403. compatible = "sandbox,eth";
  404. reg = <0x10002000 0x1000>;
  405. fake-host-hwaddr = [00 00 66 44 22 00];
  406. };
  407. eth_5: eth@10003000 {
  408. compatible = "sandbox,eth";
  409. reg = <0x10003000 0x1000>;
  410. fake-host-hwaddr = [00 00 66 44 22 11];
  411. };
  412. eth_3: sbe5 {
  413. compatible = "sandbox,eth";
  414. reg = <0x10005000 0x1000>;
  415. fake-host-hwaddr = [00 00 66 44 22 33];
  416. };
  417. eth@10004000 {
  418. compatible = "sandbox,eth";
  419. reg = <0x10004000 0x1000>;
  420. fake-host-hwaddr = [00 00 66 44 22 22];
  421. };
  422. firmware {
  423. sandbox_firmware: sandbox-firmware {
  424. compatible = "sandbox,firmware";
  425. };
  426. sandbox-scmi-agent@0 {
  427. compatible = "sandbox,scmi-agent";
  428. #address-cells = <1>;
  429. #size-cells = <0>;
  430. clk_scmi0: protocol@14 {
  431. reg = <0x14>;
  432. #clock-cells = <1>;
  433. };
  434. reset_scmi0: protocol@16 {
  435. reg = <0x16>;
  436. #reset-cells = <1>;
  437. };
  438. };
  439. sandbox-scmi-agent@1 {
  440. compatible = "sandbox,scmi-agent";
  441. #address-cells = <1>;
  442. #size-cells = <0>;
  443. clk_scmi1: protocol@14 {
  444. reg = <0x14>;
  445. #clock-cells = <1>;
  446. };
  447. protocol@10 {
  448. reg = <0x10>;
  449. };
  450. };
  451. };
  452. pinctrl-gpio {
  453. compatible = "sandbox,pinctrl-gpio";
  454. gpio_a: base-gpios {
  455. compatible = "sandbox,gpio";
  456. gpio-controller;
  457. #gpio-cells = <1>;
  458. gpio-bank-name = "a";
  459. sandbox,gpio-count = <20>;
  460. hog_input_active_low {
  461. gpio-hog;
  462. input;
  463. gpios = <10 GPIO_ACTIVE_LOW>;
  464. };
  465. hog_input_active_high {
  466. gpio-hog;
  467. input;
  468. gpios = <11 GPIO_ACTIVE_HIGH>;
  469. };
  470. hog_output_low {
  471. gpio-hog;
  472. output-low;
  473. gpios = <12 GPIO_ACTIVE_HIGH>;
  474. };
  475. hog_output_high {
  476. gpio-hog;
  477. output-high;
  478. gpios = <13 GPIO_ACTIVE_HIGH>;
  479. };
  480. };
  481. gpio_b: extra-gpios {
  482. compatible = "sandbox,gpio";
  483. gpio-controller;
  484. #gpio-cells = <5>;
  485. gpio-bank-name = "b";
  486. sandbox,gpio-count = <10>;
  487. };
  488. gpio_c: pinmux-gpios {
  489. compatible = "sandbox,gpio";
  490. gpio-controller;
  491. #gpio-cells = <2>;
  492. gpio-bank-name = "c";
  493. sandbox,gpio-count = <10>;
  494. };
  495. };
  496. i2c@0 {
  497. #address-cells = <1>;
  498. #size-cells = <0>;
  499. reg = <0 1>;
  500. compatible = "sandbox,i2c";
  501. clock-frequency = <100000>;
  502. pinctrl-names = "default";
  503. pinctrl-0 = <&pinmux_i2c0_pins>;
  504. eeprom@2c {
  505. reg = <0x2c>;
  506. compatible = "i2c-eeprom";
  507. sandbox,emul = <&emul_eeprom>;
  508. partitions {
  509. compatible = "fixed-partitions";
  510. #address-cells = <1>;
  511. #size-cells = <1>;
  512. bootcount_i2c: bootcount@10 {
  513. reg = <10 2>;
  514. };
  515. };
  516. };
  517. rtc_0: rtc@43 {
  518. reg = <0x43>;
  519. compatible = "sandbox-rtc";
  520. sandbox,emul = <&emul0>;
  521. };
  522. rtc_1: rtc@61 {
  523. reg = <0x61>;
  524. compatible = "sandbox-rtc";
  525. sandbox,emul = <&emul1>;
  526. };
  527. i2c_emul: emul {
  528. reg = <0xff>;
  529. compatible = "sandbox,i2c-emul-parent";
  530. emul_eeprom: emul-eeprom {
  531. compatible = "sandbox,i2c-eeprom";
  532. sandbox,filename = "i2c.bin";
  533. sandbox,size = <256>;
  534. };
  535. emul0: emul0 {
  536. compatible = "sandbox,i2c-rtc";
  537. };
  538. emul1: emull {
  539. compatible = "sandbox,i2c-rtc";
  540. };
  541. };
  542. sandbox_pmic: sandbox_pmic {
  543. reg = <0x40>;
  544. sandbox,emul = <&emul_pmic0>;
  545. };
  546. mc34708: pmic@41 {
  547. reg = <0x41>;
  548. sandbox,emul = <&emul_pmic1>;
  549. };
  550. };
  551. bootcount@0 {
  552. compatible = "u-boot,bootcount-rtc";
  553. rtc = <&rtc_1>;
  554. offset = <0x13>;
  555. };
  556. bootcount {
  557. compatible = "u-boot,bootcount-i2c-eeprom";
  558. i2c-eeprom = <&bootcount_i2c>;
  559. };
  560. adc: adc@0 {
  561. compatible = "sandbox,adc";
  562. #io-channel-cells = <1>;
  563. vdd-supply = <&buck2>;
  564. vss-microvolts = <0>;
  565. };
  566. irq: irq {
  567. compatible = "sandbox,irq";
  568. interrupt-controller;
  569. #interrupt-cells = <2>;
  570. };
  571. lcd {
  572. u-boot,dm-pre-reloc;
  573. compatible = "sandbox,lcd-sdl";
  574. pinctrl-names = "default";
  575. pinctrl-0 = <&pinmux_lcd_pins>;
  576. xres = <1366>;
  577. yres = <768>;
  578. };
  579. leds {
  580. compatible = "gpio-leds";
  581. iracibble {
  582. gpios = <&gpio_a 1 0>;
  583. label = "sandbox:red";
  584. };
  585. martinet {
  586. gpios = <&gpio_a 2 0>;
  587. label = "sandbox:green";
  588. };
  589. default_on {
  590. gpios = <&gpio_a 5 0>;
  591. label = "sandbox:default_on";
  592. default-state = "on";
  593. };
  594. default_off {
  595. gpios = <&gpio_a 6 0>;
  596. /* label intentionally omitted */
  597. default-state = "off";
  598. };
  599. };
  600. mbox: mbox {
  601. compatible = "sandbox,mbox";
  602. #mbox-cells = <1>;
  603. };
  604. mbox-test {
  605. compatible = "sandbox,mbox-test";
  606. mboxes = <&mbox 100>, <&mbox 1>;
  607. mbox-names = "other", "test";
  608. };
  609. cpus {
  610. timebase-frequency = <2000000>;
  611. cpu-test1 {
  612. timebase-frequency = <3000000>;
  613. compatible = "sandbox,cpu_sandbox";
  614. u-boot,dm-pre-reloc;
  615. };
  616. cpu-test2 {
  617. compatible = "sandbox,cpu_sandbox";
  618. u-boot,dm-pre-reloc;
  619. };
  620. cpu-test3 {
  621. compatible = "sandbox,cpu_sandbox";
  622. u-boot,dm-pre-reloc;
  623. };
  624. };
  625. chipid: chipid {
  626. compatible = "sandbox,soc";
  627. };
  628. i2s: i2s {
  629. compatible = "sandbox,i2s";
  630. #sound-dai-cells = <1>;
  631. sandbox,silent; /* Don't emit sounds while testing */
  632. };
  633. nop-test_0 {
  634. compatible = "sandbox,nop_sandbox1";
  635. nop-test_1 {
  636. compatible = "sandbox,nop_sandbox2";
  637. bind = "True";
  638. };
  639. nop-test_2 {
  640. compatible = "sandbox,nop_sandbox2";
  641. bind = "False";
  642. };
  643. };
  644. misc-test {
  645. compatible = "sandbox,misc_sandbox";
  646. };
  647. mmc2 {
  648. compatible = "sandbox,mmc";
  649. };
  650. mmc1 {
  651. compatible = "sandbox,mmc";
  652. };
  653. mmc0 {
  654. compatible = "sandbox,mmc";
  655. };
  656. pch {
  657. compatible = "sandbox,pch";
  658. };
  659. pci0: pci@0 {
  660. compatible = "sandbox,pci";
  661. device_type = "pci";
  662. bus-range = <0x00 0xff>;
  663. #address-cells = <3>;
  664. #size-cells = <2>;
  665. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  666. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  667. pci@0,0 {
  668. compatible = "pci-generic";
  669. reg = <0x0000 0 0 0 0>;
  670. sandbox,emul = <&swap_case_emul0_0>;
  671. };
  672. pci@1,0 {
  673. compatible = "pci-generic";
  674. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  675. reg = <0x02000814 0 0 0 0
  676. 0x01000810 0 0 0 0>;
  677. sandbox,emul = <&swap_case_emul0_1>;
  678. };
  679. p2sb-pci@2,0 {
  680. compatible = "sandbox,p2sb";
  681. reg = <0x02001010 0 0 0 0>;
  682. sandbox,emul = <&p2sb_emul>;
  683. adder {
  684. intel,p2sb-port-id = <3>;
  685. compatible = "sandbox,adder";
  686. };
  687. };
  688. pci@1e,0 {
  689. compatible = "sandbox,pmc";
  690. reg = <0xf000 0 0 0 0>;
  691. sandbox,emul = <&pmc_emul1e>;
  692. acpi-base = <0x400>;
  693. gpe0-dwx-mask = <0xf>;
  694. gpe0-dwx-shift-base = <4>;
  695. gpe0-dw = <6 7 9>;
  696. gpe0-sts = <0x20>;
  697. gpe0-en = <0x30>;
  698. };
  699. pci@1f,0 {
  700. compatible = "pci-generic";
  701. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  702. reg = <0x0100f810 0 0 0 0>;
  703. sandbox,emul = <&swap_case_emul0_1f>;
  704. };
  705. };
  706. pci-emul0 {
  707. compatible = "sandbox,pci-emul-parent";
  708. swap_case_emul0_0: emul0@0,0 {
  709. compatible = "sandbox,swap-case";
  710. };
  711. swap_case_emul0_1: emul0@1,0 {
  712. compatible = "sandbox,swap-case";
  713. use-ea;
  714. };
  715. swap_case_emul0_1f: emul0@1f,0 {
  716. compatible = "sandbox,swap-case";
  717. };
  718. p2sb_emul: emul@2,0 {
  719. compatible = "sandbox,p2sb-emul";
  720. };
  721. pmc_emul1e: emul@1e,0 {
  722. compatible = "sandbox,pmc-emul";
  723. };
  724. };
  725. pci1: pci@1 {
  726. compatible = "sandbox,pci";
  727. device_type = "pci";
  728. bus-range = <0x00 0xff>;
  729. #address-cells = <3>;
  730. #size-cells = <2>;
  731. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
  732. 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1
  733. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  734. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  735. 0x0c 0x00 0x1234 0x5678
  736. 0x10 0x00 0x1234 0x5678>;
  737. pci@10,0 {
  738. reg = <0x8000 0 0 0 0>;
  739. };
  740. };
  741. pci2: pci@2 {
  742. compatible = "sandbox,pci";
  743. device_type = "pci";
  744. bus-range = <0x00 0xff>;
  745. #address-cells = <3>;
  746. #size-cells = <2>;
  747. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  748. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  749. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  750. pci@1f,0 {
  751. compatible = "pci-generic";
  752. reg = <0xf800 0 0 0 0>;
  753. sandbox,emul = <&swap_case_emul2_1f>;
  754. };
  755. };
  756. pci-emul2 {
  757. compatible = "sandbox,pci-emul-parent";
  758. swap_case_emul2_1f: emul2@1f,0 {
  759. compatible = "sandbox,swap-case";
  760. };
  761. };
  762. pci_ep: pci_ep {
  763. compatible = "sandbox,pci_ep";
  764. };
  765. probing {
  766. compatible = "simple-bus";
  767. test1 {
  768. compatible = "denx,u-boot-probe-test";
  769. };
  770. test2 {
  771. compatible = "denx,u-boot-probe-test";
  772. };
  773. test3 {
  774. compatible = "denx,u-boot-probe-test";
  775. };
  776. test4 {
  777. compatible = "denx,u-boot-probe-test";
  778. first-syscon = <&syscon0>;
  779. second-sys-ctrl = <&another_system_controller>;
  780. third-syscon = <&syscon2>;
  781. };
  782. };
  783. pwrdom: power-domain {
  784. compatible = "sandbox,power-domain";
  785. #power-domain-cells = <1>;
  786. };
  787. power-domain-test {
  788. compatible = "sandbox,power-domain-test";
  789. power-domains = <&pwrdom 2>;
  790. };
  791. pwm: pwm {
  792. compatible = "sandbox,pwm";
  793. #pwm-cells = <2>;
  794. pinctrl-names = "default";
  795. pinctrl-0 = <&pinmux_pwm_pins>;
  796. };
  797. pwm2 {
  798. compatible = "sandbox,pwm";
  799. #pwm-cells = <2>;
  800. };
  801. ram {
  802. compatible = "sandbox,ram";
  803. };
  804. reset@0 {
  805. compatible = "sandbox,warm-reset";
  806. };
  807. reset@1 {
  808. compatible = "sandbox,reset";
  809. };
  810. resetc: reset-ctl {
  811. compatible = "sandbox,reset-ctl";
  812. #reset-cells = <1>;
  813. };
  814. reset-ctl-test {
  815. compatible = "sandbox,reset-ctl-test";
  816. resets = <&resetc 100>, <&resetc 2>;
  817. reset-names = "other", "test";
  818. };
  819. rng {
  820. compatible = "sandbox,sandbox-rng";
  821. };
  822. rproc_1: rproc@1 {
  823. compatible = "sandbox,test-processor";
  824. remoteproc-name = "remoteproc-test-dev1";
  825. };
  826. rproc_2: rproc@2 {
  827. compatible = "sandbox,test-processor";
  828. internal-memory-mapped;
  829. remoteproc-name = "remoteproc-test-dev2";
  830. };
  831. panel {
  832. compatible = "simple-panel";
  833. backlight = <&backlight 0 100>;
  834. };
  835. smem@0 {
  836. compatible = "sandbox,smem";
  837. };
  838. sound {
  839. compatible = "sandbox,sound";
  840. cpu {
  841. sound-dai = <&i2s 0>;
  842. };
  843. codec {
  844. sound-dai = <&audio 0>;
  845. };
  846. };
  847. spi@0 {
  848. #address-cells = <1>;
  849. #size-cells = <0>;
  850. reg = <0 1>;
  851. compatible = "sandbox,spi";
  852. cs-gpios = <0>, <0>, <&gpio_a 0>;
  853. pinctrl-names = "default";
  854. pinctrl-0 = <&pinmux_spi0_pins>;
  855. spi.bin@0 {
  856. reg = <0>;
  857. compatible = "spansion,m25p16", "jedec,spi-nor";
  858. spi-max-frequency = <40000000>;
  859. sandbox,filename = "spi.bin";
  860. };
  861. spi.bin@1 {
  862. reg = <1>;
  863. compatible = "spansion,m25p16", "jedec,spi-nor";
  864. spi-max-frequency = <50000000>;
  865. sandbox,filename = "spi.bin";
  866. spi-cpol;
  867. spi-cpha;
  868. };
  869. };
  870. syscon0: syscon@0 {
  871. compatible = "sandbox,syscon0";
  872. reg = <0x10 16>;
  873. };
  874. another_system_controller: syscon@1 {
  875. compatible = "sandbox,syscon1";
  876. reg = <0x20 5
  877. 0x28 6
  878. 0x30 7
  879. 0x38 8>;
  880. };
  881. syscon2: syscon@2 {
  882. compatible = "simple-mfd", "syscon";
  883. reg = <0x40 5
  884. 0x48 6
  885. 0x50 7
  886. 0x58 8>;
  887. };
  888. syscon3: syscon@3 {
  889. compatible = "simple-mfd", "syscon";
  890. reg = <0x000100 0x10>;
  891. muxcontroller0: a-mux-controller {
  892. compatible = "mmio-mux";
  893. #mux-control-cells = <1>;
  894. mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
  895. <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
  896. <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
  897. idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
  898. u-boot,mux-autoprobe;
  899. };
  900. };
  901. muxcontroller1: emul-mux-controller {
  902. compatible = "mux-emul";
  903. #mux-control-cells = <0>;
  904. u-boot,mux-autoprobe;
  905. idle-state = <0xabcd>;
  906. };
  907. testfdtm0 {
  908. compatible = "denx,u-boot-fdtm-test";
  909. };
  910. testfdtm1: testfdtm1 {
  911. compatible = "denx,u-boot-fdtm-test";
  912. };
  913. testfdtm2 {
  914. compatible = "denx,u-boot-fdtm-test";
  915. };
  916. timer@0 {
  917. compatible = "sandbox,timer";
  918. clock-frequency = <1000000>;
  919. };
  920. timer@1 {
  921. compatible = "sandbox,timer";
  922. sandbox,timebase-frequency-fallback;
  923. };
  924. tpm2 {
  925. compatible = "sandbox,tpm2";
  926. };
  927. uart0: serial {
  928. compatible = "sandbox,serial";
  929. u-boot,dm-pre-reloc;
  930. pinctrl-names = "default";
  931. pinctrl-0 = <&pinmux_uart0_pins>;
  932. };
  933. usb_0: usb@0 {
  934. compatible = "sandbox,usb";
  935. status = "disabled";
  936. hub {
  937. compatible = "sandbox,usb-hub";
  938. #address-cells = <1>;
  939. #size-cells = <0>;
  940. flash-stick {
  941. reg = <0>;
  942. compatible = "sandbox,usb-flash";
  943. };
  944. };
  945. };
  946. usb_1: usb@1 {
  947. compatible = "sandbox,usb";
  948. hub {
  949. compatible = "usb-hub";
  950. usb,device-class = <9>;
  951. #address-cells = <1>;
  952. #size-cells = <0>;
  953. hub-emul {
  954. compatible = "sandbox,usb-hub";
  955. #address-cells = <1>;
  956. #size-cells = <0>;
  957. flash-stick@0 {
  958. reg = <0>;
  959. compatible = "sandbox,usb-flash";
  960. sandbox,filepath = "testflash.bin";
  961. };
  962. flash-stick@1 {
  963. reg = <1>;
  964. compatible = "sandbox,usb-flash";
  965. sandbox,filepath = "testflash1.bin";
  966. };
  967. flash-stick@2 {
  968. reg = <2>;
  969. compatible = "sandbox,usb-flash";
  970. sandbox,filepath = "testflash2.bin";
  971. };
  972. keyb@3 {
  973. reg = <3>;
  974. compatible = "sandbox,usb-keyb";
  975. };
  976. };
  977. usbstor@1 {
  978. reg = <1>;
  979. };
  980. usbstor@3 {
  981. reg = <3>;
  982. };
  983. };
  984. };
  985. usb_2: usb@2 {
  986. compatible = "sandbox,usb";
  987. status = "disabled";
  988. };
  989. spmi: spmi@0 {
  990. compatible = "sandbox,spmi";
  991. #address-cells = <0x1>;
  992. #size-cells = <0x1>;
  993. ranges;
  994. pm8916@0 {
  995. compatible = "qcom,spmi-pmic";
  996. reg = <0x0 0x1>;
  997. #address-cells = <0x1>;
  998. #size-cells = <0x1>;
  999. ranges;
  1000. spmi_gpios: gpios@c000 {
  1001. compatible = "qcom,pm8916-gpio";
  1002. reg = <0xc000 0x400>;
  1003. gpio-controller;
  1004. gpio-count = <4>;
  1005. #gpio-cells = <2>;
  1006. gpio-bank-name="spmi";
  1007. };
  1008. };
  1009. };
  1010. wdt0: wdt@0 {
  1011. compatible = "sandbox,wdt";
  1012. };
  1013. axi: axi@0 {
  1014. compatible = "sandbox,axi";
  1015. #address-cells = <0x1>;
  1016. #size-cells = <0x1>;
  1017. store@0 {
  1018. compatible = "sandbox,sandbox_store";
  1019. reg = <0x0 0x400>;
  1020. };
  1021. };
  1022. chosen {
  1023. #address-cells = <1>;
  1024. #size-cells = <1>;
  1025. setting = "sunrise ohoka";
  1026. other-node = "/some-bus/c-test@5";
  1027. int-values = <0x1937 72993>;
  1028. u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
  1029. chosen-test {
  1030. compatible = "denx,u-boot-fdt-test";
  1031. reg = <9 1>;
  1032. };
  1033. };
  1034. translation-test@8000 {
  1035. compatible = "simple-bus";
  1036. reg = <0x8000 0x4000>;
  1037. #address-cells = <0x2>;
  1038. #size-cells = <0x1>;
  1039. ranges = <0 0x0 0x8000 0x1000
  1040. 1 0x100 0x9000 0x1000
  1041. 2 0x200 0xA000 0x1000
  1042. 3 0x300 0xB000 0x1000
  1043. 4 0x400 0xC000 0x1000
  1044. >;
  1045. dma-ranges = <0 0x000 0x10000000 0x1000
  1046. 1 0x100 0x20000000 0x1000
  1047. >;
  1048. dev@0,0 {
  1049. compatible = "denx,u-boot-fdt-dummy";
  1050. reg = <0 0x0 0x1000>;
  1051. reg-names = "sandbox-dummy-0";
  1052. };
  1053. dev@1,100 {
  1054. compatible = "denx,u-boot-fdt-dummy";
  1055. reg = <1 0x100 0x1000>;
  1056. };
  1057. dev@2,200 {
  1058. compatible = "denx,u-boot-fdt-dummy";
  1059. reg = <2 0x200 0x1000>;
  1060. };
  1061. noxlatebus@3,300 {
  1062. compatible = "simple-bus";
  1063. reg = <3 0x300 0x1000>;
  1064. #address-cells = <0x1>;
  1065. #size-cells = <0x0>;
  1066. dev@42 {
  1067. compatible = "denx,u-boot-fdt-dummy";
  1068. reg = <0x42>;
  1069. };
  1070. };
  1071. xlatebus@4,400 {
  1072. compatible = "sandbox,zero-size-cells-bus";
  1073. reg = <4 0x400 0x1000>;
  1074. #address-cells = <1>;
  1075. #size-cells = <1>;
  1076. ranges = <0 4 0x400 0x1000>;
  1077. devs {
  1078. #address-cells = <1>;
  1079. #size-cells = <0>;
  1080. dev@19 {
  1081. compatible = "denx,u-boot-fdt-dummy";
  1082. reg = <0x19>;
  1083. };
  1084. };
  1085. };
  1086. };
  1087. osd {
  1088. compatible = "sandbox,sandbox_osd";
  1089. };
  1090. sandbox_tee {
  1091. compatible = "sandbox,tee";
  1092. };
  1093. sandbox_virtio1 {
  1094. compatible = "sandbox,virtio1";
  1095. };
  1096. sandbox_virtio2 {
  1097. compatible = "sandbox,virtio2";
  1098. };
  1099. sandbox_scmi {
  1100. compatible = "sandbox,scmi-devices";
  1101. clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>;
  1102. resets = <&reset_scmi0 3>;
  1103. };
  1104. pinctrl {
  1105. compatible = "sandbox,pinctrl";
  1106. pinctrl-names = "default", "alternate";
  1107. pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
  1108. pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
  1109. pinctrl_gpios: gpios {
  1110. gpio0 {
  1111. pins = "P5";
  1112. function = "GPIO";
  1113. bias-pull-up;
  1114. input-disable;
  1115. };
  1116. gpio1 {
  1117. pins = "P6";
  1118. function = "GPIO";
  1119. output-high;
  1120. drive-open-drain;
  1121. };
  1122. gpio2 {
  1123. pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
  1124. bias-pull-down;
  1125. input-enable;
  1126. };
  1127. gpio3 {
  1128. pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
  1129. bias-disable;
  1130. };
  1131. };
  1132. pinctrl_i2c: i2c {
  1133. groups {
  1134. groups = "I2C_UART";
  1135. function = "I2C";
  1136. };
  1137. pins {
  1138. pins = "P0", "P1";
  1139. drive-open-drain;
  1140. };
  1141. };
  1142. pinctrl_i2s: i2s {
  1143. groups = "SPI_I2S";
  1144. function = "I2S";
  1145. };
  1146. pinctrl_spi: spi {
  1147. groups = "SPI_I2S";
  1148. function = "SPI";
  1149. cs {
  1150. pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
  1151. <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
  1152. };
  1153. };
  1154. };
  1155. pinctrl-single-no-width {
  1156. compatible = "pinctrl-single";
  1157. reg = <0x0000 0x238>;
  1158. #pinctrl-cells = <1>;
  1159. pinctrl-single,function-mask = <0x7f>;
  1160. };
  1161. pinctrl-single-pins {
  1162. compatible = "pinctrl-single";
  1163. reg = <0x0000 0x238>;
  1164. #pinctrl-cells = <1>;
  1165. pinctrl-single,register-width = <32>;
  1166. pinctrl-single,function-mask = <0x7f>;
  1167. pinmux_pwm_pins: pinmux_pwm_pins {
  1168. pinctrl-single,pins = < 0x48 0x06 >;
  1169. };
  1170. pinmux_spi0_pins: pinmux_spi0_pins {
  1171. pinctrl-single,pins = <
  1172. 0x190 0x0c
  1173. 0x194 0x0c
  1174. 0x198 0x23
  1175. 0x19c 0x0c
  1176. >;
  1177. };
  1178. pinmux_uart0_pins: pinmux_uart0_pins {
  1179. pinctrl-single,pins = <
  1180. 0x70 0x30
  1181. 0x74 0x00
  1182. >;
  1183. };
  1184. };
  1185. pinctrl-single-bits {
  1186. compatible = "pinctrl-single";
  1187. reg = <0x0000 0x50>;
  1188. #pinctrl-cells = <2>;
  1189. pinctrl-single,bit-per-mux;
  1190. pinctrl-single,register-width = <32>;
  1191. pinctrl-single,function-mask = <0xf>;
  1192. pinmux_i2c0_pins: pinmux_i2c0_pins {
  1193. pinctrl-single,bits = <
  1194. 0x10 0x00002200 0x0000ff00
  1195. >;
  1196. };
  1197. pinmux_lcd_pins: pinmux_lcd_pins {
  1198. pinctrl-single,bits = <
  1199. 0x40 0x22222200 0xffffff00
  1200. 0x44 0x22222222 0xffffffff
  1201. 0x48 0x00000022 0x000000ff
  1202. 0x48 0x02000000 0x0f000000
  1203. 0x4c 0x02000022 0x0f0000ff
  1204. >;
  1205. };
  1206. };
  1207. hwspinlock@0 {
  1208. compatible = "sandbox,hwspinlock";
  1209. };
  1210. dma: dma {
  1211. compatible = "sandbox,dma";
  1212. #dma-cells = <1>;
  1213. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  1214. dma-names = "m2m", "tx0", "rx0";
  1215. };
  1216. /*
  1217. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  1218. * end of the test. If parent mdio is removed first, clean-up of the
  1219. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  1220. * active at the end of the test. That it turn doesn't allow the mdio
  1221. * class to be destroyed, triggering an error.
  1222. */
  1223. mdio-mux-test {
  1224. compatible = "sandbox,mdio-mux";
  1225. #address-cells = <1>;
  1226. #size-cells = <0>;
  1227. mdio-parent-bus = <&mdio>;
  1228. mdio-ch-test@0 {
  1229. reg = <0>;
  1230. };
  1231. mdio-ch-test@1 {
  1232. reg = <1>;
  1233. };
  1234. };
  1235. mdio: mdio-test {
  1236. compatible = "sandbox,mdio";
  1237. };
  1238. pm-bus-test {
  1239. compatible = "simple-pm-bus";
  1240. clocks = <&clk_sandbox 4>;
  1241. power-domains = <&pwrdom 1>;
  1242. };
  1243. resetc2: syscon-reset {
  1244. compatible = "syscon-reset";
  1245. #reset-cells = <1>;
  1246. regmap = <&syscon0>;
  1247. offset = <1>;
  1248. mask = <0x27FFFFFF>;
  1249. assert-high = <0>;
  1250. };
  1251. syscon-reset-test {
  1252. compatible = "sandbox,misc_sandbox";
  1253. resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
  1254. reset-names = "valid", "no_mask", "out_of_range";
  1255. };
  1256. sysinfo {
  1257. compatible = "sandbox,sysinfo-sandbox";
  1258. };
  1259. some_regmapped-bus {
  1260. #address-cells = <0x1>;
  1261. #size-cells = <0x1>;
  1262. ranges = <0x0 0x0 0x10>;
  1263. compatible = "simple-bus";
  1264. regmap-test_0 {
  1265. reg = <0 0x10>;
  1266. compatible = "sandbox,regmap_test";
  1267. };
  1268. };
  1269. };
  1270. #include "sandbox_pmic.dtsi"