dram.c 1.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2020 Stefan Roese <sr@denx.de>
  4. */
  5. #include <config.h>
  6. #include <dm.h>
  7. #include <ram.h>
  8. #include <asm/global_data.h>
  9. #include <linux/compat.h>
  10. #include <display_options.h>
  11. DECLARE_GLOBAL_DATA_PTR;
  12. #define UBOOT_RAM_SIZE_MAX 0x10000000ULL
  13. int dram_init(void)
  14. {
  15. if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
  16. struct ram_info ram;
  17. struct udevice *dev;
  18. int ret;
  19. ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  20. if (ret) {
  21. debug("DRAM init failed: %d\n", ret);
  22. return ret;
  23. }
  24. ret = ram_get_info(dev, &ram);
  25. if (ret) {
  26. debug("Cannot get DRAM size: %d\n", ret);
  27. return ret;
  28. }
  29. gd->ram_size = ram.size;
  30. debug("SDRAM base=%lx, size=%lx\n",
  31. (unsigned long)ram.base, (unsigned long)ram.size);
  32. } else {
  33. /*
  34. * No DDR init yet -> run in L2 cache
  35. */
  36. gd->ram_size = (4 << 20);
  37. gd->bd->bi_dram[0].size = gd->ram_size;
  38. gd->bd->bi_dram[1].size = 0;
  39. }
  40. return 0;
  41. }
  42. void board_add_ram_info(int use_default)
  43. {
  44. if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
  45. struct ram_info ram;
  46. struct udevice *dev;
  47. int ret;
  48. ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  49. if (ret) {
  50. debug("DRAM init failed: %d\n", ret);
  51. return;
  52. }
  53. ret = ram_get_info(dev, &ram);
  54. if (ret) {
  55. debug("Cannot get DRAM size: %d\n", ret);
  56. return;
  57. }
  58. printf(" (");
  59. print_size(ram.size, " total)");
  60. }
  61. }
  62. phys_size_t get_effective_memsize(void)
  63. {
  64. return UBOOT_RAM_SIZE_MAX;
  65. }
  66. ulong board_get_usable_ram_top(ulong total_size)
  67. {
  68. if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
  69. /* Map a maximum of 256MiB - return not size but address */
  70. return CONFIG_SYS_SDRAM_BASE + min(gd->ram_size,
  71. UBOOT_RAM_SIZE_MAX);
  72. } else {
  73. return gd->ram_top;
  74. }
  75. }