test.dts 27 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/gpio/sandbox-gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/pinctrl/sandbox-pinmux.h>
  6. #include <dt-bindings/mux/mux.h>
  7. / {
  8. model = "sandbox";
  9. compatible = "sandbox";
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. aliases {
  13. console = &uart0;
  14. eth0 = "/eth@10002000";
  15. eth2 = &swp_0;
  16. eth3 = &eth_3;
  17. eth4 = &dsa_eth0;
  18. eth5 = &eth_5;
  19. gpio1 = &gpio_a;
  20. gpio2 = &gpio_b;
  21. gpio3 = &gpio_c;
  22. i2c0 = "/i2c@0";
  23. mmc0 = "/mmc0";
  24. mmc1 = "/mmc1";
  25. pci0 = &pci0;
  26. pci1 = &pci1;
  27. pci2 = &pci2;
  28. remoteproc0 = &rproc_1;
  29. remoteproc1 = &rproc_2;
  30. rtc0 = &rtc_0;
  31. rtc1 = &rtc_1;
  32. spi0 = "/spi@0";
  33. testfdt6 = "/e-test";
  34. testbus3 = "/some-bus";
  35. testfdt0 = "/some-bus/c-test@0";
  36. testfdt12 = "/some-bus/c-test@1";
  37. testfdt3 = "/b-test";
  38. testfdt5 = "/some-bus/c-test@5";
  39. testfdt8 = "/a-test";
  40. testfdtm1 = &testfdtm1;
  41. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  42. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  43. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  44. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  45. fdt-dummy4 = "/translation-test@8000/xlatebus@4,400/devs/dev@19";
  46. usb0 = &usb_0;
  47. usb1 = &usb_1;
  48. usb2 = &usb_2;
  49. axi0 = &axi;
  50. osd0 = "/osd";
  51. };
  52. audio: audio-codec {
  53. compatible = "sandbox,audio-codec";
  54. #sound-dai-cells = <1>;
  55. };
  56. buttons {
  57. compatible = "gpio-keys";
  58. btn1 {
  59. gpios = <&gpio_a 3 0>;
  60. label = "button1";
  61. };
  62. btn2 {
  63. gpios = <&gpio_a 4 0>;
  64. label = "button2";
  65. };
  66. };
  67. buttons2 {
  68. compatible = "adc-keys";
  69. io-channels = <&adc 3>;
  70. keyup-threshold-microvolt = <3000000>;
  71. button-up {
  72. label = "button3";
  73. linux,code = <KEY_F3>;
  74. press-threshold-microvolt = <1500000>;
  75. };
  76. button-down {
  77. label = "button4";
  78. linux,code = <KEY_F4>;
  79. press-threshold-microvolt = <1000000>;
  80. };
  81. button-enter {
  82. label = "button5";
  83. linux,code = <KEY_F5>;
  84. press-threshold-microvolt = <500000>;
  85. };
  86. };
  87. cros_ec: cros-ec {
  88. reg = <0 0>;
  89. compatible = "google,cros-ec-sandbox";
  90. /*
  91. * This describes the flash memory within the EC. Note
  92. * that the STM32L flash erases to 0, not 0xff.
  93. */
  94. flash {
  95. image-pos = <0x08000000>;
  96. size = <0x20000>;
  97. erase-value = <0>;
  98. /* Information for sandbox */
  99. ro {
  100. image-pos = <0>;
  101. size = <0xf000>;
  102. };
  103. wp-ro {
  104. image-pos = <0xf000>;
  105. size = <0x1000>;
  106. used = <0x884>;
  107. compress = "lz4";
  108. uncomp-size = <0xcf8>;
  109. hash {
  110. algo = "sha256";
  111. value = [00 01 02 03 04 05 06 07
  112. 08 09 0a 0b 0c 0d 0e 0f
  113. 10 11 12 13 14 15 16 17
  114. 18 19 1a 1b 1c 1d 1e 1f];
  115. };
  116. };
  117. rw {
  118. image-pos = <0x10000>;
  119. size = <0x10000>;
  120. };
  121. };
  122. };
  123. dsi_host: dsi_host {
  124. compatible = "sandbox,dsi-host";
  125. };
  126. a-test {
  127. reg = <0 1>;
  128. compatible = "denx,u-boot-fdt-test";
  129. ping-expect = <0>;
  130. ping-add = <0>;
  131. u-boot,dm-pre-reloc;
  132. test-gpios = <&gpio_a 1>, <&gpio_a 4>,
  133. <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
  134. <0>, <&gpio_a 12>;
  135. test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
  136. <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
  137. <&gpio_b 7 GPIO_IN 3 2 1>,
  138. <&gpio_b 8 GPIO_OUT 3 2 1>,
  139. <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
  140. test3-gpios =
  141. <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
  142. <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
  143. <&gpio_c 2 GPIO_OUT>,
  144. <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
  145. <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
  146. <&gpio_c 5 GPIO_IN>,
  147. <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
  148. <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
  149. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  150. test5-gpios = <&gpio_a 19>;
  151. int-value = <1234>;
  152. uint-value = <(-1234)>;
  153. int64-value = /bits/ 64 <0x1111222233334444>;
  154. int-array = <5678 9123 4567>;
  155. str-value = "test string";
  156. interrupts-extended = <&irq 3 0>;
  157. acpi,name = "GHIJ";
  158. phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
  159. mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
  160. <&muxcontroller0 2>, <&muxcontroller0 3>,
  161. <&muxcontroller1>;
  162. mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
  163. mux-syscon = <&syscon3>;
  164. display-timings {
  165. timing0: 240x320 {
  166. clock-frequency = <6500000>;
  167. hactive = <240>;
  168. vactive = <320>;
  169. hfront-porch = <6>;
  170. hback-porch = <7>;
  171. hsync-len = <1>;
  172. vback-porch = <5>;
  173. vfront-porch = <8>;
  174. vsync-len = <2>;
  175. hsync-active = <1>;
  176. vsync-active = <0>;
  177. de-active = <1>;
  178. pixelclk-active = <1>;
  179. interlaced;
  180. doublescan;
  181. doubleclk;
  182. };
  183. timing1: 480x800 {
  184. clock-frequency = <9000000>;
  185. hactive = <480>;
  186. vactive = <800>;
  187. hfront-porch = <10>;
  188. hback-porch = <59>;
  189. hsync-len = <12>;
  190. vback-porch = <15>;
  191. vfront-porch = <17>;
  192. vsync-len = <16>;
  193. hsync-active = <0>;
  194. vsync-active = <1>;
  195. de-active = <0>;
  196. pixelclk-active = <0>;
  197. };
  198. timing2: 800x480 {
  199. clock-frequency = <33500000>;
  200. hactive = <800>;
  201. vactive = <480>;
  202. hback-porch = <89>;
  203. hfront-porch = <164>;
  204. vback-porch = <23>;
  205. vfront-porch = <10>;
  206. hsync-len = <11>;
  207. vsync-len = <13>;
  208. };
  209. };
  210. };
  211. junk {
  212. reg = <1 1>;
  213. compatible = "not,compatible";
  214. };
  215. no-compatible {
  216. reg = <2 1>;
  217. };
  218. backlight: backlight {
  219. compatible = "pwm-backlight";
  220. enable-gpios = <&gpio_a 1>;
  221. power-supply = <&ldo_1>;
  222. pwms = <&pwm 0 1000>;
  223. default-brightness-level = <5>;
  224. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  225. };
  226. bind-test {
  227. compatible = "simple-bus";
  228. bind-test-child1 {
  229. compatible = "sandbox,phy";
  230. #phy-cells = <1>;
  231. };
  232. bind-test-child2 {
  233. compatible = "simple-bus";
  234. };
  235. };
  236. b-test {
  237. reg = <3 1>;
  238. compatible = "denx,u-boot-fdt-test";
  239. ping-expect = <3>;
  240. ping-add = <3>;
  241. mux-controls = <&muxcontroller0 0>;
  242. mux-control-names = "mux0";
  243. };
  244. phy_provider0: gen_phy@0 {
  245. compatible = "sandbox,phy";
  246. #phy-cells = <1>;
  247. };
  248. phy_provider1: gen_phy@1 {
  249. compatible = "sandbox,phy";
  250. #phy-cells = <0>;
  251. broken;
  252. };
  253. phy_provider2: gen_phy@2 {
  254. compatible = "sandbox,phy";
  255. #phy-cells = <0>;
  256. };
  257. gen_phy_user: gen_phy_user {
  258. compatible = "simple-bus";
  259. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  260. phy-names = "phy1", "phy2", "phy3";
  261. };
  262. gen_phy_user1: gen_phy_user1 {
  263. compatible = "simple-bus";
  264. phys = <&phy_provider0 0>, <&phy_provider2>;
  265. phy-names = "phy1", "phy2";
  266. };
  267. some-bus {
  268. #address-cells = <1>;
  269. #size-cells = <0>;
  270. compatible = "denx,u-boot-test-bus";
  271. reg = <3 1>;
  272. ping-expect = <4>;
  273. ping-add = <4>;
  274. c-test@5 {
  275. compatible = "denx,u-boot-fdt-test";
  276. reg = <5>;
  277. ping-expect = <5>;
  278. ping-add = <5>;
  279. };
  280. c-test@0 {
  281. compatible = "denx,u-boot-fdt-test";
  282. reg = <0>;
  283. ping-expect = <6>;
  284. ping-add = <6>;
  285. };
  286. c-test@1 {
  287. compatible = "denx,u-boot-fdt-test";
  288. reg = <1>;
  289. ping-expect = <7>;
  290. ping-add = <7>;
  291. };
  292. };
  293. d-test {
  294. reg = <3 1>;
  295. ping-expect = <6>;
  296. ping-add = <6>;
  297. compatible = "google,another-fdt-test";
  298. };
  299. e-test {
  300. reg = <3 1>;
  301. ping-expect = <6>;
  302. ping-add = <6>;
  303. compatible = "google,another-fdt-test";
  304. };
  305. f-test {
  306. compatible = "denx,u-boot-fdt-test";
  307. };
  308. g-test {
  309. compatible = "denx,u-boot-fdt-test";
  310. };
  311. h-test {
  312. compatible = "denx,u-boot-fdt-test1";
  313. };
  314. i-test {
  315. compatible = "mediatek,u-boot-fdt-test";
  316. #address-cells = <1>;
  317. #size-cells = <0>;
  318. subnode@0 {
  319. reg = <0>;
  320. };
  321. subnode@1 {
  322. reg = <1>;
  323. };
  324. subnode@2 {
  325. reg = <2>;
  326. };
  327. };
  328. devres-test {
  329. compatible = "denx,u-boot-devres-test";
  330. };
  331. another-test {
  332. reg = <0 2>;
  333. compatible = "denx,u-boot-fdt-test";
  334. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  335. test5-gpios = <&gpio_a 19>;
  336. };
  337. mmio-bus@0 {
  338. #address-cells = <1>;
  339. #size-cells = <1>;
  340. compatible = "denx,u-boot-test-bus";
  341. dma-ranges = <0x10000000 0x00000000 0x00040000>;
  342. subnode@0 {
  343. compatible = "denx,u-boot-fdt-test";
  344. };
  345. };
  346. mmio-bus@1 {
  347. #address-cells = <1>;
  348. #size-cells = <1>;
  349. compatible = "denx,u-boot-test-bus";
  350. subnode@0 {
  351. compatible = "denx,u-boot-fdt-test";
  352. };
  353. };
  354. acpi_test1: acpi-test {
  355. compatible = "denx,u-boot-acpi-test";
  356. acpi-ssdt-test-data = "ab";
  357. acpi-dsdt-test-data = "hi";
  358. child {
  359. compatible = "denx,u-boot-acpi-test";
  360. };
  361. };
  362. acpi_test2: acpi-test2 {
  363. compatible = "denx,u-boot-acpi-test";
  364. acpi-ssdt-test-data = "cd";
  365. acpi-dsdt-test-data = "jk";
  366. };
  367. clocks {
  368. clk_fixed: clk-fixed {
  369. compatible = "fixed-clock";
  370. #clock-cells = <0>;
  371. clock-frequency = <1234>;
  372. };
  373. clk_fixed_factor: clk-fixed-factor {
  374. compatible = "fixed-factor-clock";
  375. #clock-cells = <0>;
  376. clock-div = <3>;
  377. clock-mult = <2>;
  378. clocks = <&clk_fixed>;
  379. };
  380. osc {
  381. compatible = "fixed-clock";
  382. #clock-cells = <0>;
  383. clock-frequency = <20000000>;
  384. };
  385. };
  386. clk_sandbox: clk-sbox {
  387. compatible = "sandbox,clk";
  388. #clock-cells = <1>;
  389. assigned-clocks = <&clk_sandbox 3>;
  390. assigned-clock-rates = <321>;
  391. };
  392. clk-test {
  393. compatible = "sandbox,clk-test";
  394. clocks = <&clk_fixed>,
  395. <&clk_sandbox 1>,
  396. <&clk_sandbox 0>,
  397. <&clk_sandbox 3>,
  398. <&clk_sandbox 2>;
  399. clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
  400. };
  401. ccf: clk-ccf {
  402. compatible = "sandbox,clk-ccf";
  403. };
  404. eth@10002000 {
  405. compatible = "sandbox,eth";
  406. reg = <0x10002000 0x1000>;
  407. fake-host-hwaddr = [00 00 66 44 22 00];
  408. };
  409. eth_5: eth@10003000 {
  410. compatible = "sandbox,eth";
  411. reg = <0x10003000 0x1000>;
  412. fake-host-hwaddr = [00 00 66 44 22 11];
  413. };
  414. eth_3: sbe5 {
  415. compatible = "sandbox,eth";
  416. reg = <0x10005000 0x1000>;
  417. fake-host-hwaddr = [00 00 66 44 22 33];
  418. };
  419. eth@10004000 {
  420. compatible = "sandbox,eth";
  421. reg = <0x10004000 0x1000>;
  422. fake-host-hwaddr = [00 00 66 44 22 22];
  423. };
  424. dsa_eth0: dsa-test-eth {
  425. compatible = "sandbox,eth";
  426. reg = <0x10006000 0x1000>;
  427. fake-host-hwaddr = [00 00 66 44 22 66];
  428. };
  429. dsa-test {
  430. compatible = "sandbox,dsa";
  431. ports {
  432. #address-cells = <1>;
  433. #size-cells = <0>;
  434. swp_0: port@0 {
  435. reg = <0>;
  436. label = "lan0";
  437. phy-mode = "rgmii-rxid";
  438. fixed-link {
  439. speed = <100>;
  440. full-duplex;
  441. };
  442. };
  443. swp_1: port@1 {
  444. reg = <1>;
  445. label = "lan1";
  446. phy-mode = "rgmii-txid";
  447. fixed-link = <0 1 100 0 0>;
  448. };
  449. port@2 {
  450. reg = <2>;
  451. ethernet = <&dsa_eth0>;
  452. fixed-link {
  453. speed = <1000>;
  454. full-duplex;
  455. };
  456. };
  457. };
  458. };
  459. firmware {
  460. sandbox_firmware: sandbox-firmware {
  461. compatible = "sandbox,firmware";
  462. };
  463. sandbox-scmi-agent@0 {
  464. compatible = "sandbox,scmi-agent";
  465. #address-cells = <1>;
  466. #size-cells = <0>;
  467. clk_scmi0: protocol@14 {
  468. reg = <0x14>;
  469. #clock-cells = <1>;
  470. };
  471. reset_scmi0: protocol@16 {
  472. reg = <0x16>;
  473. #reset-cells = <1>;
  474. };
  475. protocol@17 {
  476. reg = <0x17>;
  477. regulators {
  478. #address-cells = <1>;
  479. #size-cells = <0>;
  480. regul0_scmi0: reg@0 {
  481. reg = <0>;
  482. regulator-name = "sandbox-voltd0";
  483. regulator-min-microvolt = <1100000>;
  484. regulator-max-microvolt = <3300000>;
  485. };
  486. regul1_scmi0: reg@1 {
  487. reg = <0x1>;
  488. regulator-name = "sandbox-voltd1";
  489. regulator-min-microvolt = <1800000>;
  490. };
  491. };
  492. };
  493. };
  494. sandbox-scmi-agent@1 {
  495. compatible = "sandbox,scmi-agent";
  496. #address-cells = <1>;
  497. #size-cells = <0>;
  498. clk_scmi1: protocol@14 {
  499. reg = <0x14>;
  500. #clock-cells = <1>;
  501. };
  502. protocol@10 {
  503. reg = <0x10>;
  504. };
  505. };
  506. };
  507. pinctrl-gpio {
  508. compatible = "sandbox,pinctrl-gpio";
  509. gpio_a: base-gpios {
  510. compatible = "sandbox,gpio";
  511. gpio-controller;
  512. #gpio-cells = <1>;
  513. gpio-bank-name = "a";
  514. sandbox,gpio-count = <20>;
  515. hog_input_active_low {
  516. gpio-hog;
  517. input;
  518. gpios = <10 GPIO_ACTIVE_LOW>;
  519. };
  520. hog_input_active_high {
  521. gpio-hog;
  522. input;
  523. gpios = <11 GPIO_ACTIVE_HIGH>;
  524. };
  525. hog_output_low {
  526. gpio-hog;
  527. output-low;
  528. gpios = <12 GPIO_ACTIVE_HIGH>;
  529. };
  530. hog_output_high {
  531. gpio-hog;
  532. output-high;
  533. gpios = <13 GPIO_ACTIVE_HIGH>;
  534. };
  535. };
  536. gpio_b: extra-gpios {
  537. compatible = "sandbox,gpio";
  538. gpio-controller;
  539. #gpio-cells = <5>;
  540. gpio-bank-name = "b";
  541. sandbox,gpio-count = <10>;
  542. };
  543. gpio_c: pinmux-gpios {
  544. compatible = "sandbox,gpio";
  545. gpio-controller;
  546. #gpio-cells = <2>;
  547. gpio-bank-name = "c";
  548. sandbox,gpio-count = <10>;
  549. };
  550. };
  551. i2c@0 {
  552. #address-cells = <1>;
  553. #size-cells = <0>;
  554. reg = <0 1>;
  555. compatible = "sandbox,i2c";
  556. clock-frequency = <100000>;
  557. eeprom@2c {
  558. reg = <0x2c>;
  559. compatible = "i2c-eeprom";
  560. sandbox,emul = <&emul_eeprom>;
  561. partitions {
  562. compatible = "fixed-partitions";
  563. #address-cells = <1>;
  564. #size-cells = <1>;
  565. bootcount_i2c: bootcount@10 {
  566. reg = <10 2>;
  567. };
  568. };
  569. };
  570. rtc_0: rtc@43 {
  571. reg = <0x43>;
  572. compatible = "sandbox-rtc";
  573. sandbox,emul = <&emul0>;
  574. };
  575. rtc_1: rtc@61 {
  576. reg = <0x61>;
  577. compatible = "sandbox-rtc";
  578. sandbox,emul = <&emul1>;
  579. };
  580. i2c_emul: emul {
  581. reg = <0xff>;
  582. compatible = "sandbox,i2c-emul-parent";
  583. emul_eeprom: emul-eeprom {
  584. compatible = "sandbox,i2c-eeprom";
  585. sandbox,filename = "i2c.bin";
  586. sandbox,size = <256>;
  587. };
  588. emul0: emul0 {
  589. compatible = "sandbox,i2c-rtc-emul";
  590. };
  591. emul1: emull {
  592. compatible = "sandbox,i2c-rtc-emul";
  593. };
  594. };
  595. sandbox_pmic: sandbox_pmic {
  596. reg = <0x40>;
  597. sandbox,emul = <&emul_pmic0>;
  598. };
  599. mc34708: pmic@41 {
  600. reg = <0x41>;
  601. sandbox,emul = <&emul_pmic1>;
  602. };
  603. };
  604. bootcount@0 {
  605. compatible = "u-boot,bootcount-rtc";
  606. rtc = <&rtc_1>;
  607. offset = <0x13>;
  608. };
  609. bootcount {
  610. compatible = "u-boot,bootcount-i2c-eeprom";
  611. i2c-eeprom = <&bootcount_i2c>;
  612. };
  613. adc: adc@0 {
  614. compatible = "sandbox,adc";
  615. #io-channel-cells = <1>;
  616. vdd-supply = <&buck2>;
  617. vss-microvolts = <0>;
  618. };
  619. irq: irq {
  620. compatible = "sandbox,irq";
  621. interrupt-controller;
  622. #interrupt-cells = <2>;
  623. };
  624. lcd {
  625. u-boot,dm-pre-reloc;
  626. compatible = "sandbox,lcd-sdl";
  627. xres = <1366>;
  628. yres = <768>;
  629. };
  630. leds {
  631. compatible = "gpio-leds";
  632. iracibble {
  633. gpios = <&gpio_a 1 0>;
  634. label = "sandbox:red";
  635. };
  636. martinet {
  637. gpios = <&gpio_a 2 0>;
  638. label = "sandbox:green";
  639. };
  640. default_on {
  641. gpios = <&gpio_a 5 0>;
  642. label = "sandbox:default_on";
  643. default-state = "on";
  644. };
  645. default_off {
  646. gpios = <&gpio_a 6 0>;
  647. /* label intentionally omitted */
  648. default-state = "off";
  649. };
  650. };
  651. mbox: mbox {
  652. compatible = "sandbox,mbox";
  653. #mbox-cells = <1>;
  654. };
  655. mbox-test {
  656. compatible = "sandbox,mbox-test";
  657. mboxes = <&mbox 100>, <&mbox 1>;
  658. mbox-names = "other", "test";
  659. };
  660. cpus {
  661. timebase-frequency = <2000000>;
  662. cpu-test1 {
  663. timebase-frequency = <3000000>;
  664. compatible = "sandbox,cpu_sandbox";
  665. u-boot,dm-pre-reloc;
  666. };
  667. cpu-test2 {
  668. compatible = "sandbox,cpu_sandbox";
  669. u-boot,dm-pre-reloc;
  670. };
  671. cpu-test3 {
  672. compatible = "sandbox,cpu_sandbox";
  673. u-boot,dm-pre-reloc;
  674. };
  675. };
  676. chipid: chipid {
  677. compatible = "sandbox,soc";
  678. };
  679. i2s: i2s {
  680. compatible = "sandbox,i2s";
  681. #sound-dai-cells = <1>;
  682. sandbox,silent; /* Don't emit sounds while testing */
  683. };
  684. nop-test_0 {
  685. compatible = "sandbox,nop_sandbox1";
  686. nop-test_1 {
  687. compatible = "sandbox,nop_sandbox2";
  688. bind = "True";
  689. };
  690. nop-test_2 {
  691. compatible = "sandbox,nop_sandbox2";
  692. bind = "False";
  693. };
  694. };
  695. misc-test {
  696. compatible = "sandbox,misc_sandbox";
  697. };
  698. mmc2 {
  699. compatible = "sandbox,mmc";
  700. };
  701. mmc1 {
  702. compatible = "sandbox,mmc";
  703. };
  704. mmc0 {
  705. compatible = "sandbox,mmc";
  706. };
  707. pch {
  708. compatible = "sandbox,pch";
  709. };
  710. pci0: pci@0 {
  711. compatible = "sandbox,pci";
  712. device_type = "pci";
  713. bus-range = <0x00 0xff>;
  714. #address-cells = <3>;
  715. #size-cells = <2>;
  716. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  717. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  718. pci@0,0 {
  719. compatible = "pci-generic";
  720. reg = <0x0000 0 0 0 0>;
  721. sandbox,emul = <&swap_case_emul0_0>;
  722. };
  723. pci@1,0 {
  724. compatible = "pci-generic";
  725. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  726. reg = <0x02000814 0 0 0 0
  727. 0x01000810 0 0 0 0>;
  728. sandbox,emul = <&swap_case_emul0_1>;
  729. };
  730. p2sb-pci@2,0 {
  731. compatible = "sandbox,p2sb";
  732. reg = <0x02001010 0 0 0 0>;
  733. sandbox,emul = <&p2sb_emul>;
  734. adder {
  735. intel,p2sb-port-id = <3>;
  736. compatible = "sandbox,adder";
  737. };
  738. };
  739. pci@1e,0 {
  740. compatible = "sandbox,pmc";
  741. reg = <0xf000 0 0 0 0>;
  742. sandbox,emul = <&pmc_emul1e>;
  743. acpi-base = <0x400>;
  744. gpe0-dwx-mask = <0xf>;
  745. gpe0-dwx-shift-base = <4>;
  746. gpe0-dw = <6 7 9>;
  747. gpe0-sts = <0x20>;
  748. gpe0-en = <0x30>;
  749. };
  750. pci@1f,0 {
  751. compatible = "pci-generic";
  752. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  753. reg = <0x0100f810 0 0 0 0>;
  754. sandbox,emul = <&swap_case_emul0_1f>;
  755. };
  756. };
  757. pci-emul0 {
  758. compatible = "sandbox,pci-emul-parent";
  759. swap_case_emul0_0: emul0@0,0 {
  760. compatible = "sandbox,swap-case";
  761. };
  762. swap_case_emul0_1: emul0@1,0 {
  763. compatible = "sandbox,swap-case";
  764. use-ea;
  765. };
  766. swap_case_emul0_1f: emul0@1f,0 {
  767. compatible = "sandbox,swap-case";
  768. };
  769. p2sb_emul: emul@2,0 {
  770. compatible = "sandbox,p2sb-emul";
  771. };
  772. pmc_emul1e: emul@1e,0 {
  773. compatible = "sandbox,pmc-emul";
  774. };
  775. };
  776. pci1: pci@1 {
  777. compatible = "sandbox,pci";
  778. device_type = "pci";
  779. bus-range = <0x00 0xff>;
  780. #address-cells = <3>;
  781. #size-cells = <2>;
  782. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
  783. 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1
  784. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  785. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  786. 0x0c 0x00 0x1234 0x5678
  787. 0x10 0x00 0x1234 0x5678>;
  788. pci@10,0 {
  789. reg = <0x8000 0 0 0 0>;
  790. };
  791. };
  792. pci2: pci@2 {
  793. compatible = "sandbox,pci";
  794. device_type = "pci";
  795. bus-range = <0x00 0xff>;
  796. #address-cells = <3>;
  797. #size-cells = <2>;
  798. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  799. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  800. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  801. pci@1f,0 {
  802. compatible = "pci-generic";
  803. reg = <0xf800 0 0 0 0>;
  804. sandbox,emul = <&swap_case_emul2_1f>;
  805. };
  806. };
  807. pci-emul2 {
  808. compatible = "sandbox,pci-emul-parent";
  809. swap_case_emul2_1f: emul2@1f,0 {
  810. compatible = "sandbox,swap-case";
  811. };
  812. };
  813. pci_ep: pci_ep {
  814. compatible = "sandbox,pci_ep";
  815. };
  816. probing {
  817. compatible = "simple-bus";
  818. test1 {
  819. compatible = "denx,u-boot-probe-test";
  820. };
  821. test2 {
  822. compatible = "denx,u-boot-probe-test";
  823. };
  824. test3 {
  825. compatible = "denx,u-boot-probe-test";
  826. };
  827. test4 {
  828. compatible = "denx,u-boot-probe-test";
  829. first-syscon = <&syscon0>;
  830. second-sys-ctrl = <&another_system_controller>;
  831. third-syscon = <&syscon2>;
  832. };
  833. };
  834. pwrdom: power-domain {
  835. compatible = "sandbox,power-domain";
  836. #power-domain-cells = <1>;
  837. };
  838. power-domain-test {
  839. compatible = "sandbox,power-domain-test";
  840. power-domains = <&pwrdom 2>;
  841. };
  842. pwm: pwm {
  843. compatible = "sandbox,pwm";
  844. #pwm-cells = <2>;
  845. };
  846. pwm2 {
  847. compatible = "sandbox,pwm";
  848. #pwm-cells = <2>;
  849. };
  850. ram {
  851. compatible = "sandbox,ram";
  852. };
  853. reset@0 {
  854. compatible = "sandbox,warm-reset";
  855. };
  856. reset@1 {
  857. compatible = "sandbox,reset";
  858. };
  859. resetc: reset-ctl {
  860. compatible = "sandbox,reset-ctl";
  861. #reset-cells = <1>;
  862. };
  863. reset-ctl-test {
  864. compatible = "sandbox,reset-ctl-test";
  865. resets = <&resetc 100>, <&resetc 2>;
  866. reset-names = "other", "test";
  867. };
  868. rng {
  869. compatible = "sandbox,sandbox-rng";
  870. };
  871. rproc_1: rproc@1 {
  872. compatible = "sandbox,test-processor";
  873. remoteproc-name = "remoteproc-test-dev1";
  874. };
  875. rproc_2: rproc@2 {
  876. compatible = "sandbox,test-processor";
  877. internal-memory-mapped;
  878. remoteproc-name = "remoteproc-test-dev2";
  879. };
  880. panel {
  881. compatible = "simple-panel";
  882. backlight = <&backlight 0 100>;
  883. };
  884. smem@0 {
  885. compatible = "sandbox,smem";
  886. };
  887. sound {
  888. compatible = "sandbox,sound";
  889. cpu {
  890. sound-dai = <&i2s 0>;
  891. };
  892. codec {
  893. sound-dai = <&audio 0>;
  894. };
  895. };
  896. spi@0 {
  897. #address-cells = <1>;
  898. #size-cells = <0>;
  899. reg = <0 1>;
  900. compatible = "sandbox,spi";
  901. cs-gpios = <0>, <0>, <&gpio_a 0>;
  902. spi.bin@0 {
  903. reg = <0>;
  904. compatible = "spansion,m25p16", "jedec,spi-nor";
  905. spi-max-frequency = <40000000>;
  906. sandbox,filename = "spi.bin";
  907. };
  908. spi.bin@1 {
  909. reg = <1>;
  910. compatible = "spansion,m25p16", "jedec,spi-nor";
  911. spi-max-frequency = <50000000>;
  912. sandbox,filename = "spi.bin";
  913. spi-cpol;
  914. spi-cpha;
  915. };
  916. };
  917. syscon0: syscon@0 {
  918. compatible = "sandbox,syscon0";
  919. reg = <0x10 16>;
  920. };
  921. another_system_controller: syscon@1 {
  922. compatible = "sandbox,syscon1";
  923. reg = <0x20 5
  924. 0x28 6
  925. 0x30 7
  926. 0x38 8>;
  927. };
  928. syscon2: syscon@2 {
  929. compatible = "simple-mfd", "syscon";
  930. reg = <0x40 5
  931. 0x48 6
  932. 0x50 7
  933. 0x58 8>;
  934. };
  935. syscon3: syscon@3 {
  936. compatible = "simple-mfd", "syscon";
  937. reg = <0x000100 0x10>;
  938. muxcontroller0: a-mux-controller {
  939. compatible = "mmio-mux";
  940. #mux-control-cells = <1>;
  941. mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
  942. <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
  943. <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
  944. idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
  945. u-boot,mux-autoprobe;
  946. };
  947. };
  948. muxcontroller1: emul-mux-controller {
  949. compatible = "mux-emul";
  950. #mux-control-cells = <0>;
  951. u-boot,mux-autoprobe;
  952. idle-state = <0xabcd>;
  953. };
  954. testfdtm0 {
  955. compatible = "denx,u-boot-fdtm-test";
  956. };
  957. testfdtm1: testfdtm1 {
  958. compatible = "denx,u-boot-fdtm-test";
  959. };
  960. testfdtm2 {
  961. compatible = "denx,u-boot-fdtm-test";
  962. };
  963. timer@0 {
  964. compatible = "sandbox,timer";
  965. clock-frequency = <1000000>;
  966. };
  967. timer@1 {
  968. compatible = "sandbox,timer";
  969. sandbox,timebase-frequency-fallback;
  970. };
  971. tpm2 {
  972. compatible = "sandbox,tpm2";
  973. };
  974. uart0: serial {
  975. compatible = "sandbox,serial";
  976. u-boot,dm-pre-reloc;
  977. };
  978. usb_0: usb@0 {
  979. compatible = "sandbox,usb";
  980. status = "disabled";
  981. hub {
  982. compatible = "sandbox,usb-hub";
  983. #address-cells = <1>;
  984. #size-cells = <0>;
  985. flash-stick {
  986. reg = <0>;
  987. compatible = "sandbox,usb-flash";
  988. };
  989. };
  990. };
  991. usb_1: usb@1 {
  992. compatible = "sandbox,usb";
  993. hub {
  994. compatible = "usb-hub";
  995. usb,device-class = <9>;
  996. #address-cells = <1>;
  997. #size-cells = <0>;
  998. hub-emul {
  999. compatible = "sandbox,usb-hub";
  1000. #address-cells = <1>;
  1001. #size-cells = <0>;
  1002. flash-stick@0 {
  1003. reg = <0>;
  1004. compatible = "sandbox,usb-flash";
  1005. sandbox,filepath = "testflash.bin";
  1006. };
  1007. flash-stick@1 {
  1008. reg = <1>;
  1009. compatible = "sandbox,usb-flash";
  1010. sandbox,filepath = "testflash1.bin";
  1011. };
  1012. flash-stick@2 {
  1013. reg = <2>;
  1014. compatible = "sandbox,usb-flash";
  1015. sandbox,filepath = "testflash2.bin";
  1016. };
  1017. keyb@3 {
  1018. reg = <3>;
  1019. compatible = "sandbox,usb-keyb";
  1020. };
  1021. };
  1022. usbstor@1 {
  1023. reg = <1>;
  1024. };
  1025. usbstor@3 {
  1026. reg = <3>;
  1027. };
  1028. };
  1029. };
  1030. usb_2: usb@2 {
  1031. compatible = "sandbox,usb";
  1032. status = "disabled";
  1033. };
  1034. spmi: spmi@0 {
  1035. compatible = "sandbox,spmi";
  1036. #address-cells = <0x1>;
  1037. #size-cells = <0x1>;
  1038. ranges;
  1039. pm8916@0 {
  1040. compatible = "qcom,spmi-pmic";
  1041. reg = <0x0 0x1>;
  1042. #address-cells = <0x1>;
  1043. #size-cells = <0x1>;
  1044. ranges;
  1045. spmi_gpios: gpios@c000 {
  1046. compatible = "qcom,pm8916-gpio";
  1047. reg = <0xc000 0x400>;
  1048. gpio-controller;
  1049. gpio-count = <4>;
  1050. #gpio-cells = <2>;
  1051. gpio-bank-name="spmi";
  1052. };
  1053. };
  1054. };
  1055. wdt0: wdt@0 {
  1056. compatible = "sandbox,wdt";
  1057. };
  1058. axi: axi@0 {
  1059. compatible = "sandbox,axi";
  1060. #address-cells = <0x1>;
  1061. #size-cells = <0x1>;
  1062. store@0 {
  1063. compatible = "sandbox,sandbox_store";
  1064. reg = <0x0 0x400>;
  1065. };
  1066. };
  1067. chosen {
  1068. #address-cells = <1>;
  1069. #size-cells = <1>;
  1070. setting = "sunrise ohoka";
  1071. other-node = "/some-bus/c-test@5";
  1072. int-values = <0x1937 72993>;
  1073. u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
  1074. chosen-test {
  1075. compatible = "denx,u-boot-fdt-test";
  1076. reg = <9 1>;
  1077. };
  1078. };
  1079. translation-test@8000 {
  1080. compatible = "simple-bus";
  1081. reg = <0x8000 0x4000>;
  1082. #address-cells = <0x2>;
  1083. #size-cells = <0x1>;
  1084. ranges = <0 0x0 0x8000 0x1000
  1085. 1 0x100 0x9000 0x1000
  1086. 2 0x200 0xA000 0x1000
  1087. 3 0x300 0xB000 0x1000
  1088. 4 0x400 0xC000 0x1000
  1089. >;
  1090. dma-ranges = <0 0x000 0x10000000 0x1000
  1091. 1 0x100 0x20000000 0x1000
  1092. >;
  1093. dev@0,0 {
  1094. compatible = "denx,u-boot-fdt-dummy";
  1095. reg = <0 0x0 0x1000>;
  1096. reg-names = "sandbox-dummy-0";
  1097. };
  1098. dev@1,100 {
  1099. compatible = "denx,u-boot-fdt-dummy";
  1100. reg = <1 0x100 0x1000>;
  1101. };
  1102. dev@2,200 {
  1103. compatible = "denx,u-boot-fdt-dummy";
  1104. reg = <2 0x200 0x1000>;
  1105. };
  1106. noxlatebus@3,300 {
  1107. compatible = "simple-bus";
  1108. reg = <3 0x300 0x1000>;
  1109. #address-cells = <0x1>;
  1110. #size-cells = <0x0>;
  1111. dev@42 {
  1112. compatible = "denx,u-boot-fdt-dummy";
  1113. reg = <0x42>;
  1114. };
  1115. };
  1116. xlatebus@4,400 {
  1117. compatible = "sandbox,zero-size-cells-bus";
  1118. reg = <4 0x400 0x1000>;
  1119. #address-cells = <1>;
  1120. #size-cells = <1>;
  1121. ranges = <0 4 0x400 0x1000>;
  1122. devs {
  1123. #address-cells = <1>;
  1124. #size-cells = <0>;
  1125. dev@19 {
  1126. compatible = "denx,u-boot-fdt-dummy";
  1127. reg = <0x19>;
  1128. };
  1129. };
  1130. };
  1131. };
  1132. osd {
  1133. compatible = "sandbox,sandbox_osd";
  1134. };
  1135. sandbox_tee {
  1136. compatible = "sandbox,tee";
  1137. };
  1138. sandbox_virtio1 {
  1139. compatible = "sandbox,virtio1";
  1140. };
  1141. sandbox_virtio2 {
  1142. compatible = "sandbox,virtio2";
  1143. };
  1144. sandbox_scmi {
  1145. compatible = "sandbox,scmi-devices";
  1146. clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>;
  1147. resets = <&reset_scmi0 3>;
  1148. regul0-supply = <&regul0_scmi0>;
  1149. regul1-supply = <&regul1_scmi0>;
  1150. };
  1151. pinctrl {
  1152. compatible = "sandbox,pinctrl";
  1153. pinctrl-names = "default", "alternate";
  1154. pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
  1155. pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
  1156. pinctrl_gpios: gpios {
  1157. gpio0 {
  1158. pins = "P5";
  1159. function = "GPIO";
  1160. bias-pull-up;
  1161. input-disable;
  1162. };
  1163. gpio1 {
  1164. pins = "P6";
  1165. function = "GPIO";
  1166. output-high;
  1167. drive-open-drain;
  1168. };
  1169. gpio2 {
  1170. pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
  1171. bias-pull-down;
  1172. input-enable;
  1173. };
  1174. gpio3 {
  1175. pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
  1176. bias-disable;
  1177. };
  1178. };
  1179. pinctrl_i2c: i2c {
  1180. groups {
  1181. groups = "I2C_UART";
  1182. function = "I2C";
  1183. };
  1184. pins {
  1185. pins = "P0", "P1";
  1186. drive-open-drain;
  1187. };
  1188. };
  1189. pinctrl_i2s: i2s {
  1190. groups = "SPI_I2S";
  1191. function = "I2S";
  1192. };
  1193. pinctrl_spi: spi {
  1194. groups = "SPI_I2S";
  1195. function = "SPI";
  1196. cs {
  1197. pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
  1198. <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
  1199. };
  1200. };
  1201. };
  1202. hwspinlock@0 {
  1203. compatible = "sandbox,hwspinlock";
  1204. };
  1205. dma: dma {
  1206. compatible = "sandbox,dma";
  1207. #dma-cells = <1>;
  1208. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  1209. dma-names = "m2m", "tx0", "rx0";
  1210. };
  1211. /*
  1212. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  1213. * end of the test. If parent mdio is removed first, clean-up of the
  1214. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  1215. * active at the end of the test. That it turn doesn't allow the mdio
  1216. * class to be destroyed, triggering an error.
  1217. */
  1218. mdio-mux-test {
  1219. compatible = "sandbox,mdio-mux";
  1220. #address-cells = <1>;
  1221. #size-cells = <0>;
  1222. mdio-parent-bus = <&mdio>;
  1223. mdio-ch-test@0 {
  1224. reg = <0>;
  1225. };
  1226. mdio-ch-test@1 {
  1227. reg = <1>;
  1228. };
  1229. };
  1230. mdio: mdio-test {
  1231. compatible = "sandbox,mdio";
  1232. };
  1233. pm-bus-test {
  1234. compatible = "simple-pm-bus";
  1235. clocks = <&clk_sandbox 4>;
  1236. power-domains = <&pwrdom 1>;
  1237. };
  1238. resetc2: syscon-reset {
  1239. compatible = "syscon-reset";
  1240. #reset-cells = <1>;
  1241. regmap = <&syscon0>;
  1242. offset = <1>;
  1243. mask = <0x27FFFFFF>;
  1244. assert-high = <0>;
  1245. };
  1246. syscon-reset-test {
  1247. compatible = "sandbox,misc_sandbox";
  1248. resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
  1249. reset-names = "valid", "no_mask", "out_of_range";
  1250. };
  1251. sysinfo {
  1252. compatible = "sandbox,sysinfo-sandbox";
  1253. };
  1254. some_regmapped-bus {
  1255. #address-cells = <0x1>;
  1256. #size-cells = <0x1>;
  1257. ranges = <0x0 0x0 0x10>;
  1258. compatible = "simple-bus";
  1259. regmap-test_0 {
  1260. reg = <0 0x10>;
  1261. compatible = "sandbox,regmap_test";
  1262. };
  1263. };
  1264. };
  1265. #include "sandbox_pmic.dtsi"
  1266. #include "cros-ec-keyboard.dtsi"