rockchip_timer.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
  4. */
  5. #include <common.h>
  6. #include <bootstage.h>
  7. #include <dm.h>
  8. #include <dm/ofnode.h>
  9. #include <mapmem.h>
  10. #include <asm/arch-rockchip/timer.h>
  11. #include <dt-structs.h>
  12. #include <timer.h>
  13. #include <asm/io.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  16. struct rockchip_timer_plat {
  17. struct dtd_rockchip_rk3368_timer dtd;
  18. };
  19. #endif
  20. /* Driver private data. Contains timer id. Could be either 0 or 1. */
  21. struct rockchip_timer_priv {
  22. struct rk_timer *timer;
  23. };
  24. static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)
  25. {
  26. uint64_t timebase_h, timebase_l;
  27. uint64_t cntr;
  28. timebase_l = readl(&timer->timer_curr_value0);
  29. timebase_h = readl(&timer->timer_curr_value1);
  30. cntr = timebase_h << 32 | timebase_l;
  31. return cntr;
  32. }
  33. #if CONFIG_IS_ENABLED(BOOTSTAGE)
  34. ulong timer_get_boot_us(void)
  35. {
  36. uint64_t ticks = 0;
  37. uint32_t rate;
  38. uint64_t us;
  39. int ret;
  40. ret = dm_timer_init();
  41. if (!ret) {
  42. /* The timer is available */
  43. rate = timer_get_rate(gd->timer);
  44. timer_get_count(gd->timer, &ticks);
  45. #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  46. } else if (ret == -EAGAIN) {
  47. /* We have been called so early that the DM is not ready,... */
  48. ofnode node = offset_to_ofnode(-1);
  49. struct rk_timer *timer = NULL;
  50. /*
  51. * ... so we try to access the raw timer, if it is specified
  52. * via the tick-timer property in /chosen.
  53. */
  54. node = ofnode_get_chosen_node("tick-timer");
  55. if (!ofnode_valid(node)) {
  56. debug("%s: no /chosen/tick-timer\n", __func__);
  57. return 0;
  58. }
  59. timer = (struct rk_timer *)ofnode_get_addr(node);
  60. /* This timer is down-counting */
  61. ticks = ~0uLL - rockchip_timer_get_curr_value(timer);
  62. if (ofnode_read_u32(node, "clock-frequency", &rate)) {
  63. debug("%s: could not read clock-frequency\n", __func__);
  64. return 0;
  65. }
  66. #endif
  67. } else {
  68. return 0;
  69. }
  70. us = (ticks * 1000) / rate;
  71. return us;
  72. }
  73. #endif
  74. static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
  75. {
  76. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  77. uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
  78. /* timers are down-counting */
  79. *count = ~0ull - cntr;
  80. return 0;
  81. }
  82. static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
  83. {
  84. #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  85. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  86. priv->timer = dev_read_addr_ptr(dev);
  87. if (!priv->timer)
  88. return -ENOENT;
  89. #endif
  90. return 0;
  91. }
  92. static int rockchip_timer_start(struct udevice *dev)
  93. {
  94. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  95. const uint64_t reload_val = ~0uLL;
  96. const uint32_t reload_val_l = reload_val & 0xffffffff;
  97. const uint32_t reload_val_h = reload_val >> 32;
  98. /* don't reinit, if the timer is already running and set up */
  99. if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&
  100. (readl(&priv->timer->timer_load_count0) == reload_val_l) &&
  101. (readl(&priv->timer->timer_load_count1) == reload_val_h))
  102. return 0;
  103. /* disable timer and reset all control */
  104. writel(0, &priv->timer->timer_ctrl_reg);
  105. /* write reload value */
  106. writel(reload_val_l, &priv->timer->timer_load_count0);
  107. writel(reload_val_h, &priv->timer->timer_load_count1);
  108. /* enable timer */
  109. writel(1, &priv->timer->timer_ctrl_reg);
  110. return 0;
  111. }
  112. static int rockchip_timer_probe(struct udevice *dev)
  113. {
  114. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  115. struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  116. struct rockchip_timer_priv *priv = dev_get_priv(dev);
  117. struct rockchip_timer_plat *plat = dev_get_platdata(dev);
  118. priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
  119. uc_priv->clock_rate = plat->dtd.clock_frequency;
  120. #endif
  121. return rockchip_timer_start(dev);
  122. }
  123. static const struct timer_ops rockchip_timer_ops = {
  124. .get_count = rockchip_timer_get_count,
  125. };
  126. static const struct udevice_id rockchip_timer_ids[] = {
  127. { .compatible = "rockchip,rk3188-timer" },
  128. { .compatible = "rockchip,rk3288-timer" },
  129. { .compatible = "rockchip,rk3368-timer" },
  130. {}
  131. };
  132. U_BOOT_DRIVER(rockchip_rk3368_timer) = {
  133. .name = "rockchip_rk3368_timer",
  134. .id = UCLASS_TIMER,
  135. .of_match = rockchip_timer_ids,
  136. .probe = rockchip_timer_probe,
  137. .ops = &rockchip_timer_ops,
  138. .priv_auto_alloc_size = sizeof(struct rockchip_timer_priv),
  139. #if CONFIG_IS_ENABLED(OF_PLATDATA)
  140. .platdata_auto_alloc_size = sizeof(struct rockchip_timer_plat),
  141. #endif
  142. .ofdata_to_platdata = rockchip_clk_ofdata_to_platdata,
  143. };