pci_rom.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2014 Google, Inc
  4. *
  5. * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
  6. *
  7. * Modifications are:
  8. * Copyright (C) 2003-2004 Linux Networx
  9. * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
  10. * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
  11. * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
  12. * Copyright (C) 2005-2006 Tyan
  13. * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
  14. * Copyright (C) 2005-2009 coresystems GmbH
  15. * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
  16. *
  17. * PCI Bus Services, see include/linux/pci.h for further explanation.
  18. *
  19. * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
  20. * David Mosberger-Tang
  21. *
  22. * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
  23. */
  24. #include <common.h>
  25. #include <bios_emul.h>
  26. #include <bootstage.h>
  27. #include <dm.h>
  28. #include <errno.h>
  29. #include <init.h>
  30. #include <malloc.h>
  31. #include <pci.h>
  32. #include <pci_rom.h>
  33. #include <vbe.h>
  34. #include <video.h>
  35. #include <video_fb.h>
  36. #include <acpi/acpi_s3.h>
  37. #include <linux/screen_info.h>
  38. DECLARE_GLOBAL_DATA_PTR;
  39. __weak bool board_should_run_oprom(struct udevice *dev)
  40. {
  41. #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
  42. if (gd->arch.prev_sleep_state == ACPI_S3) {
  43. if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
  44. return true;
  45. else
  46. return false;
  47. }
  48. #endif
  49. return true;
  50. }
  51. __weak bool board_should_load_oprom(struct udevice *dev)
  52. {
  53. return true;
  54. }
  55. __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
  56. {
  57. return vendev;
  58. }
  59. static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
  60. {
  61. struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
  62. struct pci_rom_header *rom_header;
  63. struct pci_rom_data *rom_data;
  64. u16 rom_vendor, rom_device;
  65. u32 rom_class;
  66. u32 vendev;
  67. u32 mapped_vendev;
  68. u32 rom_address;
  69. vendev = pplat->vendor << 16 | pplat->device;
  70. mapped_vendev = board_map_oprom_vendev(vendev);
  71. if (vendev != mapped_vendev)
  72. debug("Device ID mapped to %#08x\n", mapped_vendev);
  73. #ifdef CONFIG_VGA_BIOS_ADDR
  74. rom_address = CONFIG_VGA_BIOS_ADDR;
  75. #else
  76. dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
  77. if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
  78. debug("%s: rom_address=%x\n", __func__, rom_address);
  79. return -ENOENT;
  80. }
  81. /* Enable expansion ROM address decoding. */
  82. dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
  83. rom_address | PCI_ROM_ADDRESS_ENABLE);
  84. #endif
  85. debug("Option ROM address %x\n", rom_address);
  86. rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
  87. debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
  88. le16_to_cpu(rom_header->signature),
  89. rom_header->size * 512, le16_to_cpu(rom_header->data));
  90. if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
  91. printf("Incorrect expansion ROM header signature %04x\n",
  92. le16_to_cpu(rom_header->signature));
  93. #ifndef CONFIG_VGA_BIOS_ADDR
  94. /* Disable expansion ROM address decoding */
  95. dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
  96. #endif
  97. return -EINVAL;
  98. }
  99. rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
  100. rom_vendor = le16_to_cpu(rom_data->vendor);
  101. rom_device = le16_to_cpu(rom_data->device);
  102. debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
  103. rom_vendor, rom_device);
  104. /* If the device id is mapped, a mismatch is expected */
  105. if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
  106. (vendev == mapped_vendev)) {
  107. printf("ID mismatch: vendor ID %04x, device ID %04x\n",
  108. rom_vendor, rom_device);
  109. /* Continue anyway */
  110. }
  111. rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
  112. debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
  113. rom_class, rom_data->type);
  114. if (pplat->class != rom_class) {
  115. debug("Class Code mismatch ROM %06x, dev %06x\n",
  116. rom_class, pplat->class);
  117. }
  118. *hdrp = rom_header;
  119. return 0;
  120. }
  121. /**
  122. * pci_rom_load() - Load a ROM image and return a pointer to it
  123. *
  124. * @rom_header: Pointer to ROM image
  125. * @ram_headerp: Returns a pointer to the image in RAM
  126. * @allocedp: Returns true if @ram_headerp was allocated and needs
  127. * to be freed
  128. * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
  129. * the error state. Even if this function returns an error, it may have
  130. * allocated memory.
  131. */
  132. static int pci_rom_load(struct pci_rom_header *rom_header,
  133. struct pci_rom_header **ram_headerp, bool *allocedp)
  134. {
  135. struct pci_rom_data *rom_data;
  136. unsigned int rom_size;
  137. unsigned int image_size = 0;
  138. void *target;
  139. *allocedp = false;
  140. do {
  141. /* Get next image, until we see an x86 version */
  142. rom_header = (struct pci_rom_header *)((void *)rom_header +
  143. image_size);
  144. rom_data = (struct pci_rom_data *)((void *)rom_header +
  145. le16_to_cpu(rom_header->data));
  146. image_size = le16_to_cpu(rom_data->ilen) * 512;
  147. } while ((rom_data->type != 0) && (rom_data->indicator == 0));
  148. if (rom_data->type != 0)
  149. return -EACCES;
  150. rom_size = rom_header->size * 512;
  151. #ifdef PCI_VGA_RAM_IMAGE_START
  152. target = (void *)PCI_VGA_RAM_IMAGE_START;
  153. #else
  154. target = (void *)malloc(rom_size);
  155. if (!target)
  156. return -ENOMEM;
  157. *allocedp = true;
  158. #endif
  159. if (target != rom_header) {
  160. ulong start = get_timer(0);
  161. debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
  162. rom_header, target, rom_size);
  163. memcpy(target, rom_header, rom_size);
  164. if (memcmp(target, rom_header, rom_size)) {
  165. printf("VGA ROM copy failed\n");
  166. return -EFAULT;
  167. }
  168. debug("Copy took %lums\n", get_timer(start));
  169. }
  170. *ram_headerp = target;
  171. return 0;
  172. }
  173. struct vbe_mode_info mode_info;
  174. void setup_video(struct screen_info *screen_info)
  175. {
  176. struct vesa_mode_info *vesa = &mode_info.vesa;
  177. /* Sanity test on VESA parameters */
  178. if (!vesa->x_resolution || !vesa->y_resolution)
  179. return;
  180. screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
  181. screen_info->lfb_width = vesa->x_resolution;
  182. screen_info->lfb_height = vesa->y_resolution;
  183. screen_info->lfb_depth = vesa->bits_per_pixel;
  184. screen_info->lfb_linelength = vesa->bytes_per_scanline;
  185. screen_info->lfb_base = vesa->phys_base_ptr;
  186. screen_info->lfb_size =
  187. ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
  188. 65536);
  189. screen_info->lfb_size >>= 16;
  190. screen_info->red_size = vesa->red_mask_size;
  191. screen_info->red_pos = vesa->red_mask_pos;
  192. screen_info->green_size = vesa->green_mask_size;
  193. screen_info->green_pos = vesa->green_mask_pos;
  194. screen_info->blue_size = vesa->blue_mask_size;
  195. screen_info->blue_pos = vesa->blue_mask_pos;
  196. screen_info->rsvd_size = vesa->reserved_mask_size;
  197. screen_info->rsvd_pos = vesa->reserved_mask_pos;
  198. }
  199. int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
  200. int exec_method)
  201. {
  202. struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
  203. struct pci_rom_header *rom = NULL, *ram = NULL;
  204. int vesa_mode = -1;
  205. bool emulate, alloced;
  206. int ret;
  207. /* Only execute VGA ROMs */
  208. if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
  209. debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
  210. PCI_CLASS_DISPLAY_VGA);
  211. return -ENODEV;
  212. }
  213. if (!board_should_load_oprom(dev))
  214. return log_msg_ret("Should not load OPROM", -ENXIO);
  215. ret = pci_rom_probe(dev, &rom);
  216. if (ret)
  217. return ret;
  218. ret = pci_rom_load(rom, &ram, &alloced);
  219. if (ret)
  220. goto err;
  221. if (!board_should_run_oprom(dev)) {
  222. ret = -ENXIO;
  223. goto err;
  224. }
  225. #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
  226. defined(CONFIG_FRAMEBUFFER_VESA_MODE)
  227. vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
  228. #endif
  229. debug("Selected vesa mode %#x\n", vesa_mode);
  230. if (exec_method & PCI_ROM_USE_NATIVE) {
  231. #ifdef CONFIG_X86
  232. emulate = false;
  233. #else
  234. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  235. printf("BIOS native execution is only available on x86\n");
  236. ret = -ENOSYS;
  237. goto err;
  238. }
  239. emulate = true;
  240. #endif
  241. } else {
  242. #ifdef CONFIG_BIOSEMU
  243. emulate = true;
  244. #else
  245. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  246. printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
  247. ret = -ENOSYS;
  248. goto err;
  249. }
  250. emulate = false;
  251. #endif
  252. }
  253. if (emulate) {
  254. #ifdef CONFIG_BIOSEMU
  255. BE_VGAInfo *info;
  256. ret = biosemu_setup(dev, &info);
  257. if (ret)
  258. goto err;
  259. biosemu_set_interrupt_handler(0x15, int15_handler);
  260. ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
  261. true, vesa_mode, &mode_info);
  262. if (ret)
  263. goto err;
  264. #endif
  265. } else {
  266. #if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
  267. bios_set_interrupt_handler(0x15, int15_handler);
  268. bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
  269. &mode_info);
  270. #endif
  271. }
  272. debug("Final vesa mode %#x\n", mode_info.video_mode);
  273. ret = 0;
  274. err:
  275. if (alloced)
  276. free(ram);
  277. return ret;
  278. }
  279. #ifdef CONFIG_DM_VIDEO
  280. int vbe_setup_video_priv(struct vesa_mode_info *vesa,
  281. struct video_priv *uc_priv,
  282. struct video_uc_platdata *plat)
  283. {
  284. if (!vesa->x_resolution)
  285. return log_msg_ret("No x resolution", -ENXIO);
  286. uc_priv->xsize = vesa->x_resolution;
  287. uc_priv->ysize = vesa->y_resolution;
  288. uc_priv->line_length = vesa->bytes_per_scanline;
  289. switch (vesa->bits_per_pixel) {
  290. case 32:
  291. case 24:
  292. uc_priv->bpix = VIDEO_BPP32;
  293. break;
  294. case 16:
  295. uc_priv->bpix = VIDEO_BPP16;
  296. break;
  297. default:
  298. return -EPROTONOSUPPORT;
  299. }
  300. plat->base = vesa->phys_base_ptr;
  301. plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
  302. return 0;
  303. }
  304. int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))
  305. {
  306. struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
  307. struct video_priv *uc_priv = dev_get_uclass_priv(dev);
  308. int ret;
  309. /* If we are running from EFI or coreboot, this can't work */
  310. if (!ll_boot_init()) {
  311. printf("Not available (previous bootloader prevents it)\n");
  312. return -EPERM;
  313. }
  314. bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
  315. ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
  316. PCI_ROM_ALLOW_FALLBACK);
  317. bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
  318. if (ret) {
  319. debug("failed to run video BIOS: %d\n", ret);
  320. return ret;
  321. }
  322. ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat);
  323. if (ret) {
  324. debug("No video mode configured\n");
  325. return ret;
  326. }
  327. printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
  328. mode_info.vesa.bits_per_pixel);
  329. return 0;
  330. }
  331. #endif