board_f.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <bootstage.h>
  14. #include <clock_legacy.h>
  15. #include <console.h>
  16. #include <cpu.h>
  17. #include <cpu_func.h>
  18. #include <dm.h>
  19. #include <env.h>
  20. #include <env_internal.h>
  21. #include <fdtdec.h>
  22. #include <fs.h>
  23. #include <hang.h>
  24. #include <i2c.h>
  25. #include <init.h>
  26. #include <initcall.h>
  27. #include <lcd.h>
  28. #include <malloc.h>
  29. #include <mapmem.h>
  30. #include <os.h>
  31. #include <post.h>
  32. #include <relocate.h>
  33. #include <serial.h>
  34. #ifdef CONFIG_SPL
  35. #include <spl.h>
  36. #endif
  37. #include <status_led.h>
  38. #include <sysreset.h>
  39. #include <timer.h>
  40. #include <trace.h>
  41. #include <video.h>
  42. #include <watchdog.h>
  43. #include <asm/cache.h>
  44. #ifdef CONFIG_MACH_TYPE
  45. #include <asm/mach-types.h>
  46. #endif
  47. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  48. #include <asm/mp.h>
  49. #endif
  50. #include <asm/io.h>
  51. #include <asm/sections.h>
  52. #include <dm/root.h>
  53. #include <linux/errno.h>
  54. /*
  55. * Pointer to initial global data area
  56. *
  57. * Here we initialize it if needed.
  58. */
  59. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  60. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  61. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  62. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  63. #else
  64. DECLARE_GLOBAL_DATA_PTR;
  65. #endif
  66. /*
  67. * TODO(sjg@chromium.org): IMO this code should be
  68. * refactored to a single function, something like:
  69. *
  70. * void led_set_state(enum led_colour_t colour, int on);
  71. */
  72. /************************************************************************
  73. * Coloured LED functionality
  74. ************************************************************************
  75. * May be supplied by boards if desired
  76. */
  77. __weak void coloured_LED_init(void) {}
  78. __weak void red_led_on(void) {}
  79. __weak void red_led_off(void) {}
  80. __weak void green_led_on(void) {}
  81. __weak void green_led_off(void) {}
  82. __weak void yellow_led_on(void) {}
  83. __weak void yellow_led_off(void) {}
  84. __weak void blue_led_on(void) {}
  85. __weak void blue_led_off(void) {}
  86. /*
  87. * Why is gd allocated a register? Prior to reloc it might be better to
  88. * just pass it around to each function in this file?
  89. *
  90. * After reloc one could argue that it is hardly used and doesn't need
  91. * to be in a register. Or if it is it should perhaps hold pointers to all
  92. * global data for all modules, so that post-reloc we can avoid the massive
  93. * literal pool we get on ARM. Or perhaps just encourage each module to use
  94. * a structure...
  95. */
  96. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  97. static int init_func_watchdog_init(void)
  98. {
  99. # if defined(CONFIG_HW_WATCHDOG) && \
  100. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  101. defined(CONFIG_SH) || \
  102. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  103. defined(CONFIG_IMX_WATCHDOG))
  104. hw_watchdog_init();
  105. puts(" Watchdog enabled\n");
  106. # endif
  107. WATCHDOG_RESET();
  108. return 0;
  109. }
  110. int init_func_watchdog_reset(void)
  111. {
  112. WATCHDOG_RESET();
  113. return 0;
  114. }
  115. #endif /* CONFIG_WATCHDOG */
  116. __weak void board_add_ram_info(int use_default)
  117. {
  118. /* please define platform specific board_add_ram_info() */
  119. }
  120. static int init_baud_rate(void)
  121. {
  122. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  123. return 0;
  124. }
  125. static int display_text_info(void)
  126. {
  127. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  128. ulong bss_start, bss_end, text_base;
  129. bss_start = (ulong)&__bss_start;
  130. bss_end = (ulong)&__bss_end;
  131. #ifdef CONFIG_SYS_TEXT_BASE
  132. text_base = CONFIG_SYS_TEXT_BASE;
  133. #else
  134. text_base = CONFIG_SYS_MONITOR_BASE;
  135. #endif
  136. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  137. text_base, bss_start, bss_end);
  138. #endif
  139. return 0;
  140. }
  141. #ifdef CONFIG_SYSRESET
  142. static int print_resetinfo(void)
  143. {
  144. struct udevice *dev;
  145. char status[256];
  146. int ret;
  147. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  148. if (ret) {
  149. debug("%s: No sysreset device found (error: %d)\n",
  150. __func__, ret);
  151. /* Not all boards have sysreset drivers available during early
  152. * boot, so don't fail if one can't be found.
  153. */
  154. return 0;
  155. }
  156. if (!sysreset_get_status(dev, status, sizeof(status)))
  157. printf("%s", status);
  158. return 0;
  159. }
  160. #endif
  161. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  162. static int print_cpuinfo(void)
  163. {
  164. struct udevice *dev;
  165. char desc[512];
  166. int ret;
  167. dev = cpu_get_current_dev();
  168. if (!dev) {
  169. debug("%s: Could not get CPU device\n",
  170. __func__);
  171. return -ENODEV;
  172. }
  173. ret = cpu_get_desc(dev, desc, sizeof(desc));
  174. if (ret) {
  175. debug("%s: Could not get CPU description (err = %d)\n",
  176. dev->name, ret);
  177. return ret;
  178. }
  179. printf("CPU: %s\n", desc);
  180. return 0;
  181. }
  182. #endif
  183. static int announce_dram_init(void)
  184. {
  185. puts("DRAM: ");
  186. return 0;
  187. }
  188. static int show_dram_config(void)
  189. {
  190. unsigned long long size;
  191. #ifdef CONFIG_NR_DRAM_BANKS
  192. int i;
  193. debug("\nRAM Configuration:\n");
  194. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  195. size += gd->bd->bi_dram[i].size;
  196. debug("Bank #%d: %llx ", i,
  197. (unsigned long long)(gd->bd->bi_dram[i].start));
  198. #ifdef DEBUG
  199. print_size(gd->bd->bi_dram[i].size, "\n");
  200. #endif
  201. }
  202. debug("\nDRAM: ");
  203. #else
  204. size = gd->ram_size;
  205. #endif
  206. print_size(size, "");
  207. board_add_ram_info(0);
  208. putc('\n');
  209. return 0;
  210. }
  211. __weak int dram_init_banksize(void)
  212. {
  213. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  214. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  215. gd->bd->bi_dram[0].size = get_effective_memsize();
  216. #endif
  217. return 0;
  218. }
  219. #if defined(CONFIG_SYS_I2C)
  220. static int init_func_i2c(void)
  221. {
  222. puts("I2C: ");
  223. #ifdef CONFIG_SYS_I2C
  224. i2c_init_all();
  225. #else
  226. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  227. #endif
  228. puts("ready\n");
  229. return 0;
  230. }
  231. #endif
  232. #if defined(CONFIG_VID)
  233. __weak int init_func_vid(void)
  234. {
  235. return 0;
  236. }
  237. #endif
  238. static int setup_mon_len(void)
  239. {
  240. #if defined(__ARM__) || defined(__MICROBLAZE__)
  241. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  242. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  243. gd->mon_len = (ulong)&_end - (ulong)_init;
  244. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  245. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  246. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  247. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  248. #elif defined(CONFIG_SYS_MONITOR_BASE)
  249. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  250. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  251. #endif
  252. return 0;
  253. }
  254. static int setup_spl_handoff(void)
  255. {
  256. #if CONFIG_IS_ENABLED(HANDOFF)
  257. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  258. sizeof(struct spl_handoff));
  259. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  260. #endif
  261. return 0;
  262. }
  263. __weak int arch_cpu_init(void)
  264. {
  265. return 0;
  266. }
  267. __weak int mach_cpu_init(void)
  268. {
  269. return 0;
  270. }
  271. /* Get the top of usable RAM */
  272. __weak ulong board_get_usable_ram_top(ulong total_size)
  273. {
  274. #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
  275. /*
  276. * Detect whether we have so much RAM that it goes past the end of our
  277. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  278. */
  279. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  280. /*
  281. * Will wrap back to top of 32-bit space when reservations
  282. * are made.
  283. */
  284. return 0;
  285. #endif
  286. return gd->ram_top;
  287. }
  288. static int setup_dest_addr(void)
  289. {
  290. debug("Monitor len: %08lX\n", gd->mon_len);
  291. /*
  292. * Ram is setup, size stored in gd !!
  293. */
  294. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  295. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  296. /*
  297. * Subtract specified amount of memory to hide so that it won't
  298. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  299. * the Linux kernel should now get passed the now "corrected"
  300. * memory size and won't touch it either. This should work
  301. * for arch/ppc and arch/powerpc. Only Linux board ports in
  302. * arch/powerpc with bootwrapper support, that recalculate the
  303. * memory size from the SDRAM controller setup will have to
  304. * get fixed.
  305. */
  306. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  307. #endif
  308. #ifdef CONFIG_SYS_SDRAM_BASE
  309. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  310. #endif
  311. gd->ram_top = gd->ram_base + get_effective_memsize();
  312. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  313. gd->relocaddr = gd->ram_top;
  314. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  315. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  316. /*
  317. * We need to make sure the location we intend to put secondary core
  318. * boot code is reserved and not used by any part of u-boot
  319. */
  320. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  321. gd->relocaddr = determine_mp_bootpg(NULL);
  322. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  323. }
  324. #endif
  325. return 0;
  326. }
  327. #ifdef CONFIG_PRAM
  328. /* reserve protected RAM */
  329. static int reserve_pram(void)
  330. {
  331. ulong reg;
  332. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  333. gd->relocaddr -= (reg << 10); /* size is in kB */
  334. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  335. gd->relocaddr);
  336. return 0;
  337. }
  338. #endif /* CONFIG_PRAM */
  339. /* Round memory pointer down to next 4 kB limit */
  340. static int reserve_round_4k(void)
  341. {
  342. gd->relocaddr &= ~(4096 - 1);
  343. return 0;
  344. }
  345. __weak int arch_reserve_mmu(void)
  346. {
  347. return 0;
  348. }
  349. static int reserve_video(void)
  350. {
  351. #ifdef CONFIG_DM_VIDEO
  352. ulong addr;
  353. int ret;
  354. addr = gd->relocaddr;
  355. ret = video_reserve(&addr);
  356. if (ret)
  357. return ret;
  358. gd->relocaddr = addr;
  359. #elif defined(CONFIG_LCD)
  360. # ifdef CONFIG_FB_ADDR
  361. gd->fb_base = CONFIG_FB_ADDR;
  362. # else
  363. /* reserve memory for LCD display (always full pages) */
  364. gd->relocaddr = lcd_setmem(gd->relocaddr);
  365. gd->fb_base = gd->relocaddr;
  366. # endif /* CONFIG_FB_ADDR */
  367. #endif
  368. return 0;
  369. }
  370. static int reserve_trace(void)
  371. {
  372. #ifdef CONFIG_TRACE
  373. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  374. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  375. debug("Reserving %luk for trace data at: %08lx\n",
  376. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  377. #endif
  378. return 0;
  379. }
  380. static int reserve_uboot(void)
  381. {
  382. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  383. /*
  384. * reserve memory for U-Boot code, data & bss
  385. * round down to next 4 kB limit
  386. */
  387. gd->relocaddr -= gd->mon_len;
  388. gd->relocaddr &= ~(4096 - 1);
  389. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  390. /* round down to next 64 kB limit so that IVPR stays aligned */
  391. gd->relocaddr &= ~(65536 - 1);
  392. #endif
  393. debug("Reserving %ldk for U-Boot at: %08lx\n",
  394. gd->mon_len >> 10, gd->relocaddr);
  395. }
  396. gd->start_addr_sp = gd->relocaddr;
  397. return 0;
  398. }
  399. /*
  400. * reserve after start_addr_sp the requested size and make the stack pointer
  401. * 16-byte aligned, this alignment is needed for cast on the reserved memory
  402. * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
  403. * = ARMv8 Instruction Set Overview: quad word, 16 bytes
  404. */
  405. static unsigned long reserve_stack_aligned(size_t size)
  406. {
  407. return ALIGN_DOWN(gd->start_addr_sp - size, 16);
  408. }
  409. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  410. static int reserve_noncached(void)
  411. {
  412. /*
  413. * The value of gd->start_addr_sp must match the value of malloc_start
  414. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  415. * board_r.c:mem_malloc_init() and then used by
  416. * cache.c:noncached_init()
  417. *
  418. * These calculations must match the code in cache.c:noncached_init()
  419. */
  420. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  421. MMU_SECTION_SIZE;
  422. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  423. MMU_SECTION_SIZE);
  424. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  425. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  426. return 0;
  427. }
  428. #endif
  429. /* reserve memory for malloc() area */
  430. static int reserve_malloc(void)
  431. {
  432. gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
  433. debug("Reserving %dk for malloc() at: %08lx\n",
  434. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  435. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  436. reserve_noncached();
  437. #endif
  438. return 0;
  439. }
  440. /* (permanently) allocate a Board Info struct */
  441. static int reserve_board(void)
  442. {
  443. if (!gd->bd) {
  444. gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t));
  445. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  446. memset(gd->bd, '\0', sizeof(bd_t));
  447. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  448. sizeof(bd_t), gd->start_addr_sp);
  449. }
  450. return 0;
  451. }
  452. static int setup_machine(void)
  453. {
  454. #ifdef CONFIG_MACH_TYPE
  455. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  456. #endif
  457. return 0;
  458. }
  459. static int reserve_global_data(void)
  460. {
  461. gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
  462. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  463. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  464. sizeof(gd_t), gd->start_addr_sp);
  465. return 0;
  466. }
  467. static int reserve_fdt(void)
  468. {
  469. #ifndef CONFIG_OF_EMBED
  470. /*
  471. * If the device tree is sitting immediately above our image then we
  472. * must relocate it. If it is embedded in the data section, then it
  473. * will be relocated with other data.
  474. */
  475. if (gd->fdt_blob) {
  476. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  477. gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
  478. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  479. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  480. gd->fdt_size, gd->start_addr_sp);
  481. }
  482. #endif
  483. return 0;
  484. }
  485. static int reserve_bootstage(void)
  486. {
  487. #ifdef CONFIG_BOOTSTAGE
  488. int size = bootstage_get_size();
  489. gd->start_addr_sp = reserve_stack_aligned(size);
  490. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  491. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  492. gd->start_addr_sp);
  493. #endif
  494. return 0;
  495. }
  496. __weak int arch_reserve_stacks(void)
  497. {
  498. return 0;
  499. }
  500. static int reserve_stacks(void)
  501. {
  502. /* make stack pointer 16-byte aligned */
  503. gd->start_addr_sp = reserve_stack_aligned(16);
  504. /*
  505. * let the architecture-specific code tailor gd->start_addr_sp and
  506. * gd->irq_sp
  507. */
  508. return arch_reserve_stacks();
  509. }
  510. static int reserve_bloblist(void)
  511. {
  512. #ifdef CONFIG_BLOBLIST
  513. gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE);
  514. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  515. #endif
  516. return 0;
  517. }
  518. static int display_new_sp(void)
  519. {
  520. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  521. return 0;
  522. }
  523. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  524. defined(CONFIG_SH)
  525. static int setup_board_part1(void)
  526. {
  527. bd_t *bd = gd->bd;
  528. /*
  529. * Save local variables to board info struct
  530. */
  531. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  532. bd->bi_memsize = gd->ram_size; /* size in bytes */
  533. #ifdef CONFIG_SYS_SRAM_BASE
  534. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  535. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  536. #endif
  537. #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  538. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  539. #endif
  540. #if defined(CONFIG_M68K)
  541. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  542. #endif
  543. #if defined(CONFIG_MPC83xx)
  544. bd->bi_immrbar = CONFIG_SYS_IMMR;
  545. #endif
  546. return 0;
  547. }
  548. #endif
  549. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  550. static int setup_board_part2(void)
  551. {
  552. bd_t *bd = gd->bd;
  553. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  554. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  555. #if defined(CONFIG_CPM2)
  556. bd->bi_cpmfreq = gd->arch.cpm_clk;
  557. bd->bi_brgfreq = gd->arch.brg_clk;
  558. bd->bi_sccfreq = gd->arch.scc_clk;
  559. bd->bi_vco = gd->arch.vco_out;
  560. #endif /* CONFIG_CPM2 */
  561. #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
  562. bd->bi_pcifreq = gd->pci_clk;
  563. #endif
  564. #if defined(CONFIG_EXTRA_CLOCK)
  565. bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
  566. bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
  567. bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
  568. #endif
  569. return 0;
  570. }
  571. #endif
  572. #ifdef CONFIG_POST
  573. static int init_post(void)
  574. {
  575. post_bootmode_init();
  576. post_run(NULL, POST_ROM | post_bootmode_get(0));
  577. return 0;
  578. }
  579. #endif
  580. static int reloc_fdt(void)
  581. {
  582. #ifndef CONFIG_OF_EMBED
  583. if (gd->flags & GD_FLG_SKIP_RELOC)
  584. return 0;
  585. if (gd->new_fdt) {
  586. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  587. gd->fdt_blob = gd->new_fdt;
  588. }
  589. #endif
  590. return 0;
  591. }
  592. static int reloc_bootstage(void)
  593. {
  594. #ifdef CONFIG_BOOTSTAGE
  595. if (gd->flags & GD_FLG_SKIP_RELOC)
  596. return 0;
  597. if (gd->new_bootstage) {
  598. int size = bootstage_get_size();
  599. debug("Copying bootstage from %p to %p, size %x\n",
  600. gd->bootstage, gd->new_bootstage, size);
  601. memcpy(gd->new_bootstage, gd->bootstage, size);
  602. gd->bootstage = gd->new_bootstage;
  603. bootstage_relocate();
  604. }
  605. #endif
  606. return 0;
  607. }
  608. static int reloc_bloblist(void)
  609. {
  610. #ifdef CONFIG_BLOBLIST
  611. if (gd->flags & GD_FLG_SKIP_RELOC)
  612. return 0;
  613. if (gd->new_bloblist) {
  614. int size = CONFIG_BLOBLIST_SIZE;
  615. debug("Copying bloblist from %p to %p, size %x\n",
  616. gd->bloblist, gd->new_bloblist, size);
  617. memcpy(gd->new_bloblist, gd->bloblist, size);
  618. gd->bloblist = gd->new_bloblist;
  619. }
  620. #endif
  621. return 0;
  622. }
  623. static int setup_reloc(void)
  624. {
  625. if (gd->flags & GD_FLG_SKIP_RELOC) {
  626. debug("Skipping relocation due to flag\n");
  627. return 0;
  628. }
  629. #ifdef CONFIG_SYS_TEXT_BASE
  630. #ifdef ARM
  631. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  632. #elif defined(CONFIG_M68K)
  633. /*
  634. * On all ColdFire arch cpu, monitor code starts always
  635. * just after the default vector table location, so at 0x400
  636. */
  637. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  638. #elif !defined(CONFIG_SANDBOX)
  639. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  640. #endif
  641. #endif
  642. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  643. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  644. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  645. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  646. gd->start_addr_sp);
  647. return 0;
  648. }
  649. #ifdef CONFIG_OF_BOARD_FIXUP
  650. static int fix_fdt(void)
  651. {
  652. return board_fix_fdt((void *)gd->fdt_blob);
  653. }
  654. #endif
  655. /* ARM calls relocate_code from its crt0.S */
  656. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  657. !CONFIG_IS_ENABLED(X86_64)
  658. static int jump_to_copy(void)
  659. {
  660. if (gd->flags & GD_FLG_SKIP_RELOC)
  661. return 0;
  662. /*
  663. * x86 is special, but in a nice way. It uses a trampoline which
  664. * enables the dcache if possible.
  665. *
  666. * For now, other archs use relocate_code(), which is implemented
  667. * similarly for all archs. When we do generic relocation, hopefully
  668. * we can make all archs enable the dcache prior to relocation.
  669. */
  670. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  671. /*
  672. * SDRAM and console are now initialised. The final stack can now
  673. * be setup in SDRAM. Code execution will continue in Flash, but
  674. * with the stack in SDRAM and Global Data in temporary memory
  675. * (CPU cache)
  676. */
  677. arch_setup_gd(gd->new_gd);
  678. board_init_f_r_trampoline(gd->start_addr_sp);
  679. #else
  680. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  681. #endif
  682. return 0;
  683. }
  684. #endif
  685. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  686. static int initf_bootstage(void)
  687. {
  688. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  689. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  690. int ret;
  691. ret = bootstage_init(!from_spl);
  692. if (ret)
  693. return ret;
  694. if (from_spl) {
  695. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  696. CONFIG_BOOTSTAGE_STASH_SIZE);
  697. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  698. if (ret && ret != -ENOENT) {
  699. debug("Failed to unstash bootstage: err=%d\n", ret);
  700. return ret;
  701. }
  702. }
  703. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  704. return 0;
  705. }
  706. static int initf_console_record(void)
  707. {
  708. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  709. return console_record_init();
  710. #else
  711. return 0;
  712. #endif
  713. }
  714. static int initf_dm(void)
  715. {
  716. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  717. int ret;
  718. bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
  719. ret = dm_init_and_scan(true);
  720. bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
  721. if (ret)
  722. return ret;
  723. #endif
  724. #ifdef CONFIG_TIMER_EARLY
  725. ret = dm_timer_init();
  726. if (ret)
  727. return ret;
  728. #endif
  729. return 0;
  730. }
  731. /* Architecture-specific memory reservation */
  732. __weak int reserve_arch(void)
  733. {
  734. return 0;
  735. }
  736. __weak int arch_cpu_init_dm(void)
  737. {
  738. return 0;
  739. }
  740. __weak int checkcpu(void)
  741. {
  742. return 0;
  743. }
  744. __weak int clear_bss(void)
  745. {
  746. return 0;
  747. }
  748. static const init_fnc_t init_sequence_f[] = {
  749. setup_mon_len,
  750. #ifdef CONFIG_OF_CONTROL
  751. fdtdec_setup,
  752. #endif
  753. #ifdef CONFIG_TRACE_EARLY
  754. trace_early_init,
  755. #endif
  756. initf_malloc,
  757. log_init,
  758. initf_bootstage, /* uses its own timer, so does not need DM */
  759. #ifdef CONFIG_BLOBLIST
  760. bloblist_init,
  761. #endif
  762. setup_spl_handoff,
  763. initf_console_record,
  764. #if defined(CONFIG_HAVE_FSP)
  765. arch_fsp_init,
  766. #endif
  767. arch_cpu_init, /* basic arch cpu dependent setup */
  768. mach_cpu_init, /* SoC/machine dependent CPU setup */
  769. initf_dm,
  770. arch_cpu_init_dm,
  771. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  772. board_early_init_f,
  773. #endif
  774. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  775. /* get CPU and bus clocks according to the environment variable */
  776. get_clocks, /* get CPU and bus clocks (etc.) */
  777. #endif
  778. #if !defined(CONFIG_M68K)
  779. timer_init, /* initialize timer */
  780. #endif
  781. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  782. board_postclk_init,
  783. #endif
  784. env_init, /* initialize environment */
  785. init_baud_rate, /* initialze baudrate settings */
  786. serial_init, /* serial communications setup */
  787. console_init_f, /* stage 1 init of console */
  788. display_options, /* say that we are here */
  789. display_text_info, /* show debugging info if required */
  790. checkcpu,
  791. #if defined(CONFIG_SYSRESET)
  792. print_resetinfo,
  793. #endif
  794. #if defined(CONFIG_DISPLAY_CPUINFO)
  795. print_cpuinfo, /* display cpu info (and speed) */
  796. #endif
  797. #if defined(CONFIG_DTB_RESELECT)
  798. embedded_dtb_select,
  799. #endif
  800. #if defined(CONFIG_DISPLAY_BOARDINFO)
  801. show_board_info,
  802. #endif
  803. INIT_FUNC_WATCHDOG_INIT
  804. #if defined(CONFIG_MISC_INIT_F)
  805. misc_init_f,
  806. #endif
  807. INIT_FUNC_WATCHDOG_RESET
  808. #if defined(CONFIG_SYS_I2C)
  809. init_func_i2c,
  810. #endif
  811. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  812. init_func_vid,
  813. #endif
  814. announce_dram_init,
  815. dram_init, /* configure available RAM banks */
  816. #ifdef CONFIG_POST
  817. post_init_f,
  818. #endif
  819. INIT_FUNC_WATCHDOG_RESET
  820. #if defined(CONFIG_SYS_DRAM_TEST)
  821. testdram,
  822. #endif /* CONFIG_SYS_DRAM_TEST */
  823. INIT_FUNC_WATCHDOG_RESET
  824. #ifdef CONFIG_POST
  825. init_post,
  826. #endif
  827. INIT_FUNC_WATCHDOG_RESET
  828. /*
  829. * Now that we have DRAM mapped and working, we can
  830. * relocate the code and continue running from DRAM.
  831. *
  832. * Reserve memory at end of RAM for (top down in that order):
  833. * - area that won't get touched by U-Boot and Linux (optional)
  834. * - kernel log buffer
  835. * - protected RAM
  836. * - LCD framebuffer
  837. * - monitor code
  838. * - board info struct
  839. */
  840. setup_dest_addr,
  841. #ifdef CONFIG_PRAM
  842. reserve_pram,
  843. #endif
  844. reserve_round_4k,
  845. arch_reserve_mmu,
  846. reserve_video,
  847. reserve_trace,
  848. reserve_uboot,
  849. reserve_malloc,
  850. reserve_board,
  851. setup_machine,
  852. reserve_global_data,
  853. reserve_fdt,
  854. reserve_bootstage,
  855. reserve_bloblist,
  856. reserve_arch,
  857. reserve_stacks,
  858. dram_init_banksize,
  859. show_dram_config,
  860. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  861. defined(CONFIG_SH)
  862. setup_board_part1,
  863. #endif
  864. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  865. INIT_FUNC_WATCHDOG_RESET
  866. setup_board_part2,
  867. #endif
  868. display_new_sp,
  869. #ifdef CONFIG_OF_BOARD_FIXUP
  870. fix_fdt,
  871. #endif
  872. INIT_FUNC_WATCHDOG_RESET
  873. reloc_fdt,
  874. reloc_bootstage,
  875. reloc_bloblist,
  876. setup_reloc,
  877. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  878. copy_uboot_to_ram,
  879. do_elf_reloc_fixups,
  880. #endif
  881. clear_bss,
  882. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  883. !CONFIG_IS_ENABLED(X86_64)
  884. jump_to_copy,
  885. #endif
  886. NULL,
  887. };
  888. void board_init_f(ulong boot_flags)
  889. {
  890. gd->flags = boot_flags;
  891. gd->have_console = 0;
  892. if (initcall_run_list(init_sequence_f))
  893. hang();
  894. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  895. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  896. !defined(CONFIG_ARC)
  897. /* NOTREACHED - jump_to_copy() does not return */
  898. hang();
  899. #endif
  900. }
  901. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  902. /*
  903. * For now this code is only used on x86.
  904. *
  905. * init_sequence_f_r is the list of init functions which are run when
  906. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  907. * The following limitations must be considered when implementing an
  908. * '_f_r' function:
  909. * - 'static' variables are read-only
  910. * - Global Data (gd->xxx) is read/write
  911. *
  912. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  913. * supported). It _should_, if possible, copy global data to RAM and
  914. * initialise the CPU caches (to speed up the relocation process)
  915. *
  916. * NOTE: At present only x86 uses this route, but it is intended that
  917. * all archs will move to this when generic relocation is implemented.
  918. */
  919. static const init_fnc_t init_sequence_f_r[] = {
  920. #if !CONFIG_IS_ENABLED(X86_64)
  921. init_cache_f_r,
  922. #endif
  923. NULL,
  924. };
  925. void board_init_f_r(void)
  926. {
  927. if (initcall_run_list(init_sequence_f_r))
  928. hang();
  929. /*
  930. * The pre-relocation drivers may be using memory that has now gone
  931. * away. Mark serial as unavailable - this will fall back to the debug
  932. * UART if available.
  933. *
  934. * Do the same with log drivers since the memory may not be available.
  935. */
  936. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  937. #ifdef CONFIG_TIMER
  938. gd->timer = NULL;
  939. #endif
  940. /*
  941. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  942. * Transfer execution from Flash to RAM by calculating the address
  943. * of the in-RAM copy of board_init_r() and calling it
  944. */
  945. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  946. /* NOTREACHED - board_init_r() does not return */
  947. hang();
  948. }
  949. #endif /* CONFIG_X86 */