dockstar.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
  4. *
  5. * Based on sheevaplug.c originally written by
  6. * Prafulla Wadaskar <prafulla@marvell.com>
  7. * (C) Copyright 2009
  8. * Marvell Semiconductor <www.marvell.com>
  9. */
  10. #include <common.h>
  11. #include <bootstage.h>
  12. #include <miiphy.h>
  13. #include <net.h>
  14. #include <asm/arch/soc.h>
  15. #include <asm/arch/mpp.h>
  16. #include <asm/arch/cpu.h>
  17. #include <asm/io.h>
  18. #include <asm/mach-types.h>
  19. #include "dockstar.h"
  20. DECLARE_GLOBAL_DATA_PTR;
  21. int board_early_init_f(void)
  22. {
  23. /*
  24. * default gpio configuration
  25. * There are maximum 64 gpios controlled through 2 sets of registers
  26. * the below configuration configures mainly initial LED status
  27. */
  28. mvebu_config_gpio(DOCKSTAR_OE_VAL_LOW,
  29. DOCKSTAR_OE_VAL_HIGH,
  30. DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
  31. /* Multi-Purpose Pins Functionality configuration */
  32. static const u32 kwmpp_config[] = {
  33. MPP0_NF_IO2,
  34. MPP1_NF_IO3,
  35. MPP2_NF_IO4,
  36. MPP3_NF_IO5,
  37. MPP4_NF_IO6,
  38. MPP5_NF_IO7,
  39. MPP6_SYSRST_OUTn,
  40. MPP7_GPO,
  41. MPP8_UART0_RTS,
  42. MPP9_UART0_CTS,
  43. MPP10_UART0_TXD,
  44. MPP11_UART0_RXD,
  45. MPP12_SD_CLK,
  46. MPP13_SD_CMD,
  47. MPP14_SD_D0,
  48. MPP15_SD_D1,
  49. MPP16_SD_D2,
  50. MPP17_SD_D3,
  51. MPP18_NF_IO0,
  52. MPP19_NF_IO1,
  53. MPP20_GPIO,
  54. MPP21_GPIO,
  55. MPP22_GPIO,
  56. MPP23_GPIO,
  57. MPP24_GPIO,
  58. MPP25_GPIO,
  59. MPP26_GPIO,
  60. MPP27_GPIO,
  61. MPP28_GPIO,
  62. MPP29_TSMP9,
  63. MPP30_GPIO,
  64. MPP31_GPIO,
  65. MPP32_GPIO,
  66. MPP33_GPIO,
  67. MPP34_GPIO,
  68. MPP35_GPIO,
  69. MPP36_GPIO,
  70. MPP37_GPIO,
  71. MPP38_GPIO,
  72. MPP39_GPIO,
  73. MPP40_GPIO,
  74. MPP41_GPIO,
  75. MPP42_GPIO,
  76. MPP43_GPIO,
  77. MPP44_GPIO,
  78. MPP45_GPIO,
  79. MPP46_GPIO,
  80. MPP47_GPIO,
  81. MPP48_GPIO,
  82. MPP49_GPIO,
  83. 0
  84. };
  85. kirkwood_mpp_conf(kwmpp_config, NULL);
  86. return 0;
  87. }
  88. int board_init(void)
  89. {
  90. /*
  91. * arch number of board
  92. */
  93. gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
  94. /* address of boot parameters */
  95. gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  96. return 0;
  97. }
  98. #ifdef CONFIG_RESET_PHY_R
  99. /* Configure and enable MV88E1116 PHY */
  100. void reset_phy(void)
  101. {
  102. u16 reg;
  103. u16 devadr;
  104. char *name = "egiga0";
  105. if (miiphy_set_current_dev(name))
  106. return;
  107. /* command to read PHY dev address */
  108. if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
  109. printf("Err..%s could not read PHY dev address\n",
  110. __FUNCTION__);
  111. return;
  112. }
  113. /*
  114. * Enable RGMII delay on Tx and Rx for CPU port
  115. * Ref: sec 4.7.2 of chip datasheet
  116. */
  117. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
  118. miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
  119. reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
  120. miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
  121. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
  122. /* reset the phy */
  123. miiphy_reset(name, devadr);
  124. printf("88E1116 Initialized on %s\n", name);
  125. }
  126. #endif /* CONFIG_RESET_PHY_R */
  127. #define GREEN_LED (1 << 14)
  128. #define ORANGE_LED (1 << 15)
  129. #define BOTH_LEDS (GREEN_LED | ORANGE_LED)
  130. #define NEITHER_LED 0
  131. static void set_leds(u32 leds, u32 blinking)
  132. {
  133. struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
  134. u32 oe = readl(&r->oe) | BOTH_LEDS;
  135. writel(oe & ~leds, &r->oe); /* active low */
  136. u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;
  137. writel(bl | blinking, &r->blink_en);
  138. }
  139. void show_boot_progress(int val)
  140. {
  141. switch (val) {
  142. case BOOTSTAGE_ID_RUN_OS: /* booting Linux */
  143. set_leds(BOTH_LEDS, NEITHER_LED);
  144. break;
  145. case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */
  146. set_leds(GREEN_LED, GREEN_LED);
  147. break;
  148. default:
  149. if (val < 0) /* error */
  150. set_leds(ORANGE_LED, ORANGE_LED);
  151. break;
  152. }
  153. }