fsp_meminit.c 2.5 KB

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  1. // SPDX-License-Identifier: Intel
  2. /*
  3. * Copyright (C) 2015-2016 Intel Corp.
  4. * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
  5. * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
  6. * Mostly taken from coreboot fsp2_0/memory_init.c
  7. */
  8. #include <common.h>
  9. #include <binman.h>
  10. #include <bootstage.h>
  11. #include <asm/mrccache.h>
  12. #include <asm/fsp/fsp_infoheader.h>
  13. #include <asm/fsp2/fsp_api.h>
  14. #include <asm/fsp2/fsp_internal.h>
  15. #include <asm/arch/fsp/fsp_configs.h>
  16. #include <asm/arch/fsp/fsp_m_upd.h>
  17. static int prepare_mrc_cache_type(enum mrc_type_t type,
  18. struct mrc_data_container **cachep)
  19. {
  20. struct mrc_data_container *cache;
  21. struct mrc_region entry;
  22. int ret;
  23. ret = mrccache_get_region(type, NULL, &entry);
  24. if (ret)
  25. return ret;
  26. cache = mrccache_find_current(&entry);
  27. if (!cache)
  28. return -ENOENT;
  29. log_debug("MRC at %x, size %x\n", (uint)cache->data, cache->data_size);
  30. *cachep = cache;
  31. return 0;
  32. }
  33. int prepare_mrc_cache(struct fspm_upd *upd)
  34. {
  35. struct mrc_data_container *cache;
  36. int ret;
  37. ret = prepare_mrc_cache_type(MRC_TYPE_NORMAL, &cache);
  38. if (ret)
  39. return log_msg_ret("Cannot get normal cache", ret);
  40. upd->arch.nvs_buffer_ptr = cache->data;
  41. ret = prepare_mrc_cache_type(MRC_TYPE_VAR, &cache);
  42. if (ret)
  43. return log_msg_ret("Cannot get var cache", ret);
  44. upd->config.variable_nvs_buffer_ptr = cache->data;
  45. return 0;
  46. }
  47. int fsp_memory_init(bool s3wake, bool use_spi_flash)
  48. {
  49. struct fspm_upd upd, *fsp_upd;
  50. fsp_memory_init_func func;
  51. struct binman_entry entry;
  52. struct fsp_header *hdr;
  53. struct hob_header *hob;
  54. struct udevice *dev;
  55. int ret;
  56. ret = fsp_locate_fsp(FSP_M, &entry, use_spi_flash, &dev, &hdr, NULL);
  57. if (ret)
  58. return log_msg_ret("locate FSP", ret);
  59. debug("Found FSP_M at %x, size %x\n", hdr->img_base, hdr->img_size);
  60. /* Copy over the default config */
  61. fsp_upd = (struct fspm_upd *)(hdr->img_base + hdr->cfg_region_off);
  62. if (fsp_upd->header.signature != FSPM_UPD_SIGNATURE)
  63. return log_msg_ret("Bad UPD signature", -EPERM);
  64. memcpy(&upd, fsp_upd, sizeof(upd));
  65. ret = fspm_update_config(dev, &upd);
  66. if (ret)
  67. return log_msg_ret("Could not setup config", ret);
  68. debug("SDRAM init...");
  69. bootstage_start(BOOTSTAGE_ID_ACCUM_FSP_M, "fsp-m");
  70. func = (fsp_memory_init_func)(hdr->img_base + hdr->fsp_mem_init);
  71. ret = func(&upd, &hob);
  72. bootstage_accum(BOOTSTAGE_ID_ACCUM_FSP_M);
  73. if (ret)
  74. return log_msg_ret("SDRAM init fail\n", ret);
  75. gd->arch.hob_list = hob;
  76. debug("done\n");
  77. ret = fspm_done(dev);
  78. if (ret)
  79. return log_msg_ret("fsm_done\n", ret);
  80. return 0;
  81. }