generic_timer.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2013
  4. * David Feng <fenghua@phytium.com.cn>
  5. */
  6. #include <common.h>
  7. #include <bootstage.h>
  8. #include <command.h>
  9. #include <time.h>
  10. #include <asm/system.h>
  11. DECLARE_GLOBAL_DATA_PTR;
  12. /*
  13. * Generic timer implementation of get_tbclk()
  14. */
  15. unsigned long get_tbclk(void)
  16. {
  17. unsigned long cntfrq;
  18. asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq));
  19. return cntfrq;
  20. }
  21. #ifdef CONFIG_SYS_FSL_ERRATUM_A008585
  22. /*
  23. * FSL erratum A-008585 says that the ARM generic timer counter "has the
  24. * potential to contain an erroneous value for a small number of core
  25. * clock cycles every time the timer value changes".
  26. * This sometimes leads to a consecutive counter read returning a lower
  27. * value than the previous one, thus reporting the time to go backwards.
  28. * The workaround is to read the counter twice and only return when the value
  29. * was the same in both reads.
  30. * Assumes that the CPU runs in much higher frequency than the timer.
  31. */
  32. unsigned long timer_read_counter(void)
  33. {
  34. unsigned long cntpct;
  35. unsigned long temp;
  36. isb();
  37. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  38. asm volatile("mrs %0, cntpct_el0" : "=r" (temp));
  39. while (temp != cntpct) {
  40. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  41. asm volatile("mrs %0, cntpct_el0" : "=r" (temp));
  42. }
  43. return cntpct;
  44. }
  45. #elif CONFIG_SUNXI_A64_TIMER_ERRATUM
  46. /*
  47. * This erratum sometimes flips the lower 11 bits of the counter value
  48. * to all 0's or all 1's, leading to jumps forwards or backwards.
  49. * Backwards jumps might be interpreted all roll-overs and be treated as
  50. * huge jumps forward.
  51. * The workaround is to check whether the lower 11 bits of the counter are
  52. * all 0 or all 1, then discard this value and read again.
  53. * This occasionally discards valid values, but will catch all erroneous
  54. * reads and fixes the problem reliably. Also this mostly requires only a
  55. * single read, so does not have any significant overhead.
  56. * The algorithm was conceived by Samuel Holland.
  57. */
  58. unsigned long timer_read_counter(void)
  59. {
  60. unsigned long cntpct;
  61. isb();
  62. do {
  63. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  64. } while (((cntpct + 1) & GENMASK(10, 0)) <= 1);
  65. return cntpct;
  66. }
  67. #else
  68. /*
  69. * timer_read_counter() using the Arm Generic Timer (aka arch timer).
  70. */
  71. unsigned long timer_read_counter(void)
  72. {
  73. unsigned long cntpct;
  74. isb();
  75. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  76. return cntpct;
  77. }
  78. #endif
  79. uint64_t get_ticks(void)
  80. {
  81. unsigned long ticks = timer_read_counter();
  82. gd->arch.tbl = ticks;
  83. return ticks;
  84. }
  85. unsigned long usec2ticks(unsigned long usec)
  86. {
  87. ulong ticks;
  88. if (usec < 1000)
  89. ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
  90. else
  91. ticks = ((usec / 10) * (get_tbclk() / 100000));
  92. return ticks;
  93. }
  94. ulong timer_get_boot_us(void)
  95. {
  96. u64 val = get_ticks() * 1000000;
  97. return val / get_tbclk();
  98. }