t208xrdb.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2009-2013 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <env.h>
  8. #include <i2c.h>
  9. #include <init.h>
  10. #include <netdev.h>
  11. #include <linux/compiler.h>
  12. #include <asm/mmu.h>
  13. #include <asm/processor.h>
  14. #include <asm/immap_85xx.h>
  15. #include <asm/fsl_law.h>
  16. #include <asm/fsl_serdes.h>
  17. #include <asm/fsl_liodn.h>
  18. #include <fm_eth.h>
  19. #include "t208xrdb.h"
  20. #include "cpld.h"
  21. #include "../common/vid.h"
  22. DECLARE_GLOBAL_DATA_PTR;
  23. int checkboard(void)
  24. {
  25. struct cpu_type *cpu = gd->arch.cpu;
  26. static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"};
  27. printf("Board: %sRDB, ", cpu->name);
  28. printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ",
  29. CPLD_READ(hw_ver), CPLD_READ(sw_ver));
  30. #ifdef CONFIG_SDCARD
  31. puts("SD/MMC\n");
  32. #elif CONFIG_SPIFLASH
  33. puts("SPI\n");
  34. #else
  35. u8 reg;
  36. reg = CPLD_READ(flash_csr);
  37. if (reg & CPLD_BOOT_SEL) {
  38. puts("NAND\n");
  39. } else {
  40. reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
  41. printf("NOR vBank%d\n", reg);
  42. }
  43. #endif
  44. puts("SERDES Reference Clocks:\n");
  45. printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[2], freq[0]);
  46. printf("SD2_CLK1=%s, SD2_CLK2=%s\n", freq[0], freq[0]);
  47. return 0;
  48. }
  49. int board_early_init_r(void)
  50. {
  51. const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  52. int flash_esel = find_tlb_idx((void *)flashbase, 1);
  53. /*
  54. * Remap Boot flash + PROMJET region to caching-inhibited
  55. * so that flash can be erased properly.
  56. */
  57. /* Flush d-cache and invalidate i-cache of any FLASH data */
  58. flush_dcache();
  59. invalidate_icache();
  60. if (flash_esel == -1) {
  61. /* very unlikely unless something is messed up */
  62. puts("Error: Could not find TLB for FLASH BASE\n");
  63. flash_esel = 2; /* give our best effort to continue */
  64. } else {
  65. /* invalidate existing TLB entry for flash + promjet */
  66. disable_tlb(flash_esel);
  67. }
  68. set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  69. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  70. 0, flash_esel, BOOKE_PAGESZ_256M, 1);
  71. /*
  72. * Adjust core voltage according to voltage ID
  73. * This function changes I2C mux to channel 2.
  74. */
  75. if (adjust_vdd(0))
  76. printf("Warning: Adjusting core voltage failed.\n");
  77. return 0;
  78. }
  79. unsigned long get_board_sys_clk(void)
  80. {
  81. return CONFIG_SYS_CLK_FREQ;
  82. }
  83. unsigned long get_board_ddr_clk(void)
  84. {
  85. return CONFIG_DDR_CLK_FREQ;
  86. }
  87. int misc_init_r(void)
  88. {
  89. u8 reg;
  90. /* Reset CS4315 PHY */
  91. reg = CPLD_READ(reset_ctl);
  92. reg |= CPLD_RSTCON_EDC_RST;
  93. CPLD_WRITE(reset_ctl, reg);
  94. return 0;
  95. }
  96. int ft_board_setup(void *blob, bd_t *bd)
  97. {
  98. phys_addr_t base;
  99. phys_size_t size;
  100. ft_cpu_setup(blob, bd);
  101. base = env_get_bootm_low();
  102. size = env_get_bootm_size();
  103. fdt_fixup_memory(blob, (u64)base, (u64)size);
  104. #ifdef CONFIG_PCI
  105. pci_of_setup(blob, bd);
  106. #endif
  107. fdt_fixup_liodn(blob);
  108. fsl_fdt_fixup_dr_usb(blob, bd);
  109. #ifdef CONFIG_SYS_DPAA_FMAN
  110. fdt_fixup_fman_ethernet(blob);
  111. fdt_fixup_board_enet(blob);
  112. #endif
  113. return 0;
  114. }