t1040qds.c 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2013 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <env.h>
  8. #include <i2c.h>
  9. #include <init.h>
  10. #include <netdev.h>
  11. #include <linux/compiler.h>
  12. #include <asm/mmu.h>
  13. #include <asm/processor.h>
  14. #include <asm/cache.h>
  15. #include <asm/immap_85xx.h>
  16. #include <asm/fsl_law.h>
  17. #include <asm/fsl_serdes.h>
  18. #include <asm/fsl_liodn.h>
  19. #include <fm_eth.h>
  20. #include <hwconfig.h>
  21. #include "../common/sleep.h"
  22. #include "../common/qixis.h"
  23. #include "t1040qds.h"
  24. #include "t1040qds_qixis.h"
  25. DECLARE_GLOBAL_DATA_PTR;
  26. int checkboard(void)
  27. {
  28. char buf[64];
  29. u8 sw;
  30. struct cpu_type *cpu = gd->arch.cpu;
  31. static const char *const freq[] = {"100", "125", "156.25", "161.13",
  32. "122.88", "122.88", "122.88"};
  33. int clock;
  34. printf("Board: %sQDS, ", cpu->name);
  35. printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, ",
  36. QIXIS_READ(id), QIXIS_READ(arch));
  37. sw = QIXIS_READ(brdcfg[0]);
  38. sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
  39. if (sw < 0x8)
  40. printf("vBank: %d\n", sw);
  41. else if (sw == 0x8)
  42. puts("PromJet\n");
  43. else if (sw == 0x9)
  44. puts("NAND\n");
  45. else if (sw == 0x15)
  46. printf("IFCCard\n");
  47. else
  48. printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
  49. printf("FPGA: v%d (%s), build %d",
  50. (int)QIXIS_READ(scver), qixis_read_tag(buf),
  51. (int)qixis_read_minor());
  52. /* the timestamp string contains "\n" at the end */
  53. printf(" on %s", qixis_read_time(buf));
  54. /*
  55. * Display the actual SERDES reference clocks as configured by the
  56. * dip switches on the board. Note that the SWx registers could
  57. * technically be set to force the reference clocks to match the
  58. * values that the SERDES expects (or vice versa). For now, however,
  59. * we just display both values and hope the user notices when they
  60. * don't match.
  61. */
  62. puts("SERDES Reference: ");
  63. sw = QIXIS_READ(brdcfg[2]);
  64. clock = (sw >> 6) & 3;
  65. printf("Clock1=%sMHz ", freq[clock]);
  66. clock = (sw >> 4) & 3;
  67. printf("Clock2=%sMHz\n", freq[clock]);
  68. return 0;
  69. }
  70. int select_i2c_ch_pca9547(u8 ch)
  71. {
  72. int ret;
  73. ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
  74. if (ret) {
  75. puts("PCA: failed to select proper channel\n");
  76. return ret;
  77. }
  78. return 0;
  79. }
  80. static void qe_board_setup(void)
  81. {
  82. u8 brdcfg15, brdcfg9;
  83. if (hwconfig("qe") && hwconfig("tdm")) {
  84. brdcfg15 = QIXIS_READ(brdcfg[15]);
  85. /*
  86. * TDMRiser uses QE-TDM
  87. * Route QE_TDM signals to TDM Riser slot
  88. */
  89. QIXIS_WRITE(brdcfg[15], brdcfg15 | 7);
  90. } else if (hwconfig("qe") && hwconfig("uart")) {
  91. brdcfg15 = QIXIS_READ(brdcfg[15]);
  92. brdcfg9 = QIXIS_READ(brdcfg[9]);
  93. /*
  94. * Route QE_TDM signals to UCC
  95. * ProfiBus controlled by UCC3
  96. */
  97. brdcfg15 &= 0xfc;
  98. QIXIS_WRITE(brdcfg[15], brdcfg15 | 2);
  99. QIXIS_WRITE(brdcfg[9], brdcfg9 | 4);
  100. }
  101. }
  102. int board_early_init_f(void)
  103. {
  104. #if defined(CONFIG_DEEP_SLEEP)
  105. if (is_warm_boot())
  106. fsl_dp_disable_console();
  107. #endif
  108. return 0;
  109. }
  110. int board_early_init_r(void)
  111. {
  112. #ifdef CONFIG_SYS_FLASH_BASE
  113. const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  114. int flash_esel = find_tlb_idx((void *)flashbase, 1);
  115. /*
  116. * Remap Boot flash + PROMJET region to caching-inhibited
  117. * so that flash can be erased properly.
  118. */
  119. /* Flush d-cache and invalidate i-cache of any FLASH data */
  120. flush_dcache();
  121. invalidate_icache();
  122. if (flash_esel == -1) {
  123. /* very unlikely unless something is messed up */
  124. puts("Error: Could not find TLB for FLASH BASE\n");
  125. flash_esel = 2; /* give our best effort to continue */
  126. } else {
  127. /* invalidate existing TLB entry for flash + promjet */
  128. disable_tlb(flash_esel);
  129. }
  130. set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  131. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  132. 0, flash_esel, BOOKE_PAGESZ_256M, 1);
  133. #endif
  134. select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
  135. return 0;
  136. }
  137. unsigned long get_board_sys_clk(void)
  138. {
  139. u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
  140. switch (sysclk_conf & 0x0F) {
  141. case QIXIS_SYSCLK_64:
  142. return 64000000;
  143. case QIXIS_SYSCLK_83:
  144. return 83333333;
  145. case QIXIS_SYSCLK_100:
  146. return 100000000;
  147. case QIXIS_SYSCLK_125:
  148. return 125000000;
  149. case QIXIS_SYSCLK_133:
  150. return 133333333;
  151. case QIXIS_SYSCLK_150:
  152. return 150000000;
  153. case QIXIS_SYSCLK_160:
  154. return 160000000;
  155. case QIXIS_SYSCLK_166:
  156. return 166666666;
  157. }
  158. return 66666666;
  159. }
  160. unsigned long get_board_ddr_clk(void)
  161. {
  162. u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
  163. switch ((ddrclk_conf & 0x30) >> 4) {
  164. case QIXIS_DDRCLK_100:
  165. return 100000000;
  166. case QIXIS_DDRCLK_125:
  167. return 125000000;
  168. case QIXIS_DDRCLK_133:
  169. return 133333333;
  170. }
  171. return 66666666;
  172. }
  173. #define NUM_SRDS_BANKS 2
  174. int misc_init_r(void)
  175. {
  176. u8 sw;
  177. serdes_corenet_t *srds_regs =
  178. (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
  179. u32 actual[NUM_SRDS_BANKS] = { 0 };
  180. int i;
  181. sw = QIXIS_READ(brdcfg[2]);
  182. for (i = 0; i < NUM_SRDS_BANKS; i++) {
  183. unsigned int clock = (sw >> (6 - 2 * i)) & 3;
  184. switch (clock) {
  185. case 0:
  186. actual[i] = SRDS_PLLCR0_RFCK_SEL_100;
  187. break;
  188. case 1:
  189. actual[i] = SRDS_PLLCR0_RFCK_SEL_125;
  190. break;
  191. case 2:
  192. actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25;
  193. break;
  194. }
  195. }
  196. puts("SerDes1");
  197. for (i = 0; i < NUM_SRDS_BANKS; i++) {
  198. u32 pllcr0 = srds_regs->bank[i].pllcr0;
  199. u32 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK;
  200. if (expected != actual[i]) {
  201. printf("expects ref clk%d %sMHz, but actual is %sMHz\n",
  202. i + 1, serdes_clock_to_string(expected),
  203. serdes_clock_to_string(actual[i]));
  204. }
  205. }
  206. qe_board_setup();
  207. return 0;
  208. }
  209. int ft_board_setup(void *blob, bd_t *bd)
  210. {
  211. phys_addr_t base;
  212. phys_size_t size;
  213. ft_cpu_setup(blob, bd);
  214. base = env_get_bootm_low();
  215. size = env_get_bootm_size();
  216. fdt_fixup_memory(blob, (u64)base, (u64)size);
  217. #ifdef CONFIG_PCI
  218. pci_of_setup(blob, bd);
  219. #endif
  220. fdt_fixup_liodn(blob);
  221. #ifdef CONFIG_HAS_FSL_DR_USB
  222. fsl_fdt_fixup_dr_usb(blob, bd);
  223. #endif
  224. #ifdef CONFIG_SYS_DPAA_FMAN
  225. fdt_fixup_fman_ethernet(blob);
  226. fdt_fixup_board_enet(blob);
  227. #endif
  228. return 0;
  229. }
  230. void qixis_dump_switch(void)
  231. {
  232. int i, nr_of_cfgsw;
  233. QIXIS_WRITE(cms[0], 0x00);
  234. nr_of_cfgsw = QIXIS_READ(cms[1]);
  235. puts("DIP switch settings dump:\n");
  236. for (i = 1; i <= nr_of_cfgsw; i++) {
  237. QIXIS_WRITE(cms[0], i);
  238. printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));
  239. }
  240. }
  241. int board_need_mem_reset(void)
  242. {
  243. return 1;
  244. }