board.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * board.c
  4. *
  5. * Board functions for B&R BRSMARC1 Board
  6. *
  7. * Copyright (C) 2017 Hannes Schmelzer <oe5hpm@oevsv.at>
  8. * B&R Industrial Automation GmbH - http://www.br-automation.com
  9. *
  10. */
  11. #include <common.h>
  12. #include <errno.h>
  13. #include <init.h>
  14. #include <spl.h>
  15. #include <asm/arch/cpu.h>
  16. #include <asm/arch/hardware.h>
  17. #include <asm/arch/omap.h>
  18. #include <asm/arch/ddr_defs.h>
  19. #include <asm/arch/clock.h>
  20. #include <asm/arch/sys_proto.h>
  21. #include <asm/arch/mem.h>
  22. #include <asm/io.h>
  23. #include <asm/gpio.h>
  24. #include <asm/emif.h>
  25. #include <power/tps65217.h>
  26. #include "../common/bur_common.h"
  27. #include "../common/br_resetc.h"
  28. /* -------------------------------------------------------------------------*/
  29. /* -- defines for used GPIO Hardware -- */
  30. #define PER_RESET (2 * 32 + 0)
  31. DECLARE_GLOBAL_DATA_PTR;
  32. #if defined(CONFIG_SPL_BUILD)
  33. static const struct ddr_data ddr3_data = {
  34. .datardsratio0 = MT41K256M16HA125E_RD_DQS,
  35. .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
  36. .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
  37. .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
  38. };
  39. static const struct cmd_control ddr3_cmd_ctrl_data = {
  40. .cmd0csratio = MT41K256M16HA125E_RATIO,
  41. .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  42. .cmd1csratio = MT41K256M16HA125E_RATIO,
  43. .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  44. .cmd2csratio = MT41K256M16HA125E_RATIO,
  45. .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  46. };
  47. static struct emif_regs ddr3_emif_reg_data = {
  48. .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
  49. .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
  50. .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
  51. .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
  52. .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
  53. .zq_config = MT41K256M16HA125E_ZQ_CFG,
  54. .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
  55. };
  56. static const struct ctrl_ioregs ddr3_ioregs = {
  57. .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  58. .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  59. .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  60. .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  61. .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  62. };
  63. #define OSC (V_OSCK / 1000000)
  64. const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1};
  65. void am33xx_spl_board_init(void)
  66. {
  67. struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
  68. struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
  69. int rc;
  70. /*
  71. * enable additional clocks of modules which are accessed later from
  72. * VxWorks OS
  73. */
  74. u32 *const clk_domains[] = { 0 };
  75. u32 *const clk_modules_specific[] = {
  76. &cmwkup->wkup_adctscctrl,
  77. &cmper->spi1clkctrl,
  78. &cmper->dcan0clkctrl,
  79. &cmper->dcan1clkctrl,
  80. &cmper->timer4clkctrl,
  81. &cmper->timer5clkctrl,
  82. &cmper->lcdclkctrl,
  83. &cmper->lcdcclkstctrl,
  84. 0
  85. };
  86. do_enable_clocks(clk_domains, clk_modules_specific, 1);
  87. /* setup I2C */
  88. enable_i2c_pin_mux();
  89. /* peripheral reset */
  90. rc = gpio_request(PER_RESET, "PER_RESET");
  91. if (rc != 0)
  92. printf("cannot request PER_RESET GPIO!\n");
  93. rc = gpio_direction_output(PER_RESET, 0);
  94. if (rc != 0)
  95. printf("cannot set PER_RESET GPIO!\n");
  96. /* setup pmic */
  97. pmicsetup(0, 0);
  98. }
  99. const struct dpll_params *get_dpll_ddr_params(void)
  100. {
  101. return &dpll_ddr3;
  102. }
  103. void sdram_init(void)
  104. {
  105. config_ddr(400, &ddr3_ioregs,
  106. &ddr3_data,
  107. &ddr3_cmd_ctrl_data,
  108. &ddr3_emif_reg_data, 0);
  109. }
  110. #endif /* CONFIG_SPL_BUILD */
  111. #if !defined(CONFIG_SPL_BUILD)
  112. /* decision if backlight is switched on or not on powerup */
  113. int board_backlightstate(void)
  114. {
  115. u8 bklmask, rstcause;
  116. int rc = 0;
  117. rc |= br_resetc_regget(RSTCTRL_SCRATCHREG1, &bklmask);
  118. rc |= br_resetc_regget(RSTCTRL_ERSTCAUSE, &rstcause);
  119. if (rc != 0) {
  120. printf("%s: read rstctrl failed!\n", __func__);
  121. return 1;
  122. }
  123. if ((rstcause & bklmask) != 0)
  124. return 0;
  125. return 1;
  126. }
  127. /* Basic board specific setup. run quite after relocation */
  128. int board_init(void)
  129. {
  130. if (power_tps65217_init(0))
  131. printf("WARN: cannot setup PMIC 0x24 @ bus #0, not found!.\n");
  132. return 0;
  133. }
  134. #if defined(CONFIG_BOARD_LATE_INIT)
  135. int board_late_init(void)
  136. {
  137. br_resetc_bmode();
  138. return 0;
  139. }
  140. #endif /* CONFIG_BOARD_LATE_INIT */
  141. #endif /* !CONFIG_SPL_BUILD */