xor.h 2.2 KB

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  1. /*
  2. * Copyright (C) Marvell International Ltd. and its affiliates
  3. *
  4. * SPDX-License-Identifier: GPL-2.0
  5. */
  6. #ifndef __XOR_H
  7. #define __XOR_H
  8. #include "ddr3_hw_training.h"
  9. #define MV_XOR_MAX_CHAN 4 /* total channels for all units together */
  10. /*
  11. * This enumerator describes the type of functionality the XOR channel
  12. * can have while using the same data structures.
  13. */
  14. enum xor_type {
  15. MV_XOR, /* XOR channel functions as XOR accelerator */
  16. MV_DMA, /* XOR channel functions as IDMA channel */
  17. MV_CRC32 /* XOR channel functions as CRC 32 calculator */
  18. };
  19. /*
  20. * This enumerator describes the set of commands that can be applied on
  21. * an engine (e.g. IDMA, XOR). Appling a comman depends on the current
  22. * status (see MV_STATE enumerator)
  23. * Start can be applied only when status is IDLE
  24. * Stop can be applied only when status is IDLE, ACTIVE or PAUSED
  25. * Pause can be applied only when status is ACTIVE
  26. * Restart can be applied only when status is PAUSED
  27. */
  28. enum mv_command {
  29. MV_START, /* Start */
  30. MV_STOP, /* Stop */
  31. MV_PAUSE, /* Pause */
  32. MV_RESTART /* Restart */
  33. };
  34. /*
  35. * This enumerator describes the set of state conditions.
  36. * Moving from one state to other is stricted.
  37. */
  38. enum mv_state {
  39. MV_IDLE,
  40. MV_ACTIVE,
  41. MV_PAUSED,
  42. MV_UNDEFINED_STATE
  43. };
  44. /* XOR descriptor structure for CRC and DMA descriptor */
  45. struct crc_dma_desc {
  46. u32 status; /* Successful descriptor execution indication */
  47. u32 crc32_result; /* Result of CRC-32 calculation */
  48. u32 desc_cmd; /* type of operation to be carried out on the data */
  49. u32 next_desc_ptr; /* Next descriptor address pointer */
  50. u32 byte_cnt; /* Size of source block part represented by the descriptor */
  51. u32 dst_addr; /* Destination Block address pointer (not used in CRC32 */
  52. u32 src_addr0; /* Mode: Source Block address pointer */
  53. u32 src_addr1; /* Mode: Source Block address pointer */
  54. } __packed;
  55. void mv_xor_hal_init(u32 chan_num);
  56. int mv_xor_state_get(u32 chan);
  57. void mv_sys_xor_init(MV_DRAM_INFO *dram_info);
  58. void mv_sys_xor_finish(void);
  59. int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr);
  60. int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high,
  61. u32 init_val_low);
  62. #endif /* __XOR_H */