board.c 3.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Altera SoCFPGA common board code
  4. *
  5. * Copyright (C) 2015 Marek Vasut <marex@denx.de>
  6. */
  7. #include <common.h>
  8. #include <asm/arch/clock_manager.h>
  9. #include <asm/arch/misc.h>
  10. #include <asm/arch/reset_manager.h>
  11. #include <asm/arch/secure_vab.h>
  12. #include <asm/global_data.h>
  13. #include <asm/io.h>
  14. #include <errno.h>
  15. #include <fdtdec.h>
  16. #include <hang.h>
  17. #include <image.h>
  18. #include <init.h>
  19. #include <log.h>
  20. #include <usb.h>
  21. #include <usb/dwc2_udc.h>
  22. DECLARE_GLOBAL_DATA_PTR;
  23. void s_init(void) {
  24. #ifndef CONFIG_ARM64
  25. /*
  26. * Preconfigure ACTLR and CPACR, make sure Write Full Line of Zeroes
  27. * is disabled in ACTLR.
  28. * This is optional on CycloneV / ArriaV.
  29. * This is mandatory on Arria10, otherwise Linux refuses to boot.
  30. */
  31. asm volatile(
  32. "mcr p15, 0, %0, c1, c0, 1\n"
  33. "mcr p15, 0, %0, c1, c0, 2\n"
  34. "isb\n"
  35. "dsb\n"
  36. ::"r"(0x0));
  37. #endif
  38. }
  39. /*
  40. * Miscellaneous platform dependent initialisations
  41. */
  42. int board_init(void)
  43. {
  44. /* Address of boot parameters for ATAG (if ATAG is used) */
  45. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  46. return 0;
  47. }
  48. int dram_init_banksize(void)
  49. {
  50. fdtdec_setup_memory_banksize();
  51. return 0;
  52. }
  53. #ifdef CONFIG_USB_GADGET
  54. struct dwc2_plat_otg_data socfpga_otg_data = {
  55. .usb_gusbcfg = 0x1417,
  56. };
  57. int board_usb_init(int index, enum usb_init_type init)
  58. {
  59. int node[2], count;
  60. fdt_addr_t addr;
  61. count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc",
  62. COMPAT_ALTERA_SOCFPGA_DWC2USB,
  63. node, 2);
  64. if (count <= 0) /* No controller found. */
  65. return 0;
  66. addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg");
  67. if (addr == FDT_ADDR_T_NONE) {
  68. printf("UDC Controller has no 'reg' property!\n");
  69. return -EINVAL;
  70. }
  71. /* Patch the address from OF into the controller pdata. */
  72. socfpga_otg_data.regs_otg = addr;
  73. return dwc2_udc_probe(&socfpga_otg_data);
  74. }
  75. int g_dnl_board_usb_cable_connected(void)
  76. {
  77. return 1;
  78. }
  79. #endif
  80. #ifdef CONFIG_SPL_BUILD
  81. __weak int board_fit_config_name_match(const char *name)
  82. {
  83. /* Just empty function now - can't decide what to choose */
  84. debug("%s: %s\n", __func__, name);
  85. return 0;
  86. }
  87. #endif
  88. #if IS_ENABLED(CONFIG_FIT_IMAGE_POST_PROCESS)
  89. void board_fit_image_post_process(const void *fit, int node, void **p_image,
  90. size_t *p_size)
  91. {
  92. if (IS_ENABLED(CONFIG_SOCFPGA_SECURE_VAB_AUTH)) {
  93. if (socfpga_vendor_authentication(p_image, p_size))
  94. hang();
  95. }
  96. }
  97. #endif
  98. #if !IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_FIT)
  99. void board_prep_linux(bootm_headers_t *images)
  100. {
  101. if (!images->fit_uname_cfg) {
  102. if (IS_ENABLED(CONFIG_SOCFPGA_SECURE_VAB_AUTH) &&
  103. !IS_ENABLED(CONFIG_SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE)) {
  104. /*
  105. * Ensure the OS is always booted from FIT and with
  106. * VAB signed certificate
  107. */
  108. printf("Please use FIT with VAB signed images!\n");
  109. hang();
  110. }
  111. } else {
  112. /* Update fdt_addr in enviroment variable */
  113. env_set_hex("fdt_addr", (ulong)images->ft_addr);
  114. debug("images->ft_addr = 0x%08lx\n", (ulong)images->ft_addr);
  115. }
  116. if (IS_ENABLED(CONFIG_CADENCE_QSPI)) {
  117. if (env_get("linux_qspi_enable"))
  118. run_command(env_get("linux_qspi_enable"), 0);
  119. }
  120. }
  121. #endif