test.dts 11 KB

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  1. /dts-v1/;
  2. / {
  3. model = "sandbox";
  4. compatible = "sandbox";
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. aliases {
  8. console = &uart0;
  9. eth0 = "/eth@10002000";
  10. eth3 = &eth_3;
  11. eth5 = &eth_5;
  12. i2c0 = "/i2c@0";
  13. mmc0 = "/mmc0";
  14. mmc1 = "/mmc1";
  15. pci0 = &pci0;
  16. pci1 = &pci1;
  17. pci2 = &pci2;
  18. remoteproc1 = &rproc_1;
  19. remoteproc2 = &rproc_2;
  20. rtc0 = &rtc_0;
  21. rtc1 = &rtc_1;
  22. spi0 = "/spi@0";
  23. testfdt6 = "/e-test";
  24. testbus3 = "/some-bus";
  25. testfdt0 = "/some-bus/c-test@0";
  26. testfdt1 = "/some-bus/c-test@1";
  27. testfdt3 = "/b-test";
  28. testfdt5 = "/some-bus/c-test@5";
  29. testfdt8 = "/a-test";
  30. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  31. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  32. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  33. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  34. usb0 = &usb_0;
  35. usb1 = &usb_1;
  36. usb2 = &usb_2;
  37. axi0 = &axi;
  38. osd0 = "/osd";
  39. };
  40. a-test {
  41. reg = <0 1>;
  42. compatible = "denx,u-boot-fdt-test";
  43. ping-expect = <0>;
  44. ping-add = <0>;
  45. u-boot,dm-pre-reloc;
  46. test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
  47. <0>, <&gpio_a 12>;
  48. test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
  49. <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
  50. <&gpio_b 9 0xc 3 2 1>;
  51. };
  52. junk {
  53. reg = <1 1>;
  54. compatible = "not,compatible";
  55. };
  56. no-compatible {
  57. reg = <2 1>;
  58. };
  59. bind-test {
  60. bind-test-child1 {
  61. compatible = "sandbox,phy";
  62. #phy-cells = <1>;
  63. };
  64. bind-test-child2 {
  65. compatible = "simple-bus";
  66. };
  67. };
  68. b-test {
  69. reg = <3 1>;
  70. compatible = "denx,u-boot-fdt-test";
  71. ping-expect = <3>;
  72. ping-add = <3>;
  73. };
  74. phy_provider0: gen_phy@0 {
  75. compatible = "sandbox,phy";
  76. #phy-cells = <1>;
  77. };
  78. phy_provider1: gen_phy@1 {
  79. compatible = "sandbox,phy";
  80. #phy-cells = <0>;
  81. broken;
  82. };
  83. gen_phy_user: gen_phy_user {
  84. compatible = "simple-bus";
  85. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  86. phy-names = "phy1", "phy2", "phy3";
  87. };
  88. some-bus {
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. compatible = "denx,u-boot-test-bus";
  92. reg = <3 1>;
  93. ping-expect = <4>;
  94. ping-add = <4>;
  95. c-test@5 {
  96. compatible = "denx,u-boot-fdt-test";
  97. reg = <5>;
  98. ping-expect = <5>;
  99. ping-add = <5>;
  100. };
  101. c-test@0 {
  102. compatible = "denx,u-boot-fdt-test";
  103. reg = <0>;
  104. ping-expect = <6>;
  105. ping-add = <6>;
  106. };
  107. c-test@1 {
  108. compatible = "denx,u-boot-fdt-test";
  109. reg = <1>;
  110. ping-expect = <7>;
  111. ping-add = <7>;
  112. };
  113. };
  114. d-test {
  115. reg = <3 1>;
  116. ping-expect = <6>;
  117. ping-add = <6>;
  118. compatible = "google,another-fdt-test";
  119. };
  120. e-test {
  121. reg = <3 1>;
  122. ping-expect = <6>;
  123. ping-add = <6>;
  124. compatible = "google,another-fdt-test";
  125. };
  126. f-test {
  127. compatible = "denx,u-boot-fdt-test";
  128. };
  129. g-test {
  130. compatible = "denx,u-boot-fdt-test";
  131. };
  132. clocks {
  133. clk_fixed: clk-fixed {
  134. compatible = "fixed-clock";
  135. #clock-cells = <0>;
  136. clock-frequency = <1234>;
  137. };
  138. };
  139. clk_sandbox: clk-sbox {
  140. compatible = "sandbox,clk";
  141. #clock-cells = <1>;
  142. };
  143. clk-test {
  144. compatible = "sandbox,clk-test";
  145. clocks = <&clk_fixed>,
  146. <&clk_sandbox 1>,
  147. <&clk_sandbox 0>;
  148. clock-names = "fixed", "i2c", "spi";
  149. };
  150. eth@10002000 {
  151. compatible = "sandbox,eth";
  152. reg = <0x10002000 0x1000>;
  153. fake-host-hwaddr = [00 00 66 44 22 00];
  154. };
  155. eth_5: eth@10003000 {
  156. compatible = "sandbox,eth";
  157. reg = <0x10003000 0x1000>;
  158. fake-host-hwaddr = [00 00 66 44 22 11];
  159. };
  160. eth_3: sbe5 {
  161. compatible = "sandbox,eth";
  162. reg = <0x10005000 0x1000>;
  163. fake-host-hwaddr = [00 00 66 44 22 33];
  164. };
  165. eth@10004000 {
  166. compatible = "sandbox,eth";
  167. reg = <0x10004000 0x1000>;
  168. fake-host-hwaddr = [00 00 66 44 22 22];
  169. };
  170. gpio_a: base-gpios {
  171. compatible = "sandbox,gpio";
  172. gpio-controller;
  173. #gpio-cells = <1>;
  174. gpio-bank-name = "a";
  175. sandbox,gpio-count = <20>;
  176. };
  177. gpio_b: extra-gpios {
  178. compatible = "sandbox,gpio";
  179. gpio-controller;
  180. #gpio-cells = <5>;
  181. gpio-bank-name = "b";
  182. sandbox,gpio-count = <10>;
  183. };
  184. i2c@0 {
  185. #address-cells = <1>;
  186. #size-cells = <0>;
  187. reg = <0 1>;
  188. compatible = "sandbox,i2c";
  189. clock-frequency = <100000>;
  190. eeprom@2c {
  191. reg = <0x2c>;
  192. compatible = "i2c-eeprom";
  193. emul {
  194. compatible = "sandbox,i2c-eeprom";
  195. sandbox,filename = "i2c.bin";
  196. sandbox,size = <256>;
  197. };
  198. };
  199. rtc_0: rtc@43 {
  200. reg = <0x43>;
  201. compatible = "sandbox-rtc";
  202. emul {
  203. compatible = "sandbox,i2c-rtc";
  204. };
  205. };
  206. rtc_1: rtc@61 {
  207. reg = <0x61>;
  208. compatible = "sandbox-rtc";
  209. emul {
  210. compatible = "sandbox,i2c-rtc";
  211. };
  212. };
  213. sandbox_pmic: sandbox_pmic {
  214. reg = <0x40>;
  215. };
  216. mc34708: pmic@41 {
  217. reg = <0x41>;
  218. };
  219. };
  220. adc@0 {
  221. compatible = "sandbox,adc";
  222. vdd-supply = <&buck2>;
  223. vss-microvolts = <0>;
  224. };
  225. lcd {
  226. u-boot,dm-pre-reloc;
  227. compatible = "sandbox,lcd-sdl";
  228. xres = <1366>;
  229. yres = <768>;
  230. };
  231. leds {
  232. compatible = "gpio-leds";
  233. iracibble {
  234. gpios = <&gpio_a 1 0>;
  235. label = "sandbox:red";
  236. };
  237. martinet {
  238. gpios = <&gpio_a 2 0>;
  239. label = "sandbox:green";
  240. };
  241. default_on {
  242. gpios = <&gpio_a 5 0>;
  243. label = "sandbox:default_on";
  244. default-state = "on";
  245. };
  246. default_off {
  247. gpios = <&gpio_a 6 0>;
  248. label = "sandbox:default_off";
  249. default-state = "off";
  250. };
  251. };
  252. mbox: mbox {
  253. compatible = "sandbox,mbox";
  254. #mbox-cells = <1>;
  255. };
  256. mbox-test {
  257. compatible = "sandbox,mbox-test";
  258. mboxes = <&mbox 100>, <&mbox 1>;
  259. mbox-names = "other", "test";
  260. };
  261. cpu-test1 {
  262. compatible = "sandbox,cpu_sandbox";
  263. };
  264. cpu-test2 {
  265. compatible = "sandbox,cpu_sandbox";
  266. };
  267. cpu-test3 {
  268. compatible = "sandbox,cpu_sandbox";
  269. };
  270. misc-test {
  271. compatible = "sandbox,misc_sandbox";
  272. };
  273. mmc2 {
  274. compatible = "sandbox,mmc";
  275. };
  276. mmc1 {
  277. compatible = "sandbox,mmc";
  278. };
  279. mmc0 {
  280. compatible = "sandbox,mmc";
  281. };
  282. pci0: pci-controller0 {
  283. compatible = "sandbox,pci";
  284. device_type = "pci";
  285. #address-cells = <3>;
  286. #size-cells = <2>;
  287. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
  288. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  289. pci@0,0 {
  290. compatible = "pci-generic";
  291. reg = <0x0000 0 0 0 0>;
  292. emul@0,0 {
  293. compatible = "sandbox,swap-case";
  294. };
  295. };
  296. pci@1f,0 {
  297. compatible = "pci-generic";
  298. reg = <0xf800 0 0 0 0>;
  299. emul@1f,0 {
  300. compatible = "sandbox,swap-case";
  301. };
  302. };
  303. };
  304. pci1: pci-controller1 {
  305. compatible = "sandbox,pci";
  306. device_type = "pci";
  307. #address-cells = <3>;
  308. #size-cells = <2>;
  309. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
  310. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  311. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  312. 0x0c 0x00 0x1234 0x5678>;
  313. };
  314. pci2: pci-controller2 {
  315. compatible = "sandbox,pci";
  316. device_type = "pci";
  317. #address-cells = <3>;
  318. #size-cells = <2>;
  319. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  320. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  321. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  322. pci@1f,0 {
  323. compatible = "pci-generic";
  324. reg = <0xf800 0 0 0 0>;
  325. emul@1f,0 {
  326. compatible = "sandbox,swap-case";
  327. };
  328. };
  329. };
  330. probing {
  331. compatible = "simple-bus";
  332. test1 {
  333. compatible = "denx,u-boot-probe-test";
  334. };
  335. test2 {
  336. compatible = "denx,u-boot-probe-test";
  337. };
  338. test3 {
  339. compatible = "denx,u-boot-probe-test";
  340. };
  341. test4 {
  342. compatible = "denx,u-boot-probe-test";
  343. };
  344. };
  345. pwrdom: power-domain {
  346. compatible = "sandbox,power-domain";
  347. #power-domain-cells = <1>;
  348. };
  349. power-domain-test {
  350. compatible = "sandbox,power-domain-test";
  351. power-domains = <&pwrdom 2>;
  352. };
  353. pwm {
  354. compatible = "sandbox,pwm";
  355. };
  356. pwm2 {
  357. compatible = "sandbox,pwm";
  358. };
  359. ram {
  360. compatible = "sandbox,ram";
  361. };
  362. reset@0 {
  363. compatible = "sandbox,warm-reset";
  364. };
  365. reset@1 {
  366. compatible = "sandbox,reset";
  367. };
  368. resetc: reset-ctl {
  369. compatible = "sandbox,reset-ctl";
  370. #reset-cells = <1>;
  371. };
  372. reset-ctl-test {
  373. compatible = "sandbox,reset-ctl-test";
  374. resets = <&resetc 100>, <&resetc 2>;
  375. reset-names = "other", "test";
  376. };
  377. rproc_1: rproc@1 {
  378. compatible = "sandbox,test-processor";
  379. remoteproc-name = "remoteproc-test-dev1";
  380. };
  381. rproc_2: rproc@2 {
  382. compatible = "sandbox,test-processor";
  383. internal-memory-mapped;
  384. remoteproc-name = "remoteproc-test-dev2";
  385. };
  386. smem@0 {
  387. compatible = "sandbox,smem";
  388. };
  389. spi@0 {
  390. #address-cells = <1>;
  391. #size-cells = <0>;
  392. reg = <0 1>;
  393. compatible = "sandbox,spi";
  394. cs-gpios = <0>, <&gpio_a 0>;
  395. spi.bin@0 {
  396. reg = <0>;
  397. compatible = "spansion,m25p16", "spi-flash";
  398. spi-max-frequency = <40000000>;
  399. sandbox,filename = "spi.bin";
  400. };
  401. };
  402. syscon@0 {
  403. compatible = "sandbox,syscon0";
  404. reg = <0x10 4>;
  405. };
  406. syscon@1 {
  407. compatible = "sandbox,syscon1";
  408. reg = <0x20 5
  409. 0x28 6
  410. 0x30 7
  411. 0x38 8>;
  412. };
  413. syscon@2 {
  414. compatible = "simple-mfd", "syscon";
  415. reg = <0x40 5
  416. 0x48 6
  417. 0x50 7
  418. 0x58 8>;
  419. };
  420. timer {
  421. compatible = "sandbox,timer";
  422. clock-frequency = <1000000>;
  423. };
  424. tpm2 {
  425. compatible = "sandbox,tpm2";
  426. };
  427. uart0: serial {
  428. compatible = "sandbox,serial";
  429. u-boot,dm-pre-reloc;
  430. };
  431. usb_0: usb@0 {
  432. compatible = "sandbox,usb";
  433. status = "disabled";
  434. hub {
  435. compatible = "sandbox,usb-hub";
  436. #address-cells = <1>;
  437. #size-cells = <0>;
  438. flash-stick {
  439. reg = <0>;
  440. compatible = "sandbox,usb-flash";
  441. };
  442. };
  443. };
  444. usb_1: usb@1 {
  445. compatible = "sandbox,usb";
  446. hub {
  447. compatible = "usb-hub";
  448. usb,device-class = <9>;
  449. hub-emul {
  450. compatible = "sandbox,usb-hub";
  451. #address-cells = <1>;
  452. #size-cells = <0>;
  453. flash-stick@0 {
  454. reg = <0>;
  455. compatible = "sandbox,usb-flash";
  456. sandbox,filepath = "testflash.bin";
  457. };
  458. flash-stick@1 {
  459. reg = <1>;
  460. compatible = "sandbox,usb-flash";
  461. sandbox,filepath = "testflash1.bin";
  462. };
  463. flash-stick@2 {
  464. reg = <2>;
  465. compatible = "sandbox,usb-flash";
  466. sandbox,filepath = "testflash2.bin";
  467. };
  468. keyb@3 {
  469. reg = <3>;
  470. compatible = "sandbox,usb-keyb";
  471. };
  472. };
  473. };
  474. };
  475. usb_2: usb@2 {
  476. compatible = "sandbox,usb";
  477. status = "disabled";
  478. };
  479. spmi: spmi@0 {
  480. compatible = "sandbox,spmi";
  481. #address-cells = <0x1>;
  482. #size-cells = <0x1>;
  483. pm8916@0 {
  484. compatible = "qcom,spmi-pmic";
  485. reg = <0x0 0x1>;
  486. #address-cells = <0x1>;
  487. #size-cells = <0x1>;
  488. spmi_gpios: gpios@c000 {
  489. compatible = "qcom,pm8916-gpio";
  490. reg = <0xc000 0x400>;
  491. gpio-controller;
  492. gpio-count = <4>;
  493. #gpio-cells = <2>;
  494. gpio-bank-name="spmi";
  495. };
  496. };
  497. };
  498. wdt0: wdt@0 {
  499. compatible = "sandbox,wdt";
  500. };
  501. axi: axi@0 {
  502. compatible = "sandbox,axi";
  503. #address-cells = <0x1>;
  504. #size-cells = <0x1>;
  505. store@0 {
  506. compatible = "sandbox,sandbox_store";
  507. reg = <0x0 0x400>;
  508. };
  509. };
  510. chosen {
  511. #address-cells = <1>;
  512. #size-cells = <1>;
  513. chosen-test {
  514. compatible = "denx,u-boot-fdt-test";
  515. reg = <9 1>;
  516. };
  517. };
  518. translation-test@8000 {
  519. compatible = "simple-bus";
  520. reg = <0x8000 0x4000>;
  521. #address-cells = <0x2>;
  522. #size-cells = <0x1>;
  523. ranges = <0 0x0 0x8000 0x1000
  524. 1 0x100 0x9000 0x1000
  525. 2 0x200 0xA000 0x1000
  526. 3 0x300 0xB000 0x1000
  527. >;
  528. dev@0,0 {
  529. compatible = "denx,u-boot-fdt-dummy";
  530. reg = <0 0x0 0x1000>;
  531. };
  532. dev@1,100 {
  533. compatible = "denx,u-boot-fdt-dummy";
  534. reg = <1 0x100 0x1000>;
  535. };
  536. dev@2,200 {
  537. compatible = "denx,u-boot-fdt-dummy";
  538. reg = <2 0x200 0x1000>;
  539. };
  540. noxlatebus@3,300 {
  541. compatible = "simple-bus";
  542. reg = <3 0x300 0x1000>;
  543. #address-cells = <0x1>;
  544. #size-cells = <0x0>;
  545. dev@42 {
  546. compatible = "denx,u-boot-fdt-dummy";
  547. reg = <0x42>;
  548. };
  549. };
  550. };
  551. osd {
  552. compatible = "sandbox,sandbox_osd";
  553. };
  554. };
  555. #include "sandbox_pmic.dtsi"